mb/google/zork: fine tune stamp_boost parameter for gumboz

The new discovery from Google & AMD, the value currently used
STAPM Time Constant of 1640 is reducing real PPT TSP from the
target 4.8W to 4.68W.

Furthermore, when using the "default" STAPM Time Constant of 1400,
the actual real PPT TSP becomes 4.89W.

Operating at this default settings therefore uses a higher real PPT TSP,
which results in a significant performance improvement.

BUG=b:184902568
BRANCH=zork
TEST=1. emerge-zork coreboot
     2. run balance performance and skin temperature test => pass

Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Change-Id: I102c1c5f8215a6c5f7a4451f5731167c32e27c90
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52313
Reviewed-by: Sam McNally <sammc@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kevin Chiu 2021-04-14 10:46:15 +08:00 committed by Patrick Georgi
parent 51f3b32255
commit fde6b65b52
1 changed files with 1 additions and 1 deletions

View File

@ -12,7 +12,7 @@ chip soc/amd/picasso
register "slow_ppt_limit_mW" = "6000" register "slow_ppt_limit_mW" = "6000"
register "fast_ppt_limit_mW" = "9000" register "fast_ppt_limit_mW" = "9000"
register "slow_ppt_time_constant_s" = "5" register "slow_ppt_time_constant_s" = "5"
register "stapm_time_constant_s" = "1640" register "stapm_time_constant_s" = "1400"
register "sustained_power_limit_mW" = "4800" register "sustained_power_limit_mW" = "4800"
register "telemetry_vddcr_vdd_slope_mA" = "41322" register "telemetry_vddcr_vdd_slope_mA" = "41322"