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driver/intel/fsp2_0: Disable NULL deref code when calling FSP 

FSP needs interrupts disable so also disable generating exceptions
around debug registers.

Change-Id: Ia49dde68d45b71e231aaf32a0e6fd847f0e06146
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64426
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2022-05-17 13:07:30 +02:00
parent c055f35314
commit fdf6d121f5
5 changed files with 31 additions and 9 deletions
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7
src/arch/x86/include/arch/null_breakpoint.h
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@ -7,10 +7,15 @@
/* Places data and instructions breakpoints at address zero. */
void null_breakpoint_init(void);
void null_breakpoint_disable(void);
#else
static inline void null_breakpoint_init(void)
{
/* Not implemented */
/* Not implemented */
}
static inline void null_breakpoint_disable(void)
{
/* Not implemented */
}
#endif
#endif /* _NULL_BREAKPOINT_H_ */

11
src/arch/x86/null_breakpoint.c
View File

@ -57,11 +57,16 @@ void null_breakpoint_init(void)
create_instruction_breakpoint();
}
static void null_breakpoint_disable(void *unused)
void null_breakpoint_disable(void)
{
breakpoint_remove(null_fetch_bp);
breakpoint_remove(null_deref_bp);
}
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, null_breakpoint_disable, NULL);
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, null_breakpoint_disable, NULL);
static void null_breakpoint_disable_hook(void *unused)
{
null_breakpoint_disable();
}
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, null_breakpoint_disable_hook, NULL);
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, null_breakpoint_disable_hook, NULL);

14
src/drivers/intel/fsp2_0/memory_init.c
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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <security/vboot/antirollback.h>
#include <arch/null_breakpoint.h>
#include <arch/symbols.h>
#include <assert.h>
#include <cbfs.h>
@ -11,17 +11,18 @@
#include <fsp/api.h>
#include <fsp/util.h>
#include <memrange.h>
#include <mode_switch.h>
#include <mrc_cache.h>
#include <program_loading.h>
#include <romstage_handoff.h>
#include <security/tpm/tspi.h>
#include <security/vboot/antirollback.h>
#include <security/vboot/vboot_common.h>
#include <string.h>
#include <symbols.h>
#include <timestamp.h>
#include <security/vboot/vboot_common.h>
#include <security/tpm/tspi.h>
#include <vb2_api.h>
#include <types.h>
#include <mode_switch.h>
#include <vb2_api.h>
static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t));
@ -293,6 +294,8 @@ static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake)
fsp_raminit = (void *)(uintptr_t)(hdr->image_base + hdr->fsp_memory_init_entry_offset);
fsp_debug_before_memory_init(fsp_raminit, upd, &fspm_upd);
/* FSP disables the interrupt handler so remove debug exceptions temporarily */
null_breakpoint_disable();
post_code(POST_FSP_MEMORY_INIT);
timestamp_add_now(TS_FSP_MEMORY_INIT_START);
if (ENV_X86_64 && CONFIG(PLATFORM_USES_FSP2_X86_32))
@ -301,6 +304,7 @@ static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake)
(uintptr_t)fsp_get_hob_list_ptr());
else
status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr());
null_breakpoint_init();
post_code(POST_FSP_MEMORY_EXIT);
timestamp_add_now(TS_FSP_MEMORY_INIT_END);

4
src/drivers/intel/fsp2_0/notify.c
View File

@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <arch/null_breakpoint.h>
#include <bootstate.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
@ -75,10 +76,13 @@ static void fsp_notify(enum fsp_notify_phase phase)
timestamp_add_now(data->timestamp_before);
post_code(data->post_code_before);
/* FSP disables the interrupt handler so remove debug exceptions temporarily */
null_breakpoint_disable();
if (ENV_X86_64 && CONFIG(PLATFORM_USES_FSP2_X86_32))
ret = protected_mode_call_1arg(fspnotify, (uintptr_t)&notify_params);
else
ret = fspnotify(&notify_params);
null_breakpoint_init();
timestamp_add_now(data->timestamp_after);
post_code(data->post_code_after);

4
src/drivers/intel/fsp2_0/silicon_init.c
View File

@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <arch/null_breakpoint.h>
#include <bootsplash.h>
#include <cbfs.h>
#include <cbmem.h>
@ -133,10 +134,13 @@ static void do_silicon_init(struct fsp_header *hdr)
timestamp_add_now(TS_FSP_SILICON_INIT_START);
post_code(POST_FSP_SILICON_INIT);
/* FSP disables the interrupt handler so remove debug exceptions temporarily */
null_breakpoint_disable();
if (ENV_X86_64 && CONFIG(PLATFORM_USES_FSP2_X86_32))
status = protected_mode_call_1arg(silicon_init, (uintptr_t)upd);
else
status = silicon_init(upd);
null_breakpoint_init();
printk(BIOS_INFO, "FSPS returned %x\n", status);