More boards in kconfig, and moved -O2 flag for romcc into
ROMCCFLAGS, so boards can override it where necessary. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi
parent
99950c2192
commit
fdfaada706
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@ -51,17 +51,17 @@ obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
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ifdef POST_EVALUATION
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ROMCCFLAGS ?= -mcpu=p2
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ROMCCFLAGS ?= -mcpu=p2 -O2
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$(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
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$(obj)/romcc $(ROMCCFLAGS) -O2 --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
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$(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
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ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
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$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
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$(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
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$(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
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else
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$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c
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$(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
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$(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
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endif
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endif
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@ -18,6 +18,6 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ROMCCFLAGS := -mcpu=i386
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ROMCCFLAGS := -mcpu=i386 -O2
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include $(src)/mainboard/Makefile.romccboard.inc
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@ -18,6 +18,6 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ROMCCFLAGS := -mcpu=i386
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ROMCCFLAGS := -mcpu=i386 -O2
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include $(src)/mainboard/Makefile.romccboard.inc
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@ -18,6 +18,6 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ROMCCFLAGS := -mcpu=i386
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ROMCCFLAGS := -mcpu=i386 -O2
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include $(src)/mainboard/Makefile.romccboard.inc
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@ -18,6 +18,6 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ROMCCFLAGS := -mcpu=i386
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ROMCCFLAGS := -mcpu=i386 -O2
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include $(src)/mainboard/Makefile.romccboard.inc
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@ -23,7 +23,7 @@ choice
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depends on VENDOR_BCOM
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source "src/mainboard/bcom/winnet100/Kconfig"
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# source "src/mainboard/bcom/winnetp680/Kconfig"
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source "src/mainboard/bcom/winnetp680/Kconfig"
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endchoice
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@ -18,6 +18,6 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ROMCCFLAGS := -mcpu=i386
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ROMCCFLAGS := -mcpu=i386 -O2
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include $(src)/mainboard/Makefile.romccboard.inc
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@ -0,0 +1,36 @@
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config BOARD_BCOM_WINNETP680
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bool "WinNET P680"
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select ARCH_X86
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select CPU_VIA_C7
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select NORTHBRIDGE_VIA_CN700
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select SOUTHBRIDGE_VIA_VT8237R
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select SUPERIO_WINBOND_W83697HF
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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config MAINBOARD_DIR
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string
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default bcom/winnetp680
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depends on BOARD_BCOM_WINNETP680
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config MAINBOARD_PART_NUMBER
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string
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default "WinNET P680"
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depends on BOARD_BCOM_WINNETP680
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config IRQ_SLOT_COUNT
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int
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default 10
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depends on BOARD_BCOM_WINNETP680
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config VIDEO_MB
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int
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default 32
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depends on BOARD_BCOM_WINNETP680
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config RAMBASE
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hex
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default 0x4000
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depends on BOARD_BCOM_WINNETP680
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@ -0,0 +1,61 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2008 VIA Technologies, Inc.
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## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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initobj-y += crt0.o
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obj-y += mainboard.o
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obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
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obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
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obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
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obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
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obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
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ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
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ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
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ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
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ldscript-y += ../../../../src/arch/i386/lib/id.lds
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ldscript-y += ../../../../src/arch/i386/lib/failover.lds
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crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
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crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
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crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
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crt0-y += ../../../../src/arch/i386/lib/id.inc
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crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc
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crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc
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crt0-y += auto.inc
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crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc
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ifdef POST_EVALUATION
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$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
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$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
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$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
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iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
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mv dsdt.hex $@
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$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
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$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
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perl -e 's/\.rodata/.rom.data/g' -pi $@
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perl -e 's/\.text/.section .rom.text/g' -pi $@
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endif
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@ -46,17 +46,17 @@ obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
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ifdef POST_EVALUATION
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ROMCCFLAGS ?= -mcpu=p4
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ROMCCFLAGS ?= -mcpu=p4 -O2
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$(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
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$(obj)/romcc $(ROMCCFLAGS) -O2 --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
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$(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
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ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
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$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
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$(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
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$(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
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else
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$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c
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$(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
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$(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
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endif
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endif
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@ -18,6 +18,6 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ROMCCFLAGS := -mcpu=i386
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ROMCCFLAGS := -mcpu=i386 -O2
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include $(src)/mainboard/Makefile.romccboard.inc
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@ -22,6 +22,7 @@ choice
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prompt "Mainboard model"
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depends on VENDOR_GIGABYTE
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source "src/mainboard/gigabyte/ga_2761gxdk/Kconfig"
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source "src/mainboard/gigabyte/ga-6bxc/Kconfig"
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source "src/mainboard/gigabyte/m57sli/Kconfig"
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@ -0,0 +1,148 @@
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config BOARD_GIGABYTE_GA_2761GXDK
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bool "GA-2761GXDK"
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select ARCH_X86
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select CPU_AMD_K8
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select CPU_AMD_SOCKET_AM2
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_SIS_SIS966
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select SUPERIO_ITE_IT8716F
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select PIRQ_TABLE
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select USE_PRINTK_IN_CAR
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select HAVE_HIGH_TABLES
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select IOAPIC
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select MEM_TRAIN_SEQ
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select K8_REV_F_SUPPORT
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config MAINBOARD_DIR
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string
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default gigabyte/ga_2761gxdk
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config DCACHE_RAM_BASE
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hex
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default 0xc8000
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config DCACHE_RAM_SIZE
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hex
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default 0x08000
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config DCACHE_RAM_GLOBAL_VAR_SIZE
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hex
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default 0x01000
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config APIC_ID_OFFSET
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hex
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default 16
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config LB_CKS_RANGE_START
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int
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default 49
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config LB_CKS_RANGE_END
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int
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default 122
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config LB_CKS_LOC
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int
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default 123
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config MAINBOARD_PART_NUMBER
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string
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default "ga2761gxdk"
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config PCI_64BIT_PREF_MEM
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bool
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default n
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config HAVE_FALLBACK_BOOT
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bool
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default n
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config USE_FALLBACK_IMAGE
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bool
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default n
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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depends on BOARD_GIGABYTE_GA_2761GXDK
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|
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config MAX_CPUS
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int
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default 2
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config MAX_PHYSICAL_CPUS
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int
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default 1
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config AP_CODE_IN_CAR
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bool
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default n
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config HW_MEM_HOLE_SIZE_AUTO_INC
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bool
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default n
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x0
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x0
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depends on BOARD_GIGABYTE_GA_2761GXDK
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|
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config USE_INIT
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bool
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default n
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config SERIAL_CPU_INIT
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bool
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default n
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depends on BOARD_GIGABYTE_GA_2761GXDK
|
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|
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config WAIT_BEFORE_CPUS_INIT
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bool
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default n
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depends on BOARD_GIGABYTE_GA_2761GXDK
|
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|
||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
|
||||
default 0x1022
|
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depends on BOARD_GIGABYTE_GA_2761GXDK
|
||||
|
||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
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hex
|
||||
default 0x2b80
|
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depends on BOARD_GIGABYTE_GA_2761GXDK
|
||||
|
||||
config IRQ_SLOT_COUNT
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int
|
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default 11
|
||||
depends on BOARD_GIGABYTE_GA_2761GXDK
|
||||
|
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@ -0,0 +1,57 @@
|
|||
##
|
||||
## This file is part of the coreboot project.
|
||||
##
|
||||
## Copyright (C) 2007-2008 coresystems GmbH
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or
|
||||
## modify it under the terms of the GNU General Public License as
|
||||
## published by the Free Software Foundation; version 2 of
|
||||
## the License.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
## MA 02110-1301 USA
|
||||
##
|
||||
|
||||
driver-y += mainboard.o
|
||||
|
||||
#needed by irq_tables and mptable and acpi_tables
|
||||
obj-y += get_bus_conf.o
|
||||
obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
|
||||
obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
|
||||
obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
|
||||
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
|
||||
|
||||
# This is part of the conversion to init-obj and away from included code.
|
||||
initobj-y += crt0.o
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
|
||||
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
|
||||
crt0-y += ../../../../src/southbridge/sis/sis966/id.inc
|
||||
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
|
||||
crt0-y += auto.inc
|
||||
|
||||
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
|
||||
ldscript-y += ../../../../src/southbridge/sis/sis966/id.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
|
||||
ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
|
||||
|
||||
ifdef POST_EVALUATION
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
|
||||
perl -e 's/\.rodata/.rom.data/g' -pi $@
|
||||
perl -e 's/\.text/.section .rom.text/g' -pi $@
|
||||
|
||||
endif
|
||||
|
|
@ -18,6 +18,6 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
ROMCCFLAGS := -mcpu=i386
|
||||
ROMCCFLAGS := -mcpu=i386 -O2
|
||||
include $(src)/mainboard/Makefile.romccboard.inc
|
||||
|
||||
|
|
|
|||
|
|
@ -18,6 +18,6 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
ROMCCFLAGS := -mcpu=i386
|
||||
ROMCCFLAGS := -mcpu=i386 -O2
|
||||
include $(src)/mainboard/Makefile.romccboard.inc
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
obj-y += reset.o
|
||||
ROMCCFLAGS := -mcpu=p4
|
||||
ROMCCFLAGS := -mcpu=p4 -O2
|
||||
include $(src)/mainboard/Makefile.romccboard.inc
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
ROMCCFLAGS := -mcpu=p4
|
||||
ROMCCFLAGS := -mcpu=p4 -O2
|
||||
include $(src)/mainboard/Makefile.romccboard.inc
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
ROMCCFLAGS := -mcpu=p4 -fno-simplify-phi
|
||||
ROMCCFLAGS := -mcpu=p4 -fno-simplify-phi -O2
|
||||
include $(src)/mainboard/Makefile.romccboard.inc
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
ROMCCFLAGS := -mcpu=p4
|
||||
ROMCCFLAGS := -mcpu=p4 -O2
|
||||
obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
|
||||
include $(src)/mainboard/Makefile.romccboard.inc
|
||||
|
||||
|
|
|
|||
|
|
@ -1 +1,8 @@
|
|||
#
|
||||
choice
|
||||
prompt "Mainboard model"
|
||||
depends on VENDOR_JETWAY
|
||||
|
||||
source "src/mainboard/jetway/j7f24/Kconfig"
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,43 @@
|
|||
config BOARD_JETWAY_J7F24
|
||||
bool "J7F24"
|
||||
select ARCH_X86
|
||||
select CPU_VIA_C7
|
||||
select NORTHBRIDGE_VIA_CN700
|
||||
select SOUTHBRIDGE_VIA_VT8237R
|
||||
select SUPERIO_FINTEK_F71805F
|
||||
select HAVE_PIRQ_TABLE
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
default jetway/j7f24
|
||||
depends on BOARD_JETWAY_J7F24
|
||||
|
||||
#config DCACHE_RAM_BASE
|
||||
# hex
|
||||
# default 0xffef0000
|
||||
# depends on BOARD_JETWAY_J7F24
|
||||
#
|
||||
#config DCACHE_RAM_SIZE
|
||||
# hex
|
||||
# default 0x8000
|
||||
# depends on BOARD_JETWAY_J7F24
|
||||
|
||||
config MAINBOARD_PART_NUMBER
|
||||
string
|
||||
default "j7f24"
|
||||
depends on BOARD_JETWAY_J7F24
|
||||
|
||||
config VIDEO_MB
|
||||
int
|
||||
default 32
|
||||
depends on BOARD_JETWAY_J7F24
|
||||
|
||||
config RAMBASE
|
||||
hex
|
||||
default 0x4000
|
||||
depends on BOARD_JETWAY_J7F24
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 10
|
||||
depends on BOARD_JETWAY_J7F24
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
##
|
||||
## This file is part of the coreboot project.
|
||||
##
|
||||
## Copyright (C) 2008 VIA Technologies, Inc.
|
||||
## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
initobj-y += crt0.o
|
||||
obj-y += mainboard.o
|
||||
obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
|
||||
obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
|
||||
|
||||
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/id.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
|
||||
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
|
||||
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
|
||||
crt0-y += ../../../../src/arch/i386/lib/id.inc
|
||||
crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc
|
||||
crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc
|
||||
crt0-y += auto.inc
|
||||
crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc
|
||||
|
||||
ifdef POST_EVALUATION
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
|
||||
perl -e 's/\.rodata/.rom.data/g' -pi $@
|
||||
perl -e 's/\.text/.section .rom.text/g' -pi $@
|
||||
|
||||
endif
|
||||
|
||||
|
|
@ -1 +1,8 @@
|
|||
#
|
||||
choice
|
||||
prompt "Mainboard model"
|
||||
depends on VENDOR_NEWISYS
|
||||
|
||||
source "src/mainboard/newisys/khepri/Kconfig"
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,123 @@
|
|||
config BOARD_NEWISYS_KHEPRI
|
||||
bool "Khepri"
|
||||
select ARCH_X86
|
||||
select CPU_AMD_K8
|
||||
select CPU_AMD_SOCKET_940
|
||||
select NORTHBRIDGE_AMD_AMDK8
|
||||
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
|
||||
select SOUTHBRIDGE_AMD_AMD8111
|
||||
select SOUTHBRIDGE_AMD_AMD8131
|
||||
select SUPERIO_WINBOND_W83627HF
|
||||
select HAVE_PIRQ_TABLE
|
||||
select USE_PRINTK_IN_CAR
|
||||
select USE_DCACHE_RAM
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
default newisys/khepri
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config DCACHE_RAM_BASE
|
||||
hex
|
||||
default 0xcf000
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config DCACHE_RAM_SIZE
|
||||
hex
|
||||
default 0x01000
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config APIC_ID_OFFSET
|
||||
hex
|
||||
default 0x10
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config HAVE_HARD_RESET
|
||||
bool
|
||||
default y
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config IOAPIC
|
||||
bool
|
||||
default y
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config K8_REV_F_SUPPORT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
int
|
||||
default 122
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config LB_CKS_LOC
|
||||
int
|
||||
default 123
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config MAINBOARD_PART_NUMBER
|
||||
string
|
||||
default "Khepri"
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config HW_MEM_HOLE_SIZEK
|
||||
hex
|
||||
default 0x100000
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config USE_INIT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config CONSOLE_VGA
|
||||
bool
|
||||
default y
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config PCI_ROM_RUN
|
||||
bool
|
||||
default y
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 11
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
##
|
||||
## This file is part of the coreboot project.
|
||||
##
|
||||
## Copyright (C) 2007-2008 coresystems GmbH
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or
|
||||
## modify it under the terms of the GNU General Public License as
|
||||
## published by the Free Software Foundation; version 2 of
|
||||
## the License.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
## MA 02110-1301 USA
|
||||
##
|
||||
|
||||
driver-y += mainboard.o
|
||||
|
||||
obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
|
||||
obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
|
||||
|
||||
# This is part of the conversion to init-obj and away from included code.
|
||||
|
||||
initobj-y += crt0.o
|
||||
# FIXME in $(top)/Makefile
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
|
||||
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
|
||||
crt0-y += ../../../../src/arch/i386/lib/id.inc
|
||||
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
|
||||
crt0-y += auto.inc
|
||||
|
||||
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/id.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
|
||||
|
||||
ifdef POST_EVALUATION
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
|
||||
perl -e 's/\.rodata/.rom.data/g' -pi $@
|
||||
perl -e 's/\.text/.section .rom.text/g' -pi $@
|
||||
|
||||
endif
|
||||
|
||||
|
|
@ -1 +1,8 @@
|
|||
#
|
||||
choice
|
||||
prompt "Mainboard model"
|
||||
depends on VENDOR_NVIDIA
|
||||
|
||||
source "src/mainboard/nvidia/l1_2pvv/Kconfig"
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,148 @@
|
|||
config BOARD_NVIDIA_L1_2PVV
|
||||
bool "L1 2PVV"
|
||||
select ARCH_X86
|
||||
select CPU_AMD_K8
|
||||
select CPU_AMD_SOCKET_F
|
||||
select NORTHBRIDGE_AMD_AMDK8
|
||||
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
|
||||
select SOUTHBRIDGE_NVIDIA_MCP55
|
||||
select SUPERIO_WINBOND_W83627EHG
|
||||
select PIRQ_TABLE
|
||||
select USE_PRINTK_IN_CAR
|
||||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select HAVE_HIGH_TABLES
|
||||
select IOAPIC
|
||||
select MEM_TRAIN_SEQ
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
select K8_REV_F_SUPPORT
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
default nvidia/l1_2pvv
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config DCACHE_RAM_BASE
|
||||
hex
|
||||
default 0xc8000
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config DCACHE_RAM_SIZE
|
||||
hex
|
||||
default 0x08000
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config DCACHE_RAM_GLOBAL_VAR_SIZE
|
||||
hex
|
||||
default 0x01000
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config APIC_ID_OFFSET
|
||||
hex
|
||||
default 16
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config LB_CKS_RANGE_START
|
||||
int
|
||||
default 49
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
int
|
||||
default 122
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config LB_CKS_LOC
|
||||
int
|
||||
default 123
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config MAINBOARD_PART_NUMBER
|
||||
string
|
||||
default "l1_2pvv"
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config PCI_64BIT_PREF_MEM
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config HAVE_FALLBACK_BOOT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config USE_FALLBACK_IMAGE
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config HW_MEM_HOLE_SIZEK
|
||||
hex
|
||||
default 0x100000
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 1
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config AP_CODE_IN_CAR
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config HW_MEM_HOLE_SIZE_AUTO_INC
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config USE_INIT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config SERIAL_CPU_INIT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config WAIT_BEFORE_CPUS_INIT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
||||
hex
|
||||
default 0x1022
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
||||
hex
|
||||
default 0x2b80
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 11
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
##
|
||||
## This file is part of the coreboot project.
|
||||
##
|
||||
## Copyright (C) 2007-2008 coresystems GmbH
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or
|
||||
## modify it under the terms of the GNU General Public License as
|
||||
## published by the Free Software Foundation; version 2 of
|
||||
## the License.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
## MA 02110-1301 USA
|
||||
##
|
||||
|
||||
driver-y += mainboard.o
|
||||
|
||||
#needed by irq_tables and mptable and acpi_tables
|
||||
obj-y += get_bus_conf.o
|
||||
obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
|
||||
obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
|
||||
obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
|
||||
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
|
||||
|
||||
# This is part of the conversion to init-obj and away from included code.
|
||||
initobj-y += crt0.o
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
|
||||
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
|
||||
crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
|
||||
crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
|
||||
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
|
||||
crt0-y += auto.inc
|
||||
|
||||
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
|
||||
ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
|
||||
ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
|
||||
ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
|
||||
|
||||
ifdef POST_EVALUATION
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
|
||||
perl -e 's/\.rodata/.rom.data/g' -pi $@
|
||||
perl -e 's/\.text/.section .rom.text/g' -pi $@
|
||||
|
||||
endif
|
||||
|
|
@ -1 +1,8 @@
|
|||
#
|
||||
choice
|
||||
prompt "Mainboard model"
|
||||
depends on VENDOR_RCA
|
||||
|
||||
source "src/mainboard/rca/rm4100/Kconfig"
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,36 @@
|
|||
config BOARD_RCA_RM4100
|
||||
bool "RM4100"
|
||||
select ARCH_X86
|
||||
select CPU_INTEL_SOCKET_PGA370
|
||||
select NORTHBRIDGE_INTEL_I82830
|
||||
select SOUTHBRIDGE_INTEL_I82801XX
|
||||
select SUPERIO_SMSC_SMSCSUPERIO
|
||||
select HAVE_PIRQ_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
default rca/rm4100
|
||||
depends on BOARD_RCA_RM4100
|
||||
|
||||
config MAINBOARD_PART_NUMBER
|
||||
string
|
||||
default "RM4100"
|
||||
depends on BOARD_RCA_RM4100
|
||||
|
||||
config HAVE_OPTION_TABLE
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_RCA_RM4100
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 7
|
||||
depends on BOARD_RCA_RM4100
|
||||
|
||||
config VIDEO_MB
|
||||
int
|
||||
default 0
|
||||
depends on BOARD_RCA_RM4100
|
||||
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
ROMCCFLAGS=-mcpu=p3 -O
|
||||
|
||||
include $(src)/mainboard/Makefile.romccboard.inc
|
||||
|
||||
|
|
@ -18,6 +18,6 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
ROMCCFLAGS := -mcpu=i386
|
||||
ROMCCFLAGS := -mcpu=i386 -O2
|
||||
include $(src)/mainboard/Makefile.romccboard.inc
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue