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mb/google/brya/variants/taeko: Add initial fw config for taeko 

According to config.star fw mask definition, add initial FW_CONFIG id.

BUG=b:194649740
TEST=FW_NAME=taeko emerge-brya coreboot chromeos-bootimage

Cq-Depend: chrome-internal:4072654
Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com>
Change-Id: Ifef750338d777b76e9710d6bca9a166120db6a0a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57332
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Joey Peng 2021-09-02 14:19:37 +08:00 committed by Patrick Georgi
parent 84532dae14
commit fe2d0ec029
3 changed files with 104 additions and 22 deletions
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2
src/mainboard/google/brya/variants/taeko/Makefile.inc
View File

@ -3,3 +3,5 @@ bootblock-y += gpio.c
romstage-y += memory.c
ramstage-y += gpio.c
ramstage-$(CONFIG_FW_CONFIG) += fw_config.c

56
src/mainboard/google/brya/variants/taeko/fw_config.c Normal file
View File

@ -0,0 +1,56 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h>
#include <console/console.h>
#include <fw_config.h>
#include <gpio.h>
static const struct pad_config dmic_enable_pads[] = {
PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2), /* DMIC_CLK0_R */
PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2), /* DMIC_DATA0_R */
};
static const struct pad_config dmic_disable_pads[] = {
PAD_NC(GPP_S2, NONE),
PAD_NC(GPP_S3, NONE),
};
static const struct pad_config i2s_enable_pads[] = {
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2), /* I2S_HP_SCLK_R */
PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2), /* I2S_HP_SFRM_R */
PAD_CFG_NF(GPP_R2, DN_20K, DEEP, NF2), /* I2S_PCH_TX_HP_RX_STRAP */
PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2), /* I2S_PCH_RX_HP_TX */
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF2), /* I2S_SPKR_SCLK_R */
PAD_CFG_NF(GPP_R5, NONE, DEEP, NF2), /* I2S_SPKR_SFRM_R */
PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2), /* I2S_PCH_TX_SPKR_RX_R */
PAD_NC(GPP_R7, NONE), /* I2S_PCH_RX_SPKR_TX */
};
static const struct pad_config i2s_disable_pads[] = {
PAD_NC(GPP_R0, NONE),
PAD_NC(GPP_R1, NONE),
PAD_NC(GPP_R2, NONE),
PAD_NC(GPP_R3, NONE),
PAD_NC(GPP_R4, NONE),
PAD_NC(GPP_R5, NONE),
PAD_NC(GPP_R6, NONE),
PAD_NC(GPP_R7, NONE),
};
static void fw_config_handle(void *unused)
{
if (!fw_config_is_provisioned() || fw_config_probe(FW_CONFIG(AUDIO, AUDIO_UNKNOWN))) {
printk(BIOS_INFO, "Disable audio related GPIO pins.\n");
gpio_configure_pads(i2s_disable_pads, ARRAY_SIZE(i2s_disable_pads));
gpio_configure_pads(dmic_disable_pads, ARRAY_SIZE(dmic_disable_pads));
return;
}
if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_MAX98357_ALC5682I_I2S))) {
printk(BIOS_INFO, "Configure audio over I2S with MAX98357 ALC5682I.\n");
gpio_configure_pads(dmic_enable_pads, ARRAY_SIZE(dmic_enable_pads));
gpio_configure_pads(i2s_enable_pads, ARRAY_SIZE(i2s_enable_pads));
}
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);

68
src/mainboard/google/brya/variants/taeko/overridetree.cb
View File

@ -1,3 +1,38 @@
fw_config
field DB_USB 0 1
option DB_USB_ABSENT 0
option DB_USB3_NO_A 1
end
field DB_SD 2 3
option DB_SD_ABSENT 0
option DB_SD_OZ711LV2LN 1
end
field KB_BL 4
option KB_BL_ABSENT 0
option KB_BL_PRESENT 1
end
field AUDIO 5 7
option AUDIO_UNKNOWN 0
option AUDIO_MAX98357_ALC5682I_I2S 1
end
field KB_LAYOUT 8 9
option KB_LAYOUT_DEFAULT 0
end
field WIFI_SAR_ID 10 11
option WIFI_SAR_ID_0 0
option WIFI_SAR_ID_1 1
option WIFI_SAR_ID_2 2
option WIFI_SAR_ID_3 3
end
field BOOT_NVME_MASK 12
option BOOT_NVME_DISABLED 0
option BOOT_NVME_ENABLED 1
end
field BOOT_EMMC_MASK 13
option BOOT_EMMC_DISABLED 0
option BOOT_EMMC_ENABLED 1
end
end
chip soc/intel/alderlake
register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable Port 1
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # DB USB2_C1
@ -60,6 +95,7 @@ chip soc/intel/alderlake
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
device i2c 1a on
probe AUDIO AUDIO_MAX98357_ALC5682I_I2S
end
end
end
@ -127,26 +163,8 @@ chip soc/intel/alderlake
register "sdmode_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
register "sdmode_delay" = "5"
device generic 0 on end
end
chip drivers/intel/soundwire
device generic 0 on
chip drivers/soundwire/alc5682
# SoundWire Link 0 ID 1
register "desc" = ""Headset Codec""
device generic 0.1 on end
end
chip drivers/soundwire/max98373
# SoundWire Link 2 ID 3
register "desc" = ""Left Speaker Amp""
device generic 2.3 on end
end
chip drivers/soundwire/max98373
# SoundWire Link 2 ID 7
register "desc" = ""Right Speaker Amp""
device generic 2.7 on end
end
probe AUDIO AUDIO_MAX98357_ALC5682I_I2S
end
end
end
@ -169,7 +187,9 @@ chip soc/intel/alderlake
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
register "srcclk_pin" = "3"
device generic 0 on end
device generic 0 on
probe DB_SD DB_SD_OZ711LV2LN
end
end
end
device ref pcie_rp9 on
@ -227,7 +247,9 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)"
device ref tcss_usb3_port3 on end
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A
end
end
end
end
@ -245,7 +267,9 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)"
device ref usb2_port3 on end
device ref usb2_port3 on
probe DB_USB DB_USB3_NO_A
end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Camera""