From fe33b4cb7ce0bab9269819b4e0d040cd9554411a Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Mon, 12 Dec 2022 00:59:28 +0100 Subject: [PATCH] soc/intel/acpi: Replace Add(a,b) with ASL 2.0 syntax Replace `Add (a, b)` with `a + b`. Change-Id: I0b7f22acf153fe02b471c196f8161fc0fa5a1450 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/70624 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Elyes Haouas --- src/soc/intel/baytrail/acpi/southcluster.asl | 4 ++-- src/soc/intel/braswell/acpi/southcluster.asl | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl index 3e4f8e2a15..31efcb9aeb 100644 --- a/src/soc/intel/baytrail/acpi/southcluster.asl +++ b/src/soc/intel/baytrail/acpi/southcluster.asl @@ -159,7 +159,7 @@ Method (_CRS, 0, Serialized) { Store (LPFW, LMIN) Store (0x00100000, LLEN) - Subtract (Add (LMIN, LLEN), One, LMAX) + Subtract (LMIN + LLEN, One, LMAX) } Else { @@ -238,7 +238,7 @@ Device (IOSF) Method (_CRS) { CreateDwordField (^RBUF, ^RBAR._BAS, RBAS) - Store (Add (CONFIG_ECAM_MMCONF_BASE_ADDRESS, 0xD0), RBAS) + Store (CONFIG_ECAM_MMCONF_BASE_ADDRESS + 0xD0, RBAS) Return (^RBUF) } } diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index 3b33a795a9..0a4dbd1e80 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -157,7 +157,7 @@ Method (_CRS, 0, Serialized) If (LAnd (LPFW != Zero, LPEN == One)) { Store (LPFW, LMIN) - Store (Add (LMIN, 0x001FFFFF), LMAX) + Store (LMIN + 0x001FFFFF, LMAX) Store (0x00200000, LLEN) } Else @@ -237,7 +237,7 @@ Device (IOSF) Method (_CRS) { CreateDwordField (^RBUF, ^RBAR._BAS, RBAS) - Store (Add (CONFIG_ECAM_MMCONF_BASE_ADDRESS, 0xD0), RBAS) + Store (CONFIG_ECAM_MMCONF_BASE_ADDRESS + 0xD0, RBAS) Return (^RBUF) } }