From fe481eb3e5e8e8d39d892bfcfe085bc7d49ff886 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 3 Aug 2019 21:28:40 +0300 Subject: [PATCH] northbridge/intel: Rename ram_calc.c to memmap.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use a name consistent with the more recent soc/intel. Change-Id: Ie69583f28f384eb49517203e1c3867f27e6272de Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34699 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/northbridge/intel/gm45/Makefile.inc | 6 +++--- src/northbridge/intel/gm45/{ram_calc.c => memmap.c} | 0 src/northbridge/intel/haswell/Makefile.inc | 6 +++--- src/northbridge/intel/haswell/{ram_calc.c => memmap.c} | 0 src/northbridge/intel/i440bx/Makefile.inc | 6 +++--- src/northbridge/intel/i440bx/{ram_calc.c => memmap.c} | 0 src/northbridge/intel/i945/Makefile.inc | 6 +++--- src/northbridge/intel/i945/{ram_calc.c => memmap.c} | 0 src/northbridge/intel/nehalem/Makefile.inc | 6 +++--- src/northbridge/intel/nehalem/{ram_calc.c => memmap.c} | 0 src/northbridge/intel/pineview/Makefile.inc | 6 +++--- src/northbridge/intel/pineview/{ram_calc.c => memmap.c} | 0 src/northbridge/intel/sandybridge/Makefile.inc | 6 +++--- src/northbridge/intel/sandybridge/{ram_calc.c => memmap.c} | 0 src/northbridge/intel/x4x/Makefile.inc | 6 +++--- src/northbridge/intel/x4x/{ram_calc.c => memmap.c} | 0 16 files changed, 24 insertions(+), 24 deletions(-) rename src/northbridge/intel/gm45/{ram_calc.c => memmap.c} (100%) rename src/northbridge/intel/haswell/{ram_calc.c => memmap.c} (100%) rename src/northbridge/intel/i440bx/{ram_calc.c => memmap.c} (100%) rename src/northbridge/intel/i945/{ram_calc.c => memmap.c} (100%) rename src/northbridge/intel/nehalem/{ram_calc.c => memmap.c} (100%) rename src/northbridge/intel/pineview/{ram_calc.c => memmap.c} (100%) rename src/northbridge/intel/sandybridge/{ram_calc.c => memmap.c} (100%) rename src/northbridge/intel/x4x/{ram_calc.c => memmap.c} (100%) diff --git a/src/northbridge/intel/gm45/Makefile.inc b/src/northbridge/intel/gm45/Makefile.inc index b59a7c3cd2..0ab1c94a27 100644 --- a/src/northbridge/intel/gm45/Makefile.inc +++ b/src/northbridge/intel/gm45/Makefile.inc @@ -25,18 +25,18 @@ romstage-y += pcie.c romstage-y += thermal.c romstage-y += igd.c romstage-y += pm.c -romstage-y += ram_calc.c +romstage-y += memmap.c romstage-y += iommu.c romstage-y += romstage.c ramstage-y += acpi.c -ramstage-y += ram_calc.c +ramstage-y += memmap.c ramstage-y += northbridge.c ramstage-y += gma.c smm-y += ../../../cpu/x86/lapic/apic_timer.c -postcar-y += ram_calc.c +postcar-y += memmap.c endif diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/memmap.c similarity index 100% rename from src/northbridge/intel/gm45/ram_calc.c rename to src/northbridge/intel/gm45/memmap.c diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc index ca1c04fa13..b9863367c9 100644 --- a/src/northbridge/intel/haswell/Makefile.inc +++ b/src/northbridge/intel/haswell/Makefile.inc @@ -17,14 +17,14 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_HASWELL),y) bootblock-y += bootblock.c -ramstage-y += ram_calc.c +ramstage-y += memmap.c ramstage-y += northbridge.c ramstage-y += gma.c ramstage-y += acpi.c ramstage-y += minihd.c -romstage-y += ram_calc.c +romstage-y += memmap.c romstage-y += raminit.c romstage-y += early_init.c romstage-y += report_platform.c @@ -37,6 +37,6 @@ mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) mrc.bin-position := 0xfffa0000 mrc.bin-type := mrc -postcar-y += ram_calc.c +postcar-y += memmap.c endif diff --git a/src/northbridge/intel/haswell/ram_calc.c b/src/northbridge/intel/haswell/memmap.c similarity index 100% rename from src/northbridge/intel/haswell/ram_calc.c rename to src/northbridge/intel/haswell/memmap.c diff --git a/src/northbridge/intel/i440bx/Makefile.inc b/src/northbridge/intel/i440bx/Makefile.inc index d41f65d755..2c503c63c1 100644 --- a/src/northbridge/intel/i440bx/Makefile.inc +++ b/src/northbridge/intel/i440bx/Makefile.inc @@ -17,12 +17,12 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I440BX),y) ramstage-y += northbridge.c -ramstage-y += ram_calc.c +ramstage-y += memmap.c romstage-y += raminit.c romstage-$(CONFIG_DEBUG_RAM_SETUP) += debug.c -romstage-y += ram_calc.c +romstage-y += memmap.c -postcar-y += ram_calc.c +postcar-y += memmap.c endif diff --git a/src/northbridge/intel/i440bx/ram_calc.c b/src/northbridge/intel/i440bx/memmap.c similarity index 100% rename from src/northbridge/intel/i440bx/ram_calc.c rename to src/northbridge/intel/i440bx/memmap.c diff --git a/src/northbridge/intel/i945/Makefile.inc b/src/northbridge/intel/i945/Makefile.inc index ffeabdc678..47b4c5166b 100644 --- a/src/northbridge/intel/i945/Makefile.inc +++ b/src/northbridge/intel/i945/Makefile.inc @@ -15,12 +15,12 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I945),y) -ramstage-y += ram_calc.c +ramstage-y += memmap.c ramstage-y += northbridge.c ramstage-y += gma.c ramstage-y += acpi.c -romstage-y += ram_calc.c +romstage-y += memmap.c romstage-y += raminit.c romstage-y += early_init.c romstage-y += errata.c @@ -29,6 +29,6 @@ romstage-y += rcven.c smm-y += udelay.c -postcar-y += ram_calc.c +postcar-y += memmap.c endif diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/memmap.c similarity index 100% rename from src/northbridge/intel/i945/ram_calc.c rename to src/northbridge/intel/i945/memmap.c diff --git a/src/northbridge/intel/nehalem/Makefile.inc b/src/northbridge/intel/nehalem/Makefile.inc index c0d46c9a0c..52374acee8 100644 --- a/src/northbridge/intel/nehalem/Makefile.inc +++ b/src/northbridge/intel/nehalem/Makefile.inc @@ -15,20 +15,20 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_NEHALEM),y) -ramstage-y += ram_calc.c +ramstage-y += memmap.c ramstage-y += northbridge.c ramstage-y += smi.c ramstage-y += gma.c ramstage-y += acpi.c -romstage-y += ram_calc.c +romstage-y += memmap.c romstage-y += raminit.c romstage-y += early_init.c romstage-y += ../../../arch/x86/walkcbfs.S smm-y += finalize.c -postcar-y += ram_calc.c +postcar-y += memmap.c endif diff --git a/src/northbridge/intel/nehalem/ram_calc.c b/src/northbridge/intel/nehalem/memmap.c similarity index 100% rename from src/northbridge/intel/nehalem/ram_calc.c rename to src/northbridge/intel/nehalem/memmap.c diff --git a/src/northbridge/intel/pineview/Makefile.inc b/src/northbridge/intel/pineview/Makefile.inc index 83487717df..81ee783304 100644 --- a/src/northbridge/intel/pineview/Makefile.inc +++ b/src/northbridge/intel/pineview/Makefile.inc @@ -19,16 +19,16 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_PINEVIEW),y) bootblock-y += ../../../cpu/x86/early_reset.S bootblock-y += bootblock.c -ramstage-y += ram_calc.c +ramstage-y += memmap.c ramstage-y += northbridge.c ramstage-y += gma.c ramstage-y += acpi.c romstage-y += romstage.c -romstage-y += ram_calc.c +romstage-y += memmap.c romstage-y += raminit.c romstage-y += early_init.c -postcar-y += ram_calc.c +postcar-y += memmap.c endif diff --git a/src/northbridge/intel/pineview/ram_calc.c b/src/northbridge/intel/pineview/memmap.c similarity index 100% rename from src/northbridge/intel/pineview/ram_calc.c rename to src/northbridge/intel/pineview/memmap.c diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index 8a0b67b2c9..77d1fdbb84 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -15,14 +15,14 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y) -ramstage-y += ram_calc.c +ramstage-y += memmap.c ramstage-y += northbridge.c ramstage-y += pcie.c ramstage-y += gma.c ramstage-y += acpi.c -romstage-y += ram_calc.c +romstage-y += memmap.c ramstage-y += common.c romstage-y += common.c @@ -48,6 +48,6 @@ romstage-y += ../../../arch/x86/walkcbfs.S smm-y += finalize.c -postcar-y += ram_calc.c +postcar-y += memmap.c endif diff --git a/src/northbridge/intel/sandybridge/ram_calc.c b/src/northbridge/intel/sandybridge/memmap.c similarity index 100% rename from src/northbridge/intel/sandybridge/ram_calc.c rename to src/northbridge/intel/sandybridge/memmap.c diff --git a/src/northbridge/intel/x4x/Makefile.inc b/src/northbridge/intel/x4x/Makefile.inc index 3118b0980e..b7fd2fe7ae 100644 --- a/src/northbridge/intel/x4x/Makefile.inc +++ b/src/northbridge/intel/x4x/Makefile.inc @@ -19,16 +19,16 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_X4X),y) romstage-y += early_init.c romstage-y += raminit.c romstage-y += raminit_ddr23.c -romstage-y += ram_calc.c +romstage-y += memmap.c romstage-y += rcven.c romstage-y += raminit_tables.c romstage-y += dq_dqs.c ramstage-y += acpi.c -ramstage-y += ram_calc.c +ramstage-y += memmap.c ramstage-y += gma.c ramstage-y += northbridge.c -postcar-y += ram_calc.c +postcar-y += memmap.c endif diff --git a/src/northbridge/intel/x4x/ram_calc.c b/src/northbridge/intel/x4x/memmap.c similarity index 100% rename from src/northbridge/intel/x4x/ram_calc.c rename to src/northbridge/intel/x4x/memmap.c