From fe514552dd72af2e855cf37eecd1ed59dd41ba61 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 28 Feb 2023 06:15:02 +0000 Subject: [PATCH] soc/intel: Update API name `pmc_send_bios_reset_pci_enum_done` This patch updates PMC API name from `pmc_send_pci_enum_done` to `pmc_send_bios_reset_pci_enum_done` to inform PMC IPC about BIOS done is also set along with PMC enumeration being done. BUG=b:270942083 TEST=Able to build and boot google/rex. Change-Id: I1cf8cb1ecadeb68c109be6b0e751a3f2c448ae4f Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/73332 Tested-by: build bot (Jenkins) Reviewed-by: Sukumar Ghorai Reviewed-by: Kapil Porwal --- src/soc/intel/alderlake/lockdown.c | 4 ++-- src/soc/intel/common/block/include/intelblocks/pmclib.h | 7 +++++-- src/soc/intel/common/block/pmc/pmclib.c | 4 +++- src/soc/intel/meteorlake/lockdown.c | 4 ++-- 4 files changed, 12 insertions(+), 7 deletions(-) diff --git a/src/soc/intel/alderlake/lockdown.c b/src/soc/intel/alderlake/lockdown.c index c291e34331..59fa065b3d 100644 --- a/src/soc/intel/alderlake/lockdown.c +++ b/src/soc/intel/alderlake/lockdown.c @@ -38,8 +38,8 @@ static void pmc_lockdown_cfg(int chipset_lockdown) PM_CFG_XRAM_READ_DISABLE); } - /* Send PMC IPC to inform about PCI enumeration done */ - pmc_send_pci_enum_done(); + /* Send PMC IPC to inform about both BIOS Reset and PCI enumeration done */ + pmc_send_bios_reset_pci_enum_done(); } static void pch_lockdown_cfg(void) diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h index 11ab86d47a..d3485a5998 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmclib.h +++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h @@ -28,8 +28,11 @@ enum pch_pmc_xtal { */ enum pch_pmc_xtal pmc_get_xtal_freq(void); -/* pmc_send_pci_enum_done() - send PMC IPC to inform PCI enumeration is done. */ -void pmc_send_pci_enum_done(void); +/* + * pmc_send_pci_enum_done() - send PMC IPC to inform both BIOS Reset + * and PCI enumeration is done. + */ +void pmc_send_bios_reset_pci_enum_done(void); /* Forward declare the power state struct here */ struct chipset_power_state; diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c index 0b041cfe2f..5a8cd3b7b7 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -24,6 +24,7 @@ #define PMC_IPC_BIOS_RST_COMPLETE 0xd0 #define PMC_IPC_BIOS_RST_SUBID_PCI_ENUM_DONE 0 +#define PMC_IPC_BIOS_RST_CMPL_STS_PCI_ENUM BIT(0) static struct chipset_power_state power_state; @@ -854,12 +855,13 @@ enum pch_pmc_xtal pmc_get_xtal_freq(void) } } -void pmc_send_pci_enum_done(void) +void pmc_send_bios_reset_pci_enum_done(void) { struct pmc_ipc_buffer req = { 0 }; struct pmc_ipc_buffer rsp; uint32_t cmd; + req.buf[0] = PMC_IPC_BIOS_RST_CMPL_STS_PCI_ENUM; cmd = pmc_make_ipc_cmd(PMC_IPC_BIOS_RST_COMPLETE, PMC_IPC_BIOS_RST_SUBID_PCI_ENUM_DONE, 0); if (pmc_send_ipc_cmd(cmd, &req, &rsp) != CB_SUCCESS) diff --git a/src/soc/intel/meteorlake/lockdown.c b/src/soc/intel/meteorlake/lockdown.c index b4ccbaba6d..324c37ba38 100644 --- a/src/soc/intel/meteorlake/lockdown.c +++ b/src/soc/intel/meteorlake/lockdown.c @@ -32,8 +32,8 @@ static void pmc_lockdown_cfg(int chipset_lockdown) PM_CFG_XRAM_READ_DISABLE); } - /* Send PMC IPC to inform about PCI enumeration done */ - pmc_send_pci_enum_done(); + /* Send PMC IPC to inform about both BIOS Reset and PCI enumeration done */ + pmc_send_bios_reset_pci_enum_done(); } static void soc_die_lockdown_cfg(void)