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mb/supermicro/x11ssh-tf: Drop `PcieRpClkReqSupport` lines 

They default to zero already, so we might as well drop them.

Tested with BUILD_TIMELESS=1, its coreboot.rom does not change.

Change-Id: I3c04240b270f51d584f879e1344301679f133fdb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43928
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-07-26 21:40:49 +02:00
parent aaf5b09a5a
commit fe6526512a
1 changed files with 0 additions and 4 deletions
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4
src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb
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@ -14,19 +14,15 @@ chip soc/intel/skylake
# PCIe configuration # PCIe configuration
# Enable JPCIE1 # Enable JPCIE1
register "PcieRpEnable[0]" = "1" register "PcieRpEnable[0]" = "1"
register "PcieRpClkReqSupport[0]" = "0"
# Enable ASpeed PCI bridge # Enable ASpeed PCI bridge
register "PcieRpEnable[2]" = "1" register "PcieRpEnable[2]" = "1"
register "PcieRpClkReqSupport[2]" = "0"
# Enable X550T (10GbE) # Enable X550T (10GbE)
register "PcieRpEnable[4]" = "1" register "PcieRpEnable[4]" = "1"
register "PcieRpClkReqSupport[4]" = "0"
# Enable M.2 # Enable M.2
register "PcieRpEnable[8]" = "1" register "PcieRpEnable[8]" = "1"
register "PcieRpClkReqSupport[8]" = "0"
# FIXME: find out why FSP crashes without this # FIXME: find out why FSP crashes without this
register "PchHdaVcType" = "Vc1" register "PchHdaVcType" = "Vc1"