mb/google/guybrush: Migrate guybrush to use SPD files under spd/

SPD files are being moved from the soc and mainboard directories to a
centralised spd/ directory. This change migrates all guybrush variants
to use this new location. The contents of the new SPDs are identical,
only their file paths have changed.

The variant Makefile.inc and dram_id.generated.txt files were generated
using the part_id_gen tool. E.g. for guybrush:

util/spd_tools/bin/part_id_gen \
  CZN \
  lp4x \
  src/mainboard/google/guybrush/variants/guybrush/memory \
  src/mainboard/google/guybrush/variants/guybrush/memory/mem_list_variant.txt

For dewatt, the Makefile.inc was manually modified to use the new
placeholder value.

BUG=b:191776301
TEST=Check that each variant's coreboot.rom is the same with and without
this change. Built using:
abuild -p none -t google/guybrush -a -x --timeless

Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: I48ca430b80b892d68dad582b1d9937a9edafa5d4
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Reka Norman 2021-09-17 12:44:05 +10:00 committed by Patrick Georgi
parent ad3962a21b
commit fe9fc6feed
18 changed files with 28 additions and 391 deletions

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@ -25,4 +25,4 @@ subdirs-y += variants/$(VARIANT_DIR)
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
LIB_SPD_DEPS = $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f)) LIB_SPD_DEPS = $(SPD_SOURCES)

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@ -1,24 +0,0 @@
H9HCNNNBKMMLXR-NEE,lp4x-spd-1.hex
H9HCNNNFAMMLXR-NEE,lp4x-spd-2.hex
K4U6E3S4AA-MGCL,lp4x-spd-1.hex
K4UBE3D4AA-MGCL,lp4x-spd-3.hex
MT53E1G32D2NP-046 WT:A,lp4x-spd-4.hex
MT53E1G32D2NP-046 WT:B,lp4x-spd-3.hex
H9HKNNNCRMBVAR-NEH,lp4x-spd-5.hex
MT53E1G64D4SQ-046 WT:A,lp4x-spd-6.hex
MT53E512M32D2NP-046 WT:F,lp4x-spd-1.hex
NT6AP256T32AV-J2,lp4x-spd-7.hex
K4U6E3S4AA-MGCR,lp4x-spd-1.hex
MT53E512M32D2NP-046 WT:E,lp4x-spd-1.hex
H9HCNNNCPMMLXR-NEE,lp4x-spd-3.hex
K4UBE3D4AA-MGCR,lp4x-spd-3.hex
MT53E512M64D4NW-046 WT:E,lp4x-spd-5.hex
MT53E1G64D8NW-046 WT:E,lp4x-spd-8.hex
H9HCNNNCRMBLPR-NEE,lp4x-spd-5.hex
H9HCNNNFBMBLPR-NEE,lp4x-spd-8.hex
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MT53D512M64D4NW-046 WT:F,lp4x-spd-5.hex
NT6AP256T32AV-J1,lp4x-spd-9.hex
MT53E1G32D4NQ-046 WT:E,lp4x-spd-3.hex
MT53E2G32D4NQ-046 WT:A,lp4x-spd-10.hex
MT53E512M32D1NP-046 WT:B,lp4x-spd-1.hex

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@ -1,32 +0,0 @@
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@ -2,4 +2,4 @@
## This is an auto-generated file. Do not edit!! ## This is an auto-generated file. Do not edit!!
## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. ## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
SPD_SOURCES = placeholder.spd.hex SPD_SOURCES = placeholder

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@ -1,8 +1,10 @@
## SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!! # This is an auto-generated file. Do not edit!!
# Generated by:
# util/spd_tools/bin/part_id_gen CZN lp4x src/mainboard/google/guybrush/variants/guybrush/memory src/mainboard/google/guybrush/variants/guybrush/memory/mem_list_variant.txt
SPD_SOURCES = SPD_SOURCES =
SPD_SOURCES += lp4x-spd-4.hex # ID = 0(0b0000) Parts = MT53E1G32D2NP-046 WT:A SPD_SOURCES += spd/lp4x/set-1/spd-4.hex # ID = 0(0b0000) Parts = MT53E1G32D2NP-046 WT:A
SPD_SOURCES += lp4x-spd-1.hex # ID = 1(0b0001) Parts = MT53E512M32D2NP-046 WT:F, H9HCNNNBKMMLXR-NEE SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 1(0b0001) Parts = MT53E512M32D2NP-046 WT:F, H9HCNNNBKMMLXR-NEE
SPD_SOURCES += lp4x-spd-9.hex # ID = 2(0b0010) Parts = NT6AP256T32AV-J1 SPD_SOURCES += spd/lp4x/set-1/spd-9.hex # ID = 2(0b0010) Parts = NT6AP256T32AV-J1
SPD_SOURCES += lp4x-spd-3.hex # ID = 3(0b0011) Parts = MT53E1G32D2NP-046 WT:B SPD_SOURCES += spd/lp4x/set-1/spd-3.hex # ID = 3(0b0011) Parts = MT53E1G32D2NP-046 WT:B

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# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Generated by:
# util/spd_tools/bin/part_id_gen CZN lp4x src/mainboard/google/guybrush/variants/guybrush/memory src/mainboard/google/guybrush/variants/guybrush/memory/mem_list_variant.txt
DRAM Part Name ID to assign DRAM Part Name ID to assign
MT53E1G32D2NP-046 WT:A 0 (0000) MT53E1G32D2NP-046 WT:A 0 (0000)
MT53E512M32D2NP-046 WT:F 1 (0001) MT53E512M32D2NP-046 WT:F 1 (0001)

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## SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!! # This is an auto-generated file. Do not edit!!
## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. # Generated by:
# util/spd_tools/bin/part_id_gen CZN lp4x src/mainboard/google/guybrush/variants/nipperkin/memory src/mainboard/google/guybrush/variants/nipperkin/memory/mem_list_variant.txt
SPD_SOURCES = SPD_SOURCES =
SPD_SOURCES += lp4x-spd-4.hex # ID = 0(0b0000) Parts = MT53E1G32D2NP-046 WT:A SPD_SOURCES += spd/lp4x/set-1/spd-4.hex # ID = 0(0b0000) Parts = MT53E1G32D2NP-046 WT:A
SPD_SOURCES += lp4x-spd-1.hex # ID = 1(0b0001) Parts = MT53E512M32D2NP-046 WT:F, H9HCNNNBKMMLXR-NEE, MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 1(0b0001) Parts = MT53E512M32D2NP-046 WT:F, H9HCNNNBKMMLXR-NEE, MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR
SPD_SOURCES += lp4x-spd-9.hex # ID = 2(0b0010) Parts = NT6AP256T32AV-J1 SPD_SOURCES += spd/lp4x/set-1/spd-9.hex # ID = 2(0b0010) Parts = NT6AP256T32AV-J1
SPD_SOURCES += lp4x-spd-3.hex # ID = 3(0b0011) Parts = MT53E1G32D2NP-046 WT:B, H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR SPD_SOURCES += spd/lp4x/set-1/spd-3.hex # ID = 3(0b0011) Parts = MT53E1G32D2NP-046 WT:B, H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR

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# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Generated by:
# util/spd_tools/bin/part_id_gen CZN lp4x src/mainboard/google/guybrush/variants/nipperkin/memory src/mainboard/google/guybrush/variants/nipperkin/memory/mem_list_variant.txt
DRAM Part Name ID to assign DRAM Part Name ID to assign
MT53E1G32D2NP-046 WT:A 0 (0000) MT53E1G32D2NP-046 WT:A 0 (0000)
MT53E512M32D2NP-046 WT:F 1 (0001) MT53E512M32D2NP-046 WT:F 1 (0001)