vortex86ex: Change PCI S/B resource reservation functions for more I/O devices.
Originally, Vortex86EX PCI S/B internal resource reservation functions can only support one big legacy I/O device space (0-0xfff). Change function signature to support other non-legacy I/O device space in the future. Change-Id: I22f5c877ed441d59f29801d925ee40b24fb796ce Signed-off-by: Andrew Wu <arw@dmp.com.tw> Reviewed-on: http://review.coreboot.org/3976 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -505,21 +505,21 @@ static void fix_cmos_rtc_time(void)
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}
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}
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static void vortex86_sb_set_io_resv(device_t dev, u32 io_resv_size)
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static void vortex86_sb_set_io_resv(device_t dev, unsigned index, u32 base, u32 size)
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{
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struct resource *res;
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res = new_resource(dev, 1);
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res->base = 0x0UL;
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res->size = io_resv_size;
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res = new_resource(dev, index);
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res->base = base;
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res->size = size;
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res->limit = 0xffffUL;
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res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
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}
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static void vortex86_sb_set_spi_flash_size(device_t dev, u32 flash_size)
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static void vortex86_sb_set_spi_flash_size(device_t dev, unsigned index, u32 flash_size)
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{
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/* SPI flash is in topmost of 4G memory space */
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struct resource *res;
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res = new_resource(dev, 2);
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res = new_resource(dev, index);
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res->base = 0x100000000LL - flash_size;
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res->size = flash_size;
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res->limit = 0xffffffffUL;
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@ -542,11 +542,11 @@ static void vortex86_sb_read_resources(device_t dev)
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flash_size = 64 * 1024 * 1024;
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}
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/* Reserve space for I/O */
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vortex86_sb_set_io_resv(dev, 0x1000UL);
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/* Reserve space for legacy I/O */
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vortex86_sb_set_io_resv(dev, 1, 0, 0x1000UL);
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/* Reserve space for flash */
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vortex86_sb_set_spi_flash_size(dev, flash_size);
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vortex86_sb_set_spi_flash_size(dev, 2, flash_size);
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}
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static void southbridge_init_func1(struct device *dev)
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