diff --git a/src/mainboard/amd/majolica/devicetree.cb b/src/mainboard/amd/majolica/devicetree.cb
index dc73b844d0..5e9d971b9e 100644
--- a/src/mainboard/amd/majolica/devicetree.cb
+++ b/src/mainboard/amd/majolica/devicetree.cb
@@ -13,6 +13,12 @@ chip soc/amd/cezanne
 		.flash_ch_en = 0,
 	}"
 
+	# I2C Pad Control RX Select Configuration
+	register "i2c_pad_ctrl_rx_sel[0]" = "I2C_PAD_CTRL_RX_SEL_3_3V"
+	register "i2c_pad_ctrl_rx_sel[1]" = "I2C_PAD_CTRL_RX_SEL_3_3V"
+	register "i2c_pad_ctrl_rx_sel[2]" = "I2C_PAD_CTRL_RX_SEL_3_3V"
+	register "i2c_pad_ctrl_rx_sel[3]" = "I2C_PAD_CTRL_RX_SEL_3_3V"
+
 	register "s0ix_enable" = "true"
 
 	register "pspp_policy" = "DXIO_PSPP_BALANCED"
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
index c778914b6a..2c0c5d97c4 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -51,6 +51,11 @@ chip soc/amd/cezanne
 
 	register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
 					GPIO_I2C2_SCL | GPIO_I2C3_SCL"
+	# I2C Pad Control RX Select Configuration
+	register "i2c_pad_ctrl_rx_sel[0]" = "I2C_PAD_CTRL_RX_SEL_3_3V" # Trackpad
+	register "i2c_pad_ctrl_rx_sel[1]" = "I2C_PAD_CTRL_RX_SEL_3_3V" # Touchscreen
+	register "i2c_pad_ctrl_rx_sel[2]" = "I2C_PAD_CTRL_RX_SEL_3_3V" # Audio/SAR
+	register "i2c_pad_ctrl_rx_sel[3]" = "I2C_PAD_CTRL_RX_SEL_1_8V" # GSC
 
 	register "pspp_policy" = "DXIO_PSPP_POWERSAVE"
 
diff --git a/src/soc/amd/cezanne/chip.h b/src/soc/amd/cezanne/chip.h
index df2059a260..319ce4108e 100644
--- a/src/soc/amd/cezanne/chip.h
+++ b/src/soc/amd/cezanne/chip.h
@@ -14,6 +14,7 @@ struct soc_amd_cezanne_config {
 	struct soc_amd_common_config common_config;
 	u8 i2c_scl_reset;
 	struct dw_i2c_bus_config i2c[I2C_CTRLR_COUNT];
+	u8 i2c_pad_ctrl_rx_sel[I2C_CTRLR_COUNT];
 
 	/* Enable S0iX support */
 	bool s0ix_enable;
diff --git a/src/soc/amd/cezanne/i2c.c b/src/soc/amd/cezanne/i2c.c
index 6571ff50bd..008b26190b 100644
--- a/src/soc/amd/cezanne/i2c.c
+++ b/src/soc/amd/cezanne/i2c.c
@@ -37,9 +37,13 @@ __weak void mainboard_i2c_override(int bus, uint32_t *pad_settings) { }
 
 void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
 {
+	const struct soc_amd_cezanne_config *config = config_of_soc();
 	uint32_t pad_ctrl;
 	int misc_reg;
 
+	if (bus >= ARRAY_SIZE(config->i2c_pad_ctrl_rx_sel))
+		return;
+
 	misc_reg = MISC_I2C0_PAD_CTRL + sizeof(uint32_t) * bus;
 	pad_ctrl = misc_read32(misc_reg);
 
@@ -47,7 +51,7 @@ void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
 	pad_ctrl |= I2C_PAD_CTRL_NG_NORMAL;
 
 	pad_ctrl &= ~I2C_PAD_CTRL_RX_SEL_MASK;
-	pad_ctrl |= I2C_PAD_CTRL_RX_SEL_3_3V;
+	pad_ctrl |= config->i2c_pad_ctrl_rx_sel[bus];
 
 	pad_ctrl &= ~I2C_PAD_CTRL_FALLSLEW_MASK;
 	pad_ctrl |= cfg->speed == I2C_SPEED_STANDARD ?