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google/reef: Add GPIO changes to assert SLP_S0/Reset signal 

PMIC/PMU: Set the iosstates for PMIC to assert the reset
signal, PMU to assert SLP_S0 signal.

Change-Id: If5a6a1cb8f065a8c3a6a19d9441a21d60b39e579
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Signed-off-by: Shankar, Vaibhav <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/16031
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Shankar, Vaibhav 2016-08-02 10:04:17 -07:00 committed by Aaron Durbin
parent d03596f4ca
commit fec95be8b6
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/reef/gpio.h
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@ -152,7 +152,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(PMU_PLTRST_B, NONE, DEEP, NF1), /* PMU_PLTRST_N */
PAD_CFG_NF(PMU_PWRBTN_B, UP_20K, DEEP, NF1), /* PMU_PWRBTN_N */
PAD_CFG_NF(PMU_RESETBUTTON_B, NONE, DEEP, NF1), /* PMU_RSTBTN_N */
PAD_CFG_NF(PMU_SLP_S0_B, NONE, DEEP, NF1), /* PMU_SLP_S0_N */
PAD_CFG_NF_IOSSTATE(PMU_SLP_S0_B, NONE, DEEP, NF1, IGNORE), /* PMU_SLP_S0_N */
PAD_CFG_NF(PMU_SLP_S3_B, NONE, DEEP, NF1), /* PMU_SLP_S3_N */
PAD_CFG_NF(PMU_SLP_S4_B, NONE, DEEP, NF1), /* PMU_SLP_S4_N */
PAD_CFG_NF(PMU_SUSCLK, NONE, DEEP, NF1), /* PMU_SUSCLK */
@ -200,7 +200,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(PMC_SPI_CLK, UP_20K, DEEP),
/* PMIC Signals Unused signals related to an old PMIC interface */
PAD_CFG_GPI(PMIC_RESET_B, NONE, DEEP), /* unused external pull */
PAD_CFG_NF_IOSSTATE(PMIC_RESET_B, NATIVE, DEEP, NF1, IGNORE), /* PMIC_RESET_B */
PAD_CFG_GPI(GPIO_213, NONE, DEEP), /* unused external pull */
PAD_CFG_GPI(GPIO_214, UP_20K, DEEP), /* unused */
PAD_CFG_GPI(GPIO_215, UP_20K, DEEP), /* unused */