Auto-declare chip_operations

The name is derived directly from the device path.

Change-Id: If2053d14f0e38a5ee0159b47a66d45ff3dff649a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1471
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
This commit is contained in:
Kyösti Mälkki 2012-08-21 11:37:11 +03:00 committed by Anton Kochkov
parent 0d5d70b79a
commit fee73df07a
179 changed files with 8 additions and 326 deletions

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_agesa_family10_ops;
struct cpu_amd_agesa_family10_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_agesa_family12_ops;
struct cpu_amd_agesa_family12_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_agesa_family14_ops;
struct cpu_amd_agesa_family14_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_agesa_family15_ops;
struct cpu_amd_agesa_family15_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_agesa_family15tn_ops;
struct cpu_amd_agesa_family15tn_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_amd_sc520_ops;
struct cpu_amd_sc520_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_amd_socket_754_ops;
struct cpu_amd_socket_754_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_amd_socket_939_ops;
struct cpu_amd_socket_939_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_amd_socket_940_ops;
struct cpu_amd_socket_940_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_amd_socket_AM2_ops;
struct cpu_amd_socket_AM2_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_socket_AM2r2_ops;
struct cpu_amd_socket_AM2r2_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_socket_AM3_ops;
struct cpu_amd_socket_AM3_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_socket_ASB2_ops;
struct cpu_amd_socket_ASB2_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_socket_C32_ops;
struct cpu_amd_socket_C32_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_amd_socket_F_ops;
struct cpu_amd_socket_F_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_socket_F_1207_ops;
struct cpu_amd_socket_F_1207_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_amd_socket_S1G1_ops;
struct cpu_amd_socket_S1G1_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_intel_ep80579_ops;
struct cpu_intel_ep80579_config {
};

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@ -17,8 +17,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_intel_model_206ax_ops;
/* Magic value used to locate this chip in the device tree */
#define SPEEDSTEP_APIC_MAGIC 0xACAC

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@ -18,7 +18,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_intel_slot_1_ops;
struct cpu_intel_slot_1_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_slot_2_ops;
struct cpu_intel_slot_2_config {
};

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@ -17,7 +17,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_intel_socket_441_ops;
struct cpu_intel_socket_441_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_BGA956_ops;
struct cpu_intel_socket_BGA956_config {
};

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@ -18,7 +18,5 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_intel_socket_FC_PGA370_ops;
struct cpu_intel_socket_FC_PGA370_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_LGA771_ops;
struct cpu_intel_socket_LGA771_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_PGA370_ops;
struct cpu_intel_socket_PGA370_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_mFCBGA479_ops;
struct cpu_intel_socket_mFCBGA479_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_mFCPGA478_ops;
struct cpu_intel_socket_mFCPGA478_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_mPGA478_ops;
struct cpu_intel_socket_mPGA478_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_mPGA479M_ops;
struct cpu_intel_socket_mPGA479M_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_mPGA603_ops;
struct cpu_intel_socket_mPGA603_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_mPGA604_ops;
struct cpu_intel_socket_mPGA604_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations cpu_intel_socket_rPGA989_ops;
struct cpu_intel_socket_rPGA989_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations drivers_generic_debug_ops;
struct drivers_generic_debug_config {
};

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@ -20,7 +20,6 @@
#ifndef DRIVERS_GENERIC_IOAPIC_CHIP_H
#define DRIVERS_GENERIC_IOAPIC_CHIP_H
extern struct chip_operations drivers_generic_ioapic_ops;
struct drivers_generic_ioapic_config {
u32 version;
u8 apicid;

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@ -1,4 +1,2 @@
extern struct chip_operations drivers_i2c_adm1026_ops;
struct drivers_i2c_adm1026_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations drivers_i2c_adm1027_ops;
struct drivers_i2c_adm1027_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations drivers_i2c_adt7463_ops;
struct drivers_i2c_adt7463_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations drivers_i2c_i2cmux_ops;
struct drivers_i2c_i2cmux_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations drivers_i2c_i2cmux2_ops;
struct drivers_i2c_i2cmux2_config {
};

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@ -1,4 +1,2 @@
extern struct chip_operations drivers_i2c_lm63_ops;
struct drivers_i2c_lm63_config {
};

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@ -1,5 +1,3 @@
extern struct chip_operations drivers_i2c_w83793_ops;
struct drivers_i2c_w83793_config {
u8 mfc;
u8 fanin;

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@ -1,4 +1,2 @@
extern struct chip_operations drivers_i2c_w83795_ops;
struct drivers_i2c_w83795_config {
};

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@ -19,8 +19,6 @@
* MA 02110-1301 USA
*/
extern struct chip_operations drivers_ics_954309_ops;
struct drivers_ics_954309_config {
u8 reg0;
u8 reg1;

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@ -20,7 +20,6 @@
#ifndef EC_LENOVO_H8EC_CHIP_H
#define EC_LENOVO_H8EC_CHIP_H
extern struct chip_operations ec_lenovo_h8_ops;
struct ec_lenovo_h8_config {
u8 config0;

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@ -20,8 +20,6 @@
#ifndef EC_LENOVO_PMH7_CHIP_H
#define EC_LENOVO_PMH7_CHIP_H
extern struct chip_operations ec_lenovo_pmh7_ops;
struct ec_lenovo_pmh7_config {
int backlight_enable:1;
int dock_event_enable:1;

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@ -27,7 +27,4 @@ struct ec_smsc_mec1308_config
u16 mailbox_port;
};
struct chip_operations;
extern struct chip_operations ec_smsc_mec1308_ops;
#endif /* _EC_SMSC_MEC1308_CHIP_H */

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@ -1,4 +1,2 @@
struct mainboard_emulation_qemu_x86_config {};
extern struct chip_operations mainboard_emulation_qemu_x86_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family10_config
{
};
extern struct chip_operations northbridge_amd_agesa_family10_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family10_root_complex_config
{
};
extern struct chip_operations northbridge_amd_agesa_family10_root_complex_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family12_config
{
};
extern struct chip_operations northbridge_amd_agesa_family12_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family12_root_complex_config
{
};
extern struct chip_operations northbridge_amd_agesa_family12_root_complex_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family14_config
{
};
extern struct chip_operations northbridge_amd_agesa_family14_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family14_root_complex_config
{
};
extern struct chip_operations northbridge_amd_agesa_family14_root_complex_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family15_config
{
};
extern struct chip_operations northbridge_amd_agesa_family15_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family15_root_complex_config
{
};
extern struct chip_operations northbridge_amd_agesa_family15_root_complex_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family15tn_config
{
};
extern struct chip_operations northbridge_amd_agesa_family15tn_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family15tn_root_complex_config
{
};
extern struct chip_operations northbridge_amd_agesa_family15tn_root_complex_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_amdfam10_config
{
};
extern struct chip_operations northbridge_amd_amdfam10_ops;

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@ -21,4 +21,3 @@ struct northbridge_amd_amdfam10_root_complex_config
{
};
extern struct chip_operations northbridge_amd_amdfam10_root_complex_ops;

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@ -2,4 +2,3 @@ struct northbridge_amd_amdk8_config
{
};
extern struct chip_operations northbridge_amd_amdk8_ops;

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@ -2,4 +2,3 @@ struct northbridge_amd_amdk8_root_complex_config
{
};
extern struct chip_operations northbridge_amd_amdk8_root_complex_ops;

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@ -17,12 +17,9 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _CIMX_RD890_CHIP_H_
#define _CIMX_RD890_CHIP_H_
extern struct chip_operations northbridge_amd_cimx_rd890_ops;
/**
* RD890 specific device configuration
*/

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@ -2,4 +2,3 @@ struct northbridge_amd_gx1_config
{
};
extern struct chip_operations northbridge_amd_gx1_ops;

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@ -22,4 +22,3 @@ struct northbridge_amd_gx2_config
};
extern struct chip_operations northbridge_amd_gx2_ops;

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@ -21,4 +21,3 @@
struct northbridge_amd_lx_config {
};
extern struct chip_operations northbridge_amd_lx_ops;

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@ -2,4 +2,3 @@ struct northbridge_intel_e7501_config
{
};
extern struct chip_operations northbridge_intel_e7501_ops;

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@ -2,5 +2,3 @@ struct northbridge_intel_e7505_config
{
};
extern struct chip_operations northbridge_intel_e7505_ops;

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@ -4,4 +4,3 @@ struct northbridge_intel_e7520_config
unsigned int intrline;
};
extern struct chip_operations northbridge_intel_e7520_ops;

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@ -4,4 +4,3 @@ struct northbridge_intel_e7525_config
unsigned int intrline;
};
extern struct chip_operations northbridge_intel_e7525_ops;

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@ -23,4 +23,3 @@ struct northbridge_intel_i3100_config
u16 intrline;
};
extern struct chip_operations northbridge_intel_i3100_ops;

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@ -22,4 +22,3 @@ struct northbridge_intel_i440bx_config
{
};
extern struct chip_operations northbridge_intel_i440bx_ops;

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@ -22,4 +22,3 @@ struct northbridge_intel_i440lx_config
{
};
extern struct chip_operations northbridge_intel_i440lx_ops;

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@ -20,4 +20,3 @@
struct northbridge_intel_i5000_config {
};
extern struct chip_operations northbridge_intel_i5000_ops;

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@ -21,4 +21,3 @@
struct northbridge_intel_i82810_config {
};
extern struct chip_operations northbridge_intel_i82810_ops;

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@ -21,4 +21,3 @@
struct northbridge_intel_i82830_config {
};
extern struct chip_operations northbridge_intel_i82830_ops;

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@ -22,4 +22,3 @@ struct northbridge_intel_i855_config
{
};
extern struct chip_operations northbridge_intel_i855_ops;

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@ -20,4 +20,3 @@
struct northbridge_intel_i945_config {
};
extern struct chip_operations northbridge_intel_i945_ops;

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@ -40,4 +40,3 @@ struct northbridge_intel_sandybridge_config {
u32 gpu_pch_backlight; /* PCH Backlight PWM value */
};
extern struct chip_operations northbridge_intel_sandybridge_ops;

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@ -20,4 +20,3 @@
struct northbridge_intel_sch_config {
};
extern struct chip_operations northbridge_intel_sch_ops;

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@ -21,4 +21,3 @@
struct northbridge_rdc_r8610_config {
};
extern struct chip_operations northbridge_rdc_r8610_ops;

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@ -21,4 +21,3 @@
struct northbridge_via_cn400_config {
};
extern struct chip_operations northbridge_via_cn400_ops;

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@ -21,4 +21,3 @@
struct northbridge_via_cn700_config {
};
extern struct chip_operations northbridge_via_cn700_ops;

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@ -20,4 +20,3 @@
struct northbridge_via_cx700_config {
};
extern struct chip_operations northbridge_via_cx700_ops;

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@ -2,4 +2,3 @@ struct northbridge_via_vt8601_config
{
};
extern struct chip_operations northbridge_via_vt8601_ops;

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@ -2,4 +2,3 @@ struct northbridge_via_vt8623_config
{
};
extern struct chip_operations northbridge_via_vt8623_ops;

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@ -20,4 +20,3 @@
struct northbridge_via_vx800_config {
};
extern struct chip_operations northbridge_via_vx800_ops;

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@ -30,7 +30,5 @@ struct southbridge_amd_agesa_hudson_config
u8 gpp_configuration;
#endif
};
struct chip_operations;
extern struct chip_operations southbridge_amd_agesa_hudson_ops;
#endif /* HUDSON_CHIP_H */

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@ -8,7 +8,4 @@ struct southbridge_amd_amd8111_config
unsigned int phy_lowreset : 1;
};
struct chip_operations;
extern struct chip_operations southbridge_amd_amd8111_ops;
#endif /* AMD8111_CHIP_H */

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@ -20,8 +20,6 @@
#ifndef _CIMX_SB700_CHIP_H_
#define _CIMX_SB700_CHIP_H_
extern struct chip_operations southbridge_amd_cimx_sb700_ops;
/*
* configuration set in mainboard/devicetree.cb
* boot_switch_sata_ide:

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@ -20,8 +20,6 @@
#ifndef _CIMX_SB800_CHIP_H_
#define _CIMX_SB800_CHIP_H_
extern struct chip_operations southbridge_amd_cimx_sb800_ops;
/*
* configuration set in mainboard/devicetree.cb
* boot_switch_sata_ide:

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@ -20,8 +20,6 @@
#ifndef _CIMX_SB900_CHIP_H_
#define _CIMX_SB900_CHIP_H_
extern struct chip_operations southbridge_amd_cimx_sb900_ops;
/*
* configuration set in mainboard/devicetree.cb
* boot_switch_sata_ide:

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@ -21,8 +21,6 @@
#ifndef SOUTHBRIDGE_AMD_CS5530_CHIP_H
#define SOUTHBRIDGE_AMD_CS5530_CHIP_H
extern struct chip_operations southbridge_amd_cs5530_ops;
struct southbridge_amd_cs5530_config {
int ide0_enable:1;
int ide1_enable:1;

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@ -1,8 +1,6 @@
#ifndef _SOUTHBRIDGE_AMD_CS5535
#define _SOUTHBRIDGE_AMD_CS5535
extern struct chip_operations southbridge_amd_cs5535_ops;
struct southbridge_amd_cs5535_config {
int setupflash;
};

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@ -23,8 +23,6 @@
#define MAX_UNWANTED_VPCI 8 /* increase if needed */
extern struct chip_operations southbridge_amd_cs5536_ops;
struct southbridge_amd_cs5536_config {
unsigned int lpc_serirq_enable; /* interrupt enables for LPC bus; each bit is an irq 0-15 */
unsigned int lpc_serirq_polarity; /* LPC IRQ polarity; each bit is an irq 0-15 */

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@ -33,7 +33,5 @@ struct southbridge_amd_rs690_config
u8 gfx_reconfiguration; /* Dynamic Lind Width Control */
u8 gfx_link_width; /* Desired width of lane 2 */
};
struct chip_operations;
extern struct chip_operations southbridge_amd_rs690_ops;
#endif /* RS690_CHIP_H */

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@ -36,7 +36,5 @@ struct southbridge_amd_rs780_config
u8 gfx_pcie_config; /* GFX PCIE Modes */
u8 gfx_ddi_config; /* GFX DDI Modes */
};
struct chip_operations;
extern struct chip_operations southbridge_amd_rs780_ops;
#endif /* RS780_CHIP_H */

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@ -24,7 +24,5 @@ struct southbridge_amd_sb600_config
{
u32 hda_viddid;
};
struct chip_operations;
extern struct chip_operations southbridge_amd_sb600_ops;
#endif /* SB600_CHIP_H */

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@ -24,7 +24,5 @@ struct southbridge_amd_sb700_config
{
u32 boot_switch_sata_ide : 1;
};
struct chip_operations;
extern struct chip_operations southbridge_amd_sb700_ops;
#endif /* SB700_CHIP_H */

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@ -28,7 +28,5 @@ struct southbridge_amd_sb800_config
u32 hda_viddid;
u8 gpp_configuration;
};
struct chip_operations;
extern struct chip_operations southbridge_amd_sb800_ops;
#endif /* SB800_CHIP_H */

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