From fef762f613ed06c9b0342cc6a0314542694304a0 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Thu, 29 Jun 2023 11:46:05 +0200 Subject: [PATCH] mb/siemens/mc_apl1: Fix wrong register masking With the previous instruction the complete register was set to '0'. Correctly, only the bits 23:16 must be masked. Change-Id: Idd6e70dcb42c69cf3bc5d36db993e6def52eba58 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/76177 Reviewed-by: Eric Lai Reviewed-by: Felix Singer Tested-by: build bot (Jenkins) Reviewed-by: Jan Samek --- src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c index b7b997b5cc..8490ddc6a7 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c @@ -12,6 +12,7 @@ #include #define TX_DWORD3_P1 0xa8c +#define TX_SWING_MASK 0x00ff0000 void variant_mainboard_final(void) { @@ -42,10 +43,10 @@ void variant_mainboard_final(void) /* * Correct the SATA transmit signal via the High Speed I/O Transmit * Control Register 3 on SATA port 1. - * Bit [23:16] set the output voltage swing for TX line. + * Bit [23:16] sets the output voltage swing for TX line. * The value 0x4a sets the swing level to 0.58 V. */ - pcr_rmw32(PID_MODPHY, TX_DWORD3_P1, (0x00 << 16), (0x4a << 16)); + pcr_rmw32(PID_MODPHY, TX_DWORD3_P1, ~TX_SWING_MASK, 0x4a << 16); } static void finalize_boot(void *unused)