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mb/google/brya/var/ghost: Enable CS42L42 codec 

Add CS42L42 support in device tree.

BUG=b:240006200
BRANCH=firmware-brya-14505.B
TEST=Check cs42l42 driver can probe successfully in kernel.
cs42l42 i2c-10134242:00: Cirrus Logic CS42L42, Revision: B1

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I861f47c12f4cebb016a4cfbe225f97d34d55e233
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66223
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
This commit is contained in:
Eric Lai 2022-07-28 14:05:03 +08:00 committed by Paul Fagerburg
parent e5a9cdc615
commit ff424fbe6b
3 changed files with 21 additions and 2 deletions
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1
src/mainboard/google/brya/Kconfig
View File

@ -64,6 +64,7 @@ config BOARD_GOOGLE_BASEBOARD_GHOST
def_bool n
select BOARD_GOOGLE_BASEBOARD_BRYA if BOARD_GOOGLE_GHOST4ADL
select BOARD_GOOGLE_BASEBOARD_SKOLAS if !BOARD_GOOGLE_GHOST4ADL
select DRIVERS_I2C_CS42L42
config BOARD_GOOGLE_BASEBOARD_NISSA
def_bool n

4
src/mainboard/google/brya/variants/ghost/gpio.c
View File

@ -45,8 +45,8 @@ static const struct pad_config gpio_table[] = {
/* GPP_A6 : GPP_A6 ==> ESPI_ALERT1 configured on reset, do not touch */
/* GPP_A7 : No heuristic was found useful */
PAD_NC(GPP_A7, NONE),
/* GPP_A8 : No heuristic was found useful */
PAD_NC(GPP_A8, NONE),
/* GPP_A8 : HP_RST_ODL */
PAD_CFG_GPO(GPP_A8, 1, PLTRST),
/* GPP_A9 : GPP_A9 ==> ESPI_PCH_CLK_R configured on reset, do not touch */
/* GPP_A10 : GPP_A10 ==> ESPI_PCH_RST_EC_L configured on reset, do not touch */
/* GPP_A11 : [NF6: USB_C_GPP_A11] ==> EN_SPKR_PA */

18
src/mainboard/google/brya/variants/ghost/overridetree.cb
View File

@ -82,6 +82,24 @@ chip soc/intel/alderlake
device generic 0 on end
end
end
device ref i2c0 on
chip drivers/i2c/cs42l42
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "ts_inv" = "true"
register "ts_dbnc_rise" = "RISE_DEB_1000_MS"
register "ts_dbnc_fall" = "FALL_DEB_0_MS"
register "btn_det_init_dbnce" = "100"
register "btn_det_event_dbnce" = "10"
register "bias_lvls[0]" = "15"
register "bias_lvls[1]" = "8"
register "bias_lvls[2]" = "4"
register "bias_lvls[3]" = "1"
register "hs_bias_ramp_rate" = "HSBIAS_RAMP_SLOW"
register "hs_bias_sense_disable" = "true"
device i2c 48 on end
end
end
device ref i2c1 on
chip drivers/i2c/tpm
register "hid" = ""GOOG0005""