cpu/x86/lapic: Split virtual_wire_mode_init()
Only the enable_lapic() part is required while doing SMP init. Also disable_lapic() must not be called if we rely on LAPIC for timer source. Change-Id: Ib5e37c1a0a91fa4e9542141aa74f1c1876fee94e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -10,12 +10,15 @@
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void enable_lapic(void)
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{
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msr_t msr;
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msr = rdmsr(LAPIC_BASE_MSR);
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msr.hi &= 0xffffff00;
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msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK;
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msr.lo |= LAPIC_DEFAULT_BASE;
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msr.lo |= LAPIC_BASE_MSR_ENABLE;
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wrmsr(LAPIC_BASE_MSR, msr);
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printk(BIOS_INFO, "Setting up local APIC 0x%x\n", lapicid());
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}
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void disable_lapic(void)
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@ -39,19 +42,6 @@ static int need_lapic_init(void)
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static void lapic_virtual_wire_mode_init(void)
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{
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/* this is so interrupts work. This is very limited scope --
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* linux will do better later, we hope ...
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*/
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/* this is the first way we learned to do it. It fails on real SMP
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* stuff. So we have to do things differently ...
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* see the Intel mp1.4 spec, page A-3
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*/
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printk(BIOS_INFO, "Setting up local APIC...\n");
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/* Enable the local APIC */
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enable_lapic();
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/*
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* Set Task Priority to 'accept all'.
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*/
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@ -70,14 +60,18 @@ static void lapic_virtual_wire_mode_init(void)
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lapic_update32(LAPIC_LVT1, ~mask, LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
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LAPIC_DELIVERY_MODE_NMI);
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printk(BIOS_DEBUG, " apic_id: 0x%x ", lapicid());
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printk(BIOS_INFO, "done.\n");
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}
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void setup_lapic(void)
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{
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/* Enable the local APIC */
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if (need_lapic_init())
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enable_lapic();
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else if (!CONFIG(UDELAY_LAPIC))
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disable_lapic();
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/* This programming is for PIC mode i8259 interrupts to be delivered to CPU
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while LAPIC is enabled. */
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if (need_lapic_init())
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lapic_virtual_wire_mode_init();
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else
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disable_lapic();
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}
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