mb/google/drallion: Clean up devicetree config
* Disable SATA controller and related configs. * Disable PCIe root ports 10 and related configs. -> Board uses integrated CnVi for WLAN * Disable PCIe root ports 12 and related configs. -> Board uses WWAN intarfaced over USB Change-Id: If9d49cef290dcccb114afccc3ac34cd072802ea4 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35723 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -31,10 +31,6 @@ chip soc/intel/cannonlake
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# FSP configuration
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register "SaGv" = "SaGv_Enabled"
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register "HeciEnabled" = "0"
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register "SataSalpSupport" = "1"
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register "SataMode" = "Sata_AHCI"
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register "SataPortsEnable[2]" = "1"
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register "SataPortsDevSlp[2]" = "1"
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register "InternalGfx" = "1"
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register "SkipExtGfxScan" = "1"
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register "PchPmSlpS3MinAssert" = "3" # 50ms
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@ -47,7 +43,6 @@ chip soc/intel/cannonlake
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register "psys_pmax" = "140"
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register "s0ix_enable" = "1"
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register "dptf_enable" = "1"
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register "satapwroptimize" = "1"
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register "tdp_pl1_override" = "25"
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register "tdp_pl2_override" = "51"
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register "Device4Enable" = "1"
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@ -202,16 +197,6 @@ chip soc/intel/cannonlake
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register "PcieClkSrcUsage[4]" = "8"
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register "PcieClkSrcClkReq[4]" = "4"
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# PCIe port 10 for M.2 2230 WLAN
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register "PcieRpEnable[9]" = "1"
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register "PcieClkSrcUsage[1]" = "9"
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register "PcieClkSrcClkReq[1]" = "1"
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# PCIe port 12 for M.2 3042 WWAN
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register "PcieRpEnable[11]" = "1"
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register "PcieClkSrcUsage[0]" = "11"
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register "PcieClkSrcClkReq[0]" = "0"
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# PCIe port 13 for M.2 2280 SSD
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register "PcieRpEnable[12]" = "1"
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register "PcieRpLtrEnable[12]" = "1"
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@ -395,7 +380,7 @@ chip soc/intel/cannonlake
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device pci 16.3 off end # Management Engine KT Redirection
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device pci 16.4 off end # Management Engine Interface 3
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device pci 16.5 off end # Management Engine Interface 4
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device pci 17.0 on end # SATA
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device pci 17.0 off end # SATA
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device pci 19.0 on
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chip drivers/i2c/tpm
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register "hid" = ""GOOG0005""
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@ -417,9 +402,9 @@ chip soc/intel/cannonlake
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device pci 1d.0 on
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smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "2230" "SlotDataBusWidth1X"
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end # PCI Express Port 9
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device pci 1d.1 on end # PCI Express Port 10
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device pci 1d.1 off end # PCI Express Port 10
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device pci 1d.2 off end # PCI Express Port 11
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device pci 1d.3 on end # PCI Express Port 12
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device pci 1d.3 off end # PCI Express Port 12
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device pci 1d.4 on
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smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
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end # PCI Express Port 13 (x4)
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