soc/intel/alderlake: Align chipset.cb with pci_devs.h

Refer pci_devs.h naming to align chipset.cb.
Correct thc0, thc1 and add cnvi_bt.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Iac33983dc12ed4e5b9257c50d82adc8e4e728ad6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48153
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Eric Lai 2020-11-30 21:20:13 +08:00 committed by Tim Wawrzynczak
parent 99af54e66d
commit ff6a1e5149
1 changed files with 9 additions and 8 deletions

View File

@ -13,18 +13,19 @@ chip soc/intel/alderlake
device pci 08.0 alias gna off end
device pci 09.0 alias north_tracehub off end
device pci 0a.0 alias crashlog off end
device pci 0d.0 alias north_xhci off end
device pci 0d.1 alias north_xdci off end
device pci 0d.2 alias tbt_dma0 off end
device pci 0d.3 alias tbt_dma1 off end
device pci 0d.0 alias tcss_xhci off end
device pci 0d.1 alias tcss_xdci off end
device pci 0d.2 alias tcss_dma0 off end
device pci 0d.3 alias tcss_dma1 off end
device pci 0e.0 alias vmd off end
device pci 10.6 alias thc0 off end
device pci 10.7 alias thc1 off end
device pci 10.0 alias thc0 off end
device pci 10.1 alias thc1 off end
device pci 10.2 alias cnvi_bt off end
device pci 12.0 alias ish off end
device pci 12.6 alias gspi2 off end
device pci 13.0 alias gspi3 off end
device pci 14.0 alias south_xhci off end
device pci 14.1 alias south_xdci off end
device pci 14.0 alias xhci off end
device pci 14.1 alias usb_otg off end
device pci 14.2 alias shared_sram off end
device pci 14.3 alias cnvi_wifi off end
device pci 15.0 alias i2c0 off end