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intel/fsp_baytrail: Remove PcdEnableLan option 

Bay Trail SOCs do not integrate LAN controller hence Baytrail FSP has
no LAN control function. Remove PcdEnableLan option from
UPD_DATA_REGION structure.

Change-Id: I9b4ec9d72c8c60b928a6d9755e94203fb90b658f
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: http://review.coreboot.org/10837
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
York Yang 2015-07-07 10:07:51 -07:00 committed by Martin Roth
parent 2a983bd50d
commit ff9afb3d8e
1 changed files with 2 additions and 2 deletions
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4
src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h Normal file → Executable file
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@ -1,6 +1,6 @@
/** /**
Copyright (C) 2013-2014 Intel Corporation Copyright (C) 2013-2015 Intel Corporation
Redistribution and use in source and binary forms, with or without modification, Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met: are permitted provided that the following conditions are met:
@ -67,7 +67,7 @@ typedef struct _UPD_DATA_REGION {
UINT8 PcdEnableHsuart0; /* Offset 0x0029 */ UINT8 PcdEnableHsuart0; /* Offset 0x0029 */
UINT8 PcdEnableHsuart1; /* Offset 0x002A */ UINT8 PcdEnableHsuart1; /* Offset 0x002A */
UINT8 PcdEnableSpi; /* Offset 0x002B */ UINT8 PcdEnableSpi; /* Offset 0x002B */
UINT8 PcdEnableLan; /* Offset 0x002C */ UINT8 ReservedUpdSpace1; /* Offset 0x002C */
UINT8 PcdEnableSata; /* Offset 0x002D */ UINT8 PcdEnableSata; /* Offset 0x002D */
UINT8 PcdSataMode; /* Offset 0x002E */ UINT8 PcdSataMode; /* Offset 0x002E */
UINT8 PcdEnableAzalia; /* Offset 0x002F */ UINT8 PcdEnableAzalia; /* Offset 0x002F */