nb/intel/i440bx: add resources during read_resources()

The chipset code was incorrectly adding memory resources
to the domain device after resource allocation occurred.
It's not possible to get the correct view of the address space,
and it's generally incorrect to not add resources during
read_resources(). This change fixes the order by adding resources in
read_resources().

Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I84c1ba8645b548248a8bb8bf5bc4953d3be12475
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Keith Hui <buurin@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2020-05-13 13:00:49 -07:00 committed by Aaron Durbin
parent 1ca24332c4
commit ffa5e8ddcf
1 changed files with 5 additions and 4 deletions

View File

@ -27,11 +27,13 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x7190,
};
static void i440bx_domain_set_resources(struct device *dev)
static void i440bx_domain_read_resources(struct device *dev)
{
struct device *mc_dev;
uint32_t pci_tolm;
pci_domain_read_resources(dev);
pci_tolm = find_pci_tolm(dev->link_list);
mc_dev = dev->link_list->children;
if (mc_dev) {
@ -62,12 +64,11 @@ static void i440bx_domain_set_resources(struct device *dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
}
assign_resources(dev->link_list);
}
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = i440bx_domain_set_resources,
.read_resources = i440bx_domain_read_resources,
.set_resources = pci_domain_set_resources,
.scan_bus = pci_domain_scan_bus,
};