soc/amd: Move MADT IRQ override settings into common_config

This is another common ACPI setting.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Iefecabae1d83996a9a4aaadd2a53c2432441e1b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50558
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Raul E Rangel 2021-02-11 11:07:11 -07:00 committed by Martin Roth
parent 1c88b10be2
commit ffab5e64d1
5 changed files with 36 additions and 26 deletions

View file

@ -2,6 +2,7 @@
#include <acpi/acpi.h>
#include <amdblocks/acpi.h>
#include <amdblocks/chip.h>
#include <device/device.h>
#include <types.h>
@ -23,3 +24,24 @@ unsigned long acpi_fill_mcfg(unsigned long current)
return current;
}
unsigned long acpi_fill_madt_irqoverride(unsigned long current)
{
const struct soc_amd_common_config *cfg = soc_get_common_config();
unsigned int i;
uint8_t irq;
uint8_t flags;
for (i = 0; i < ARRAY_SIZE(cfg->irq_override); ++i) {
irq = cfg->irq_override[i].irq;
flags = cfg->irq_override[i].flags;
if (!flags)
continue;
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, 0,
irq, irq, flags);
}
return current;
}

View file

@ -51,4 +51,6 @@ struct chipset_power_state {
unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current,
struct acpi_rsdp *rsdp);
unsigned long acpi_fill_madt_irqoverride(unsigned long current);
#endif /* AMD_BLOCK_ACPI_H */

View file

@ -24,6 +24,17 @@ struct soc_amd_common_config {
/* Options for these are in src/include/acpi/acpi.h */
uint16_t fadt_boot_arch;
uint32_t fadt_flags;
/**
* IRQ 0 - 15 have a default trigger of edge and default polarity of high.
* If you have a device that requires a different configuration you can override the
* settings here.
*/
struct {
uint8_t irq;
/* See MP_IRQ_* from mpspec.h */
uint8_t flags;
} irq_override[16];
};
/*

View file

@ -32,11 +32,6 @@
unsigned long acpi_fill_madt(unsigned long current)
{
const struct soc_amd_picasso_config *cfg = config_of_soc();
unsigned int i;
uint8_t irq;
uint8_t flags;
/* create all subtables for processors */
current = acpi_create_madt_lapics(current);
@ -56,16 +51,7 @@ unsigned long acpi_fill_madt(unsigned long current)
(acpi_madt_irqoverride_t *)current, 0, 9, 9,
MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
for (i = 0; i < ARRAY_SIZE(cfg->irq_override); ++i) {
irq = cfg->irq_override[i].irq;
flags = cfg->irq_override[i].flags;
if (!flags)
continue;
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, 0,
irq, irq, flags);
}
current = acpi_fill_madt_irqoverride(current);
/* create all subtables for processors */
current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current,

View file

@ -120,17 +120,6 @@ struct soc_amd_picasso_config {
/* Enable ACP PME (0 = disable, 1 = enable) */
u8 acp_pme_enable;
/**
* IRQ 0 - 15 have a default trigger of edge and default polarity of high.
* If you have a device that requires a different configuration you can override the
* settings here.
*/
struct {
uint8_t irq;
/* See MP_IRQ_* from mpspec.h */
uint8_t flags;
} irq_override[16];
/* System config index */
uint8_t system_config;