msrtool: Fix Intel CPUs detection

Added vendor check in sys.c file and fixed models checking
in intel targets files.

Change-Id: I1ce52bbce431dea79e903d6bc7a12e5b9ad061be
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1169
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Anton Kochkov 2012-07-04 07:31:37 +04:00 committed by Stefan Reinauer
parent e1e6a91ce0
commit ffbbecc9ee
8 changed files with 35 additions and 7 deletions

View File

@ -21,7 +21,7 @@
int intel_core1_probe(const struct targetdef *target) {
struct cpuid_t *id = cpuid();
return ((0x6 == id->family)&(0xe == id->model));
return ((0x6 == id->family) && (0xe == id->model));
}
const struct msrdef intel_core1_msrs[] = {

View File

@ -21,7 +21,7 @@
int intel_core2_early_probe(const struct targetdef *target) {
struct cpuid_t *id = cpuid();
return ((0x6 == id->family)&(0xf == id->model));
return ((0x6 == id->family) && (0xf == id->model));
}
const struct msrdef intel_core2_early_msrs[] = {

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@ -21,7 +21,10 @@
int intel_pentium3_probe(const struct targetdef *target) {
struct cpuid_t *id = cpuid();
return ((0x6 == id->family)&((0xa == id->model)|(0xb == id->model)));
return ((0x6 == id->family) && (
(0xa == id->model) ||
(0xb == id->model)
));
}
const struct msrdef intel_pentium3_msrs[] = {

View File

@ -21,7 +21,10 @@
int intel_pentium3_early_probe(const struct targetdef *target) {
struct cpuid_t *id = cpuid();
return ((0x6 == id->family)&((0x7 == id->model)|(0x8 == id->model)));
return ((0x6 == id->family) && (
(0x7 == id->model) ||
(0x8 == id->model)
));
}
const struct msrdef intel_pentium3_early_msrs[] = {

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@ -21,7 +21,7 @@
int intel_pentium4_early_probe(const struct targetdef *target) {
struct cpuid_t *id = cpuid();
return ((0xf == id->family)&(0x2 == id->model));
return ((0xf == id->family) && (0x2 == id->model));
}
const struct msrdef intel_pentium4_early_msrs[] = {

View File

@ -21,7 +21,10 @@
int intel_pentium4_later_probe(const struct targetdef *target) {
struct cpuid_t *id = cpuid();
return ((0xf == id->family)&((0x3 == id->model)|(0x4 == id->model)));
return ((0xf == id->family) && (
(0x3 == id->model) ||
(0x4 == id->model)
));
}
const struct msrdef intel_pentium4_later_msrs[] = {

View File

@ -126,6 +126,7 @@ struct sysdef {
#define SYSTEM_EOT .name = NULL
#define SYSTEM_ISEOT(s) (NULL == (s).name)
typedef enum { VENDOR_INTEL = 1, VENDOR_AMD = 2 } vendor_t;
struct cpuid_t {
uint8_t family;
@ -133,6 +134,7 @@ struct cpuid_t {
uint8_t stepping;
uint8_t ext_family;
uint8_t ext_model;
vendor_t vendor;
};

View File

@ -26,7 +26,23 @@ static struct cpuid_t id;
struct cpuid_t *cpuid(void) {
uint32_t outeax;
uint32_t outebx;
/* First, we need determine which vendor we have */
#if defined(__DARWIN__) && !defined(__LP64__)
asm volatile (
"pushl %%ebx \n"
"cpuid \n"
"popl %%ebx \n"
: "=b" (outebx) : "a" (0) : "%ecx", "%edx"
);
#else
asm ("cpuid" : "=b" (outebx) : "a" (0) : "%ecx", "%edx");
#endif
id.vendor = (outebx == 0x756e6547) ? VENDOR_INTEL : VENDOR_AMD;
/* Then, identificate CPU itself */
#if defined(__DARWIN__) && !defined(__LP64__)
asm volatile (
"pushl %%ebx \n"
@ -47,7 +63,8 @@ struct cpuid_t *cpuid(void) {
id.ext_model = outeax & 0xf;
outeax >>= 4;
id.ext_family = outeax & 0xff;
if (0xf == id.family) {
if ((0xf == id.family) || ((VENDOR_INTEL == id.vendor)
&& (0x6 == id.family))) {
/* Intel says always do this, AMD says only for family f */
id.model |= (id.ext_model << 4);
id.family += id.ext_family;