Samus: fix unused GPIO pin

Mark GPIO42 as unused according to Samus schematics

BUG=None
TEST=Make the chnage; Pass the build process; Need someone having
the board perform the verification.

Change-Id: Ib53a3ae062d414a2c98ec0756e759760d179e3fd
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 4e0f8f3276c575ff60fbda709de5d3cfe31a5900
Original-Change-Id: Ifd6a0d2de8af0fe3af4a14f44ce572b41b77509c
Original-Signed-off-by: Kenji Chen <kenji.chen@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/217344
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/9199
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Kenji Chen 2014-09-10 06:00:15 +08:00 committed by Patrick Georgi
parent 70e189e9e8
commit ffc2a3b59b
1 changed files with 1 additions and 1 deletions

View File

@ -68,7 +68,7 @@ static const struct gpio_config mainboard_gpio_config[] = {
PCH_GPIO_UNUSED, /* 39: UNUSED */
PCH_GPIO_NATIVE, /* 40: NATIVE: PCH_USB1_OC_L */
PCH_GPIO_NATIVE, /* 41: NATIVE: PCH_USB2_OC_L */
PCH_GPIO_OUT_HIGH, /* 42: WLAN_DISABLE_L */
PCH_GPIO_UNUSED, /* 42: WLAN_DISABLE_L */
PCH_GPIO_OUT_HIGH, /* 43: PP1800_CODEC_EN */
PCH_GPIO_UNUSED, /* 44: UNUSED */
PCH_GPIO_PIRQ, /* 45: DSP_INT (PIRQN) */