cpu/amd: Add socket FM2
Change-Id: I397c908867fef7583063c8cad7b83ce53482529b Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/13708 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -5,6 +5,7 @@ source src/cpu/amd/socket_AM2/Kconfig
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source src/cpu/amd/socket_AM2r2/Kconfig
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source src/cpu/amd/socket_AM2r2/Kconfig
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source src/cpu/amd/socket_AM3/Kconfig
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source src/cpu/amd/socket_AM3/Kconfig
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source src/cpu/amd/socket_C32/Kconfig
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source src/cpu/amd/socket_C32/Kconfig
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source src/cpu/amd/socket_FM2/Kconfig
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source src/cpu/amd/socket_G34/Kconfig
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source src/cpu/amd/socket_G34/Kconfig
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source src/cpu/amd/socket_ASB2/Kconfig
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source src/cpu/amd/socket_ASB2/Kconfig
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source src/cpu/amd/socket_F/Kconfig
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source src/cpu/amd/socket_F/Kconfig
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@ -8,6 +8,7 @@ subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2R2) += socket_AM2r2
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subdirs-$(CONFIG_CPU_AMD_SOCKET_AM3) += socket_AM3
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subdirs-$(CONFIG_CPU_AMD_SOCKET_AM3) += socket_AM3
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subdirs-$(CONFIG_CPU_AMD_SOCKET_ASB2) += socket_ASB2
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subdirs-$(CONFIG_CPU_AMD_SOCKET_ASB2) += socket_ASB2
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subdirs-$(CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA) += socket_C32
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subdirs-$(CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA) += socket_C32
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subdirs-$(CONFIG_CPU_AMD_SOCKET_FM2_NON_AGESA) += socket_FM2
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subdirs-$(CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA) += socket_G34
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subdirs-$(CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA) += socket_G34
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subdirs-$(CONFIG_CPU_AMD_GEODE_GX2) += geode_gx2
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subdirs-$(CONFIG_CPU_AMD_GEODE_GX2) += geode_gx2
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subdirs-$(CONFIG_CPU_AMD_GEODE_LX) += geode_lx
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subdirs-$(CONFIG_CPU_AMD_GEODE_LX) += geode_lx
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@ -18,6 +18,7 @@ if CPU_AMD_MODEL_10XXX
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config USE_LARGE_DCACHE
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config USE_LARGE_DCACHE
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bool
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bool
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default y if CPU_AMD_SOCKET_G34_NON_AGESA
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default y if CPU_AMD_SOCKET_G34_NON_AGESA
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default y if CPU_AMD_SOCKET_FM2_NON_AGESA
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default y if CPU_AMD_SOCKET_C32_NON_AGESA
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default y if CPU_AMD_SOCKET_C32_NON_AGESA
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default n
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default n
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@ -0,0 +1,29 @@
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config CPU_AMD_SOCKET_FM2_NON_AGESA
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bool
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select CPU_AMD_MODEL_10XXX
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select PCI_IO_CFG_EXT
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select X86_AMD_FIXED_MTRRS
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if CPU_AMD_SOCKET_FM2_NON_AGESA
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config CPU_SOCKET_TYPE
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hex
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default 0x16
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config EXT_RT_TBL_SUPPORT
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bool
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default n
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config CBB
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hex
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default 0x0
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config CDB
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hex
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default 0x18
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config XIP_ROM_SIZE
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hex
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default 0x80000
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endif
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@ -0,0 +1,13 @@
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subdirs-y += ../family_10h-family_15h
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subdirs-y += ../quadcore
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subdirs-y += ../mtrr
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subdirs-y += ../microcode
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/lapic
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subdirs-y += ../../x86/cache
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subdirs-y += ../../x86/pae
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/smm
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subdirs-y += ../smm
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cpu_incs-y += $(src)/cpu/amd/car/cache_as_ram.inc
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