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drop dead code. 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2004-03-09 15:33:08 +00:00
parent a3d26484cc
commit ffc6d28614
1 changed files with 0 additions and 20 deletions
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20
src/southbridge/amd/amd8111/amd8111_early_smbus.c
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@ -118,26 +118,7 @@ static void smbus_write_byte(unsigned device, unsigned address, unsigned char va
if (smbus_wait_until_ready() < 0) {
return;
}
#if 0
/* setup transaction */
/* disable interrupts */
outw(inw(SMBUS_IO_BASE + SMBGCTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)),
SMBUS_IO_BASE + SMBGCTL);
/* set the device I'm talking too */
outw(((device & 0x7f) << 1) | 1, SMBUS_IO_BASE + SMBHSTADDR);
outb(address & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);
/* set up for a byte data write */ /* FIXME */
outw((inw(SMBUS_IO_BASE + SMBGCTL) & ~7) | (0x1), SMBUS_IO_BASE + SMBGCTL);
/* clear any lingering errors, so the transaction will run */
/* Do I need to write the bits to a 1 to clear an error? */
outw(inw(SMBUS_IO_BASE + SMBGSTATUS), SMBUS_IO_BASE + SMBGSTATUS);
/* clear the data word...*/
outw(val, SMBUS_IO_BASE + SMBHSTDAT);
/* start the command */
outw((inw(SMBUS_IO_BASE + SMBGCTL) | (1 << 3)), SMBUS_IO_BASE + SMBGCTL);
#else
/* by LYH */
outb(0x37,SMBUS_IO_BASE + SMBGSTATUS);
/* set the device I'm talking too */
@ -150,7 +131,6 @@ static void smbus_write_byte(unsigned device, unsigned address, unsigned char va
/* start the command */
outb(0xa, SMBUS_IO_BASE + SMBGCTL);
#endif
/* poll for transaction completion */
smbus_wait_until_done();