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soc/intel/common/intelblocks: Remove PAD_CFG_GPI_GPIO_DRIVER_SCI 

Intel's EDS says "1 = GPIO Driver Mode. GPIO input event updates are
limited to GPI_STS.  GPI_GPE_STS, GPI_NMI_STS and/or GPI_SMI_STS updates
are masked."  Therefore, the GPI_GPIO_DRIVER_SCI option for pad
configuration is meaningless, as any GPE will be masked if the GPIO
driver is set as owner.

Change-Id: Ia0cd0041dfc985cbe388cb89a4026038c7fb4383
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35460
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Wawrzynczak 2019-09-18 14:10:31 -06:00 committed by Patrick Georgi
parent 954111695c
commit ffd50a6e8d
1 changed files with 0 additions and 7 deletions
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7
src/soc/intel/common/block/include/intelblocks/gpio_defs.h
View File

@ -411,13 +411,6 @@
PAD_IOSSTATE(TxDRxE)) PAD_IOSSTATE(TxDRxE))
#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT) #if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT)
/* GPI, GPIO Driver, SCI interrupt */
#define PAD_CFG_GPI_GPIO_DRIVER_SCI(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
PAD_IRQ_CFG(SCI, trig, inv), \
PAD_PULL(pull) | PAD_CFG1_GPIO_DRIVER | PAD_IOSSTATE(TxDRxE))
#define PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2) \ #define PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2) \
_PAD_CFG_STRUCT(pad, \ _PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \ PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \