google/rush_ryu: Add speaker amp config for AD4567 on P0/P1

A couple of regs need to be poked to allow audio output
from this part on Ryu P0/P1. It will be replaced by two
non-configurable amps on P3.

BUG=none
BRANCH=none
TEST=Build/flashed on Ryu P1, dumped AD4567 (I2C6 dev 0x34)
regs and confirmed settings.

Change-Id: Ie602b056fb1488546ab233f8f81cfacb96624ebb
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 75dabe378b561e939381e2ef5113a2b28bfcedf8
Original-Change-Id: I8999843646927dbd07a179ede973ba5f1eb97167
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/231384
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9532
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Tom Warren 2014-11-24 10:00:11 -07:00 committed by Patrick Georgi
parent d8060904ee
commit ffe0bb7cd8
1 changed files with 34 additions and 0 deletions

View File

@ -23,6 +23,7 @@
#include <cbmem.h>
#include <delay.h>
#include <device/device.h>
#include <device/i2c.h>
#include <elog.h>
#include <memrange.h>
#include <soc/addressmap.h>
@ -208,6 +209,37 @@ static void setup_audio(void)
clock_enable_audio();
}
#define AD4567_DEV 0x34
#define PWR_CTL 0
#define DAC_CTL 2
#define SPWDN (1 << 0)
#define DAC_MUTE (1 << 6)
#define DAC_FS (0x7 << 0)
#define SR_32K_48KHZ 0x2
static void enable_ad4567_spkr_amp(void)
{
uint8_t reg_byte;
if (board_id() >= BOARD_ID_PROTO_3)
return;
/*
* I2C6, device 0x34 is an AD4567 speaker amp on P0/P1.
* It needs to have a couple of regs tweaked to turn it on
* so it can provide audio output to the mono speaker on P0/P1.
*/
i2c_readb(I2C6_BUS, AD4567_DEV, PWR_CTL, &reg_byte);
reg_byte &= ~SPWDN; // power up amp
i2c_writeb(I2C6_BUS, AD4567_DEV, PWR_CTL, reg_byte);
/* The next 2 settings are defaults, but set them anyway */
i2c_readb(I2C6_BUS, AD4567_DEV, DAC_CTL, &reg_byte);
reg_byte &= ~DAC_MUTE; // unmute DAC (default)
reg_byte &= ~DAC_FS; // mask sample rate bits
reg_byte |= SR_32K_48KHZ; // set 32K-48KHz sample rate (default)
i2c_writeb(I2C6_BUS, AD4567_DEV, DAC_CTL, reg_byte);
}
static void mainboard_init(device_t dev)
{
soc_configure_funits(funits, ARRAY_SIZE(funits));
@ -217,6 +249,8 @@ static void mainboard_init(device_t dev)
i2c_init(I2C6_BUS);
setup_audio();
/* Temp hack for P1 board: Enable speaker amp (powerup, etc.) */
enable_ad4567_spkr_amp();
elog_init();
elog_add_boot_reason();