herobrine: Add fingerprint power sequencing
For Herobrine variants that include a finger print sensor, we will need to power sequence it. We are using the same FP sensor as trogdor, so we will follow the timings used for trogdor from CL:2695676. BUG=b:198474942 BRANCH=None TEST=./util/abuild/abuild -p none -t GOOGLE_HEROBRINE -x -a -c max -B Change-Id: Ica6eafc47cf1b95eeb8d94c6e0a8c88519665e3f Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58021 Reviewed-by: Alexandru Stan <amstan@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -3,6 +3,11 @@ config BOARD_GOOGLE_HEROBRINE_COMMON # Umbrella option to be selected by varian
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if BOARD_GOOGLE_HEROBRINE_COMMON
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config HEROBRINE_HAS_FINGERPRINT
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bool
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default y if BOARD_GOOGLE_HEROBRINE
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default n
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_65536 if BOARD_GOOGLE_PIGLIN || BOARD_GOOGLE_HOGLIN
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@ -3,6 +3,7 @@
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#ifndef _COREBOOT_SRC_MAINBOARD_GOOGLE_HEROBRINE_BOARD_H_
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#define _COREBOOT_SRC_MAINBOARD_GOOGLE_HEROBRINE_BOARD_H_
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#include <assert.h>
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#include <boardid.h>
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#include <gpio.h>
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@ -12,6 +13,17 @@
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#define QCOM_SC7280_SKU2 0x1
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#define QCOM_SC7280_SKU3 0x2
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/* Fingerprint-specific GPIOs. Only for fingerprint-enabled devices. */
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#if CONFIG(HEROBRINE_HAS_FINGERPRINT)
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#define GPIO_FPMCU_BOOT0 GPIO(77)
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#define GPIO_FP_RST_L GPIO(78)
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#define GPIO_EN_FP_RAILS GPIO(42)
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#else
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#define GPIO_FPMCU_BOOT0 dead_code_t(gpio_t)
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#define GPIO_FP_RST_L dead_code_t(gpio_t)
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#define GPIO_EN_FP_RAILS dead_code_t(gpio_t)
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#endif
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void setup_chromeos_gpios(void);
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#endif /* _COREBOOT_SRC_MAINBOARD_GOOGLE_HEROBRINE_BOARD_H_ */
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@ -7,6 +7,12 @@
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void setup_chromeos_gpios(void)
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{
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gpio_input_pullup(GPIO_SD_CD_L);
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if (CONFIG(HEROBRINE_HAS_FINGERPRINT)) {
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gpio_output(GPIO_FPMCU_BOOT0, 0);
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gpio_output(GPIO_FP_RST_L, 0);
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gpio_output(GPIO_EN_FP_RAILS, 0);
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}
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}
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void fill_lb_gpios(struct lb_gpios *gpios)
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@ -51,6 +51,12 @@ static void mainboard_init(struct device *dev)
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qupv3_se_fw_load_and_init(QUPV3_1_SE4, SE_PROTOCOL_SPI, MIXED); /* ESIM SPI */
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qupv3_se_fw_load_and_init(QUPV3_1_SE6, SE_PROTOCOL_SPI, MIXED); /* Fingerprint SPI */
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#endif
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/* Take FPMCU out of reset. Power was already applied
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in romstage and should have stabilized by now. */
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if (CONFIG(HEROBRINE_HAS_FINGERPRINT))
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gpio_output(GPIO_FP_RST_L, 1);
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}
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static void mainboard_enable(struct device *dev)
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@ -2,9 +2,16 @@
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#include <arch/stages.h>
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#include <soc/qclib_common.h>
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#include "board.h"
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void platform_romstage_main(void)
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{
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/* QCLib: DDR init & train */
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qclib_load_and_run();
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/* This rail needs to be stable by the time we take the FPMCU out of
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reset in ramstage, so already turn it on here. This needs to happen
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at least 200ms after this pin was first driven low in the bootblock. */
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if (CONFIG(HEROBRINE_HAS_FINGERPRINT))
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gpio_output(GPIO_EN_FP_RAILS, 1);
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}
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