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Use the fallthrough statement in switch loops 

Clang does not seem to work with 'fall through' in comments.

Change-Id: Idcbe373be33ef7247548f856bfaba7ceb7f749b5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Arthur Heymans 2021-03-15 14:56:16 +01:00 committed by Felix Held
parent 97a0d61f0d
commit fff20212af
21 changed files with 44 additions and 39 deletions
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3
src/console/vtxprintf.c
View File

@ -244,7 +244,7 @@ repeat:
case 'X':
flags |= LARGE;
/* fall through */
__fallthrough;
case 'x':
base = 16;
break;
@ -252,6 +252,7 @@ repeat:
case 'd':
case 'i':
flags |= SIGN;
__fallthrough;
case 'u':
break;

2
src/drivers/aspeed/common/ast_main.c
View File

@ -212,7 +212,7 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
ast->dp501_fw_addr = NULL;
}
}
/* fallthrough */
__fallthrough;
case 0x0c:
ast->tx_chip_type = AST_TX_DP501;
}

4
src/drivers/ipmi/ipmi_kcs_ops.c
View File

@ -247,7 +247,7 @@ ipmi_write_acpi_tables(const struct device *dev, unsigned long current,
break;
default:
printk(BIOS_ERR, "IPMI: Unsupported register spacing for SPMI\n");
/* fall through */
__fallthrough;
case 1:
addr.bit_offset = 8;
break;
@ -369,7 +369,7 @@ static int ipmi_smbios_data(struct device *dev, int *handle,
break;
default:
printk(BIOS_ERR, "IPMI: Unsupported register spacing for SMBIOS\n");
/* fall through */
__fallthrough;
case 1:
register_spacing = 0 << 6;
break;

6
src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c
View File

@ -301,13 +301,13 @@ static void sn65dsi86_bridge_valid_dp_rates(uint8_t bus, uint8_t chip, bool rate
default:
printk(BIOS_ERR, "Unexpected max rate (%#x); assuming 5.4 GHz\n",
(int)dpcd_val);
/* fall through */
__fallthrough;
case DP_LINK_BW_5_4:
rate_valid[7] = 1;
/* fall through */
__fallthrough;
case DP_LINK_BW_2_7:
rate_valid[4] = 1;
/* fall through */
__fallthrough;
case DP_LINK_BW_1_62:
rate_valid[1] = 1;
break;

3
src/ec/google/chromeec/ec_acpi.c
View File

@ -111,7 +111,8 @@ static const char *port_location_to_str(enum ec_pd_port_location port_location)
return "BACK_LEFT";
case EC_PD_PORT_LOCATION_BACK_RIGHT:
return "BACK_RIGHT";
case EC_PD_PORT_LOCATION_UNKNOWN: /* intentional fallthrough */
case EC_PD_PORT_LOCATION_UNKNOWN:
__fallthrough;
default:
return "UNKNOWN";
}

4
src/ec/kontron/kempld/kempld.c
View File

@ -82,13 +82,13 @@ static void kempld_enable_dev(struct device *const dev)
dev->ops = &kempld_uart_ops;
break;
}
/* Fall through. */
__fallthrough;
case 1:
if (dev->path.generic.subid == 0) {
kempld_i2c_device_init(dev);
break;
}
/* Fall through. */
__fallthrough;
default:
printk(BIOS_WARNING, "KEMPLD: Spurious device %s.\n", dev_path(dev));
break;

4
src/lib/dp_aux.c
View File

@ -20,13 +20,13 @@ enum i2c_over_aux dp_get_aux_cmd(enum aux_request request, uint32_t remaining_af
case I2C_RAW_WRITE_AND_STOP:
if (!remaining_after_this)
return I2C_OVER_AUX_WRITE_MOT_0;
/* fallthrough */
__fallthrough;
case I2C_RAW_WRITE:
return I2C_OVER_AUX_WRITE_MOT_1;
case I2C_RAW_READ_AND_STOP:
if (!remaining_after_this)
return I2C_OVER_AUX_READ_MOT_0;
/* fallthrough */
__fallthrough;
case I2C_RAW_READ:
return I2C_OVER_AUX_READ_MOT_1;
case DPCD_WRITE:

6
src/lib/edid.c
View File

@ -1183,13 +1183,13 @@ int decode_edid(unsigned char *edid, int size, struct edid *out)
switch (edid[0x13]) {
case 4:
c.claims_one_point_four = 1;
/* fall through */
__fallthrough;
case 3:
c.claims_one_point_three = 1;
/* fall through */
__fallthrough;
case 2:
c.claims_one_point_two = 1;
/* fall through */
__fallthrough;
default:
c.claims_one_point_oh = 1;
}

3
src/lib/prog_loaders.c
View File

@ -167,7 +167,8 @@ void payload_load(void)
if (CONFIG(PAYLOAD_FIT_SUPPORT)) {
fit_payload(payload, mapping);
break;
} /* else fall-through */
}
__fallthrough;
default:
die_with_post_code(POST_INVALID_ROM,
"Unsupported payload type %d.\n", payload->cbfs_type);

2
src/mainboard/google/poppy/variants/nami/mainboard.c
View File

@ -241,7 +241,7 @@ void variant_devtree_update(void)
case SKU_6_SYNDRA:
case SKU_7_SYNDRA:
pl2_id = PL2_ID_SONA_SYNDRA;
/* fallthrough */
__fallthrough;
case SKU_0_VAYNE:
case SKU_1_VAYNE:
case SKU_2_VAYNE:

2
src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c
View File

@ -38,7 +38,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
case VOLT1_25: // board is not able to provide this
MemData->ParameterListPtr->DDR3Voltage = VOLT1_35; // sorry
printk(BIOS_INFO, "can't provide 1.25 V, using ");
// fall through
__fallthrough;
default: // AGESA.h says in mixed case 1.5V DIMMs get excluded
case VOLT1_35:
FCH_GPIO(184) = 0x08; // = output, disable PU, set to 0

2
src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c
View File

@ -39,7 +39,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
case VOLT1_25: // board is not able to provide this
MemData->ParameterListPtr->DDR3Voltage = VOLT1_35; // sorry
printk(BIOS_INFO, "can't provide 1.25 V, using ");
// fall through
__fallthrough;
default: // AGESA.h says in mixed case 1.5V DIMMs get excluded
case VOLT1_35:
FCH_GPIO(65) = 0x08; // = output, disable PU, set to 0

2
src/northbridge/intel/sandybridge/raminit_mrc.c
View File

@ -275,7 +275,7 @@ static void devicetree_fill_pei_data(struct pei_data *pei_data)
/* MRC only supports fixed numbers of frequencies */
default:
printk(BIOS_WARNING, "RAMINIT: Limiting DDR3 clock to 800 Mhz\n");
/* fallthrough */
__fallthrough;
case 400:
pei_data->max_ddr3_freq = 800;
break;

8
src/soc/nvidia/tegra124/sor.c
View File

@ -220,10 +220,10 @@ static int tegra_dc_sor_power_dplanes(struct tegra_dc_sor_data *sor,
case 4:
reg_val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
NV_SOR_DP_PADCTL_PD_TXD_2_NO);
/* fall through */
__fallthrough;
case 2:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
/* fall through */
__fallthrough;
case 1:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
break;
@ -891,10 +891,10 @@ void tegra_sor_precharge_lanes(struct tegra_dc_sor_data *sor)
case 4:
val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
NV_SOR_DP_PADCTL_PD_TXD_2_NO);
/* fall through */
__fallthrough;
case 2:
val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
/* fall through */
__fallthrough;
case 1:
val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
break;

7
src/soc/nvidia/tegra210/sor.c
View File

@ -222,9 +222,10 @@ static int tegra_dc_sor_power_dplanes(struct tegra_dc_sor_data *sor,
case 4:
reg_val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
NV_SOR_DP_PADCTL_PD_TXD_2_NO);
/* fall through */
fallthrough;
case 2:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
fallthrough;
case 1:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
break;
@ -889,10 +890,10 @@ void tegra_sor_precharge_lanes(struct tegra_dc_sor_data *sor)
case 4:
val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
NV_SOR_DP_PADCTL_PD_TXD_2_NO);
/* fall through */
fallthrough;
case 2:
val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
/* fall through */
fallthrough;
case 1:
val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
break;

5
src/soc/rockchip/rk3288/sdram.c
View File

@ -739,7 +739,7 @@ static void move_to_config_state(struct rk3288_ddr_publ_regs *ddr_publ_regs,
!= PGSR_DLDONE)
;
/* if at low power state, need wakeup first, then enter the config */
/* fall through */
__fallthrough;
case ACCESS:
case INIT_MEM:
write32(&ddr_pctl_regs->sctl, CFG_STATE);
@ -893,7 +893,8 @@ static void move_to_access_state(u32 chnum)
while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK)
!= CONF)
;
/* fall through - enter config next to get to access state */
/* enter config next to get to access state */
__fallthrough;
case CONF:
write32(&ddr_pctl_regs->sctl, GO_STATE);
while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK)

6
src/southbridge/amd/agesa/hudson/hudson.c
View File

@ -79,7 +79,7 @@ void hudson_enable(struct device *dev)
case PCI_DEVFN(0x12, 0):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_12_0);
/* fall through */
__fallthrough;
case PCI_DEVFN(0x12, 2):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_12_2);
@ -87,7 +87,7 @@ void hudson_enable(struct device *dev)
case PCI_DEVFN(0x13, 0):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_13_0);
/* fall through */
__fallthrough;
case PCI_DEVFN(0x13, 2):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_13_2);
@ -95,7 +95,7 @@ void hudson_enable(struct device *dev)
case PCI_DEVFN(0x16, 0):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_16_0);
/* fall through */
__fallthrough;
case PCI_DEVFN(0x16, 2):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_16_2);

4
src/southbridge/amd/agesa/hudson/lpc.c
View File

@ -290,10 +290,10 @@ static void hudson_lpc_enable_childrens_resources(struct device *dev)
switch (var_num) {
case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
/* fall through */
__fallthrough;
case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
/* fall through */
__fallthrough;
case 1:
pci_write_config16(dev, 0x64, reg_var[0]);
break;

4
src/southbridge/amd/cimx/sb800/lpc.c
View File

@ -158,10 +158,10 @@ void lpc_enable_childrens_resources(struct device *dev)
switch (var_num) {
case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
/* fall through */
__fallthrough;
case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
/* fall through */
__fallthrough;
case 1:
//pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata
break;

4
src/southbridge/amd/pi/hudson/lpc.c
View File

@ -301,10 +301,10 @@ static void hudson_lpc_enable_childrens_resources(struct device *dev)
switch (var_num) {
case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
/* fall through */
__fallthrough;
case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
/* fall through */
__fallthrough;
case 1:
pci_write_config16(dev, 0x64, reg_var[0]);
break;

2
src/superio/nuvoton/nct5104d/superio.c
View File

@ -183,7 +183,7 @@ static void nct5104d_init(struct device *dev)
case NCT5104D_GPIO0:
case NCT5104D_GPIO1:
route_pins_to_uart(dev, false);
/* FALLTHROUGH */
__fallthrough;
case NCT5104D_GPIO6:
if (conf->reset_gpios)
reset_gpio_default_in(dev);