diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc
index 9f8c313e74..a0556c1a63 100644
--- a/src/mainboard/google/kukui/Makefile.inc
+++ b/src/mainboard/google/kukui/Makefile.inc
@@ -2,18 +2,19 @@ subdirs-y += sdram_params/
 
 bootblock-y += boardid.c
 bootblock-y += bootblock.c
-bootblock-y += chromeos.c
 bootblock-y += memlayout.ld
 bootblock-y += reset.c
 decompressor-y += memlayout.ld
 
 verstage-y += chromeos.c
+verstage-y += early_init.c
 verstage-y += reset.c
 verstage-y += verstage.c
 verstage-y += memlayout.ld
 
 romstage-y += boardid.c
 romstage-y += chromeos.c
+romstage-y += early_init.c
 romstage-y += memlayout.ld
 romstage-y += reset.c
 romstage-y += romstage.c
diff --git a/src/mainboard/google/kukui/bootblock.c b/src/mainboard/google/kukui/bootblock.c
index ab537d401a..9d6c38ba64 100644
--- a/src/mainboard/google/kukui/bootblock.c
+++ b/src/mainboard/google/kukui/bootblock.c
@@ -14,28 +14,10 @@
  */
 
 #include <bootblock_common.h>
-#include <gpio.h>
-#include <soc/gpio.h>
-#include <soc/mt8183.h>
 #include <soc/spi.h>
 
-#include "gpio.h"
-
-#define BOOTBLOCK_EN_L (GPIO(KPROW0))
-#define AP_IN_SLEEP_L (GPIO(SRCLKENA0))
-
 void bootblock_mainboard_init(void)
 {
-	mt8183_early_init();
-
-	setup_chromeos_gpios();
-
-	/* Turn on real eMMC. */
-	gpio_output(BOOTBLOCK_EN_L, 1);
-
-	/* Declare we are in S0 */
-	gpio_output(AP_IN_SLEEP_L, 1);
-
 	mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 6 * MHz);
 	mtk_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, SPI_PAD0_MASK, 26 * MHz);
 }
diff --git a/src/mainboard/google/kukui/early_init.c b/src/mainboard/google/kukui/early_init.c
new file mode 100644
index 0000000000..a16a335bc4
--- /dev/null
+++ b/src/mainboard/google/kukui/early_init.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <gpio.h>
+#include <soc/mt8183.h>
+#include <soc/spi.h>
+
+#include "early_init.h"
+#include "gpio.h"
+
+#define BOOTBLOCK_EN_L (GPIO(KPROW0))
+#define AP_IN_SLEEP_L (GPIO(SRCLKENA0))
+
+void mainboard_early_init(void)
+{
+	mt8183_early_init();
+
+	/* Turn on real eMMC and allow communication to EC. */
+	gpio_output(BOOTBLOCK_EN_L, 1);
+
+	setup_chromeos_gpios();
+
+	/* Declare we are in S0 */
+	gpio_output(AP_IN_SLEEP_L, 1);
+
+	mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz);
+	gpio_eint_configure(CR50_IRQ, IRQ_TYPE_EDGE_RISING);
+}
diff --git a/src/mainboard/google/kukui/early_init.h b/src/mainboard/google/kukui/early_init.h
new file mode 100644
index 0000000000..a849fe835a
--- /dev/null
+++ b/src/mainboard/google/kukui/early_init.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MAINBOARD_GOOGLE_KUKUI_EARLY_INIT_H__
+#define __MAINBOARD_GOOGLE_KUKUI_EARLY_INIT_H__
+
+void mainboard_early_init(void);
+
+#endif
diff --git a/src/mainboard/google/kukui/romstage.c b/src/mainboard/google/kukui/romstage.c
index 629692dd72..7aad11f282 100644
--- a/src/mainboard/google/kukui/romstage.c
+++ b/src/mainboard/google/kukui/romstage.c
@@ -18,8 +18,14 @@
 #include <soc/mmu_operations.h>
 #include <soc/mt6358.h>
 
+#include "early_init.h"
+
 void platform_romstage_main(void)
 {
+	/* This will be done in verstage if CONFIG_VBOOT is enabled. */
+	if (!IS_ENABLED(CONFIG_VBOOT))
+		mainboard_early_init();
+
 	mt6358_init();
 	mt_mem_init(get_sdram_config());
 	mtk_mmu_after_dram();
diff --git a/src/mainboard/google/kukui/verstage.c b/src/mainboard/google/kukui/verstage.c
index 9bf93bf687..c12d1b66d0 100644
--- a/src/mainboard/google/kukui/verstage.c
+++ b/src/mainboard/google/kukui/verstage.c
@@ -14,13 +14,10 @@
  */
 
 #include <security/vboot/vboot_common.h>
-#include <soc/gpio.h>
-#include <soc/spi.h>
 
-#include "gpio.h"
+#include "early_init.h"
 
 void verstage_mainboard_init(void)
 {
-	mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz);
-	gpio_eint_configure(CR50_IRQ, IRQ_TYPE_EDGE_RISING);
+	mainboard_early_init();
 }
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index f24fdccb0b..5770a83d06 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -29,6 +29,7 @@ romstage-y += dramc_pi_basic_api.c
 romstage-y += dramc_pi_calibration_api.c
 romstage-y += memory.c
 romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c
+romstage-y += mt8183.c
 romstage-y += ../common/gpio.c gpio.c
 romstage-y += ../common/mmu_operations.c mmu_operations.c
 romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6358.c