* use relative paths in ldscript.ld and crt0_includes.h
* avoid use of dd(1) in xcompile
* build libregex for kconfig, if necessary
* work around missing utsname on win32
* unlink targets before rename on win32
* implement (crude) mkstemp for win32
* avoid open/read/close, use fopen/fread/fclose instead
* don't free certain data structures in romcc on win32 to
avoid crashes (likely use-after-free())
* handle "\CRLF" and win32 style absolute paths (X:/ or X:\)
in romcc
* make lzma (part of cbfstool) build on XP
* implement ntohl/htonl on win32
* handle CRLF in awk script
* set larger stack for romcc on win32
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Trivial.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This patch is from socket_F_1207, even though the fam10
can not be "make menuconfig"ed currently.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
by ROM_IMAGE_SIZE (so ROM_IMAGE_SIZE + ROMBASE - 4GB == 0),
but that's for another patch.
Should fix the issues created by the bootblock cleanup patch.
Build tested on kontron/986lcd-m, trivial change.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Remove all remaining warnings from qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
it. Trust the option_table generator to get the length correct.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4935 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- don't pretend to create a bootblock as large
as the ROM in Kconfig (it's 64k at most)
- don't pretend to accept a bootblocksize value
in cbfstool create (it ignored it)
- patch up the build systems to keep it working
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4934 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
looks like unmapped memory, point to the wiki page with
more information.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* fix some comments
* Simplify ACPI wakeup code and make it work without a memory hole
* Add resume entries to global GDT so we don't need our own for resume.
* add ECDT description to acpi.h for anyone who might need it ;-)
* remove rather stupid math to get the right number of MAX_ACPI_TABLES
and just define a reasonable maximum for now.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Sean Young <sean@mess.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Robert Millan <rmh.grub@aybabtu.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
out a suitable address to put a XIP stage to.
Specifically, you pass it the file (to get its filesize), its filename
(as the header has a variable length that depends on it), and the
granularity requirement it has to fit in (for XIP).
The granularity is MTRR-style: when you request 0x10000, cbfstool looks
for a suitable place in a 64kb-aligned 64kb block.
cbfstool simply prints out a hex value which is the start address of a
suitably located free memory block. That value can then be used with
cbfs add-stage to store the file in the ROM image.
It's a two-step operation (instead of being merged into cbfs add-stage)
because the image must be linked twice: First, with some bogus, but safe
base address (eg. 0) to figure out the target address (based on file
size). Then a second time at the target address.
The work flow is:
- link file
- cbfstool locate
- link file again
- cbfstool add-stage.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Libra Li <libra.li@technexion.com>
Added object reference to Config.lb, too and
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
now handled more generically using CBFS.
Simplify the option ROM code in device/pci_rom.c, since there are only two ways
to get a ROM address now (CBFS and the device) and add an exception for qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Since we have CBFS setting rom_address in board files is no longer
necessary.
Also, drop vga_rom_address from RS690 completely, it was never used
in the code.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them."
__PRE_RAM__ means "Use simpler versions of functions, and no device tree."
There are probably some places where both are tested, but only one is needed.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Ported from Ron's code in v3.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
is generated in the F segment. Clear the memory before generating an
RSDP to fix the problem.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Drop pcbios folder that only exists for a single function
* include int1a handler in biosemu.c
* Wipe a lot of dead code, and set up F segment correctly
* include return value check from yabel.
On the long run we should teach yabel to be able to run with a reduced feature
set, ie. no emulation of (almost) all system hardware. Then we could drop the
non-yabel x86emu.
But for now this patch cleans up the non-yabel biosemu.c to a state where it's
not all that ugly anymore..
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4915 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This function is not called right now,... Please step in and fix up your code,
folks.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
"beginning" or "end". In the beginning case, a new segment is inserted
before the current one. But the ptr will move forward and doesn't
seem to have any other chance to process the "new" segment.
ptr ---------+ move --->
|
V
+--------+ +--------+
| | | |
| new | <---> |current | <---> .....
| | | |
+--------+ +--------+
Now we change the ptr to the previous one and restart the loop. The
new and current segment will both be processed. Even if the current
segment is done twice, no new segment will come up and ptr will move
forward as we expect.
+----------------ptr move --->
|
V
+--------+ +--------+ +--------+
| | | | | |
| prev | <---> | new | <---> |current | <---> .....
| | | | | |
+--------+ +--------+ +--------+
It is tested and fixes the crashing on my AMD Family 10 board.
Some trailing whitespaces were deleted.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
stack.
Signed-off-by: Mark Marshall <mark.marshall@csr.com>
Clarified the comment and
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
The READ_CONF and WRITE_CONF functions would both do the wrong thing
if the passed in BDF was not found. We should return and error to the
caller, but not stop running the option ROM.
Signed-off-by: Mark Marshall <mark.marshall@csr.com>
I slightly reworked the patch:
The 'CHECK' function seemed to be both wrong code and the wrong
number.
In fact the CHECK function was given the function number of
the "Microsoft Real-Time Compression Interface". Since this is definitely wrong
I removed the code.
Dropped some unneeded scopes, too, to make the code easier to read.
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
decide whether the option ROM is a special VGA type.
An S3 card that I've got has the wrong class in the VGA BIOS.
(A Stealth 64 DRAM T PCI, from 1994 - BIOS V2.02)
Signed-off-by: Mark Marshall <mark.marshall@csr.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Atom does not like 36bit MTRRs in CAR setup.
Enable XIP setup again (works with 32bit MTRRs)
Keep code more similar to 6ex code..
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* SMSW
* INVD/WBINVD
* RDMSR/WRMSR
* CPUID
The implementation is kept very simple (mostly dummies) but it should get
us successfully through the Poulsbo VGA OPROM code in order to determine
further requirements.
Also, fix up a lot of warnings (mostly about missing prototypes for
functions that should be static anyways)
This version adds a break in smsw that was missing in the patch that was sent
to the list.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
The registers are (as far as I can tell) unchanged with respect to those
of the PM965.
Signed-off-by: Loïc Grenié <loic.grenie@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
it...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Patrick Georgi