coreboot-kgpe-d16

Commit Graph

Author	SHA1	Message	Date
Stefan Reinauer	42fb3164ed	Uwe Hermann: Here's a patch which makes all "option ROM_SIZE" lines use x*y format which is a lot easier to read and modify, without having to use your brain or a calculator ;-) Tested with abuild, no errors. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1	2006-09-06 16:42:51 +00:00
Richard Smith	cb8eab482f	add framework for i440bx chipset add support for NSC pc87351 SuperIO add Bitworks/IMS manboard config This is a very basic framework for the i440bx chipset and the Bitworks IMS board that uses it. Most things are structure only. Known issues: - SMbus reads to the RAM SPD come back all zero. - dump_spd_registers() is commented out since it breaks with the default setting of generic_dump_spd.c where it wants 2 memory controllers. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1	2006-07-24 04:25:47 +00:00

Author

SHA1

Message

Date

Stefan Reinauer

42fb3164ed

Uwe Hermann:

Here's a patch which makes all "option ROM_SIZE" lines use x*y format
which is a lot easier to read and modify, without having to use your
brain or a calculator ;-)

Tested with abuild, no errors.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2006-09-06 16:42:51 +00:00

Richard Smith

cb8eab482f

add framework for i440bx chipset

add support for NSC pc87351 SuperIO
add Bitworks/IMS manboard config

This is a very basic framework for the i440bx chipset and the 
Bitworks IMS board that uses it.  Most things are 
structure only.

Known issues:
- SMbus reads to the RAM SPD come back
all zero.
- dump_spd_registers() is commented out since it breaks with
the default setting of generic_dump_spd.c where it wants
2 memory controllers.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2006-07-24 04:25:47 +00:00

2 Commits