Commit Graph

255 Commits

Author SHA1 Message Date
Raul E Rangel c8283d7014 3rdparty/amd_blobs: advance submodule pointer
This adds the following commits:
* 22ce1b5 cezanne: Upgrade SMU to 64.60.0
* dd37ad2 cezanne: Update ABL to 0x1B096070
* 01fbf5d cezanne: Update SMU to 64.58.0
* f638765 cezanne: Update ABLs to 0x1A296070

BUG=none
TEST=Boot guybrush to OS

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I8f51cb007ce4127428b7b81095fb2c7afb33e608
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61046
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-01-18 19:25:59 +00:00
zhixingma e5af29c40b Update chromeec submodule to upstream main
Updating from commit id 4c21b57eb:
2021-07-19 11:36:07 +0000 - (pd: Fix missing polarity_rm_dts in some conditions)

to commit id e486b388a:
2022-01-12 21:11:11 +0000 - (zephyr: Update power policy for API change)

This brings in 2212 new commits.

Signed-off-by: zhixingma <zhixing.ma@intel.com>
Change-Id: I4437f09c3193ec7c89f7f9550940a0fa5464a511
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Thejaswani Putta <theja427@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
2022-01-17 15:55:32 +00:00
Hsuan Ting Chen 876cffae65 Update vboot submodule to upstream master
Updating from commit id 13f601fb:
2021-09-24 12:25:24 +0000 - (vboot: boot from miniOS recovery kernels on
disk)

to commit id 25b94935:
2021-12-29 21:34:41 +0000 - (vboot_ref/futility: Wrap flashrom_drv
behind USE_FLASHROM)

This brings in 44 new commits.

Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Change-Id: Ife75d21ddfa0b956fdf7a638cd53b55b11f6cb7d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-01-04 06:49:49 +00:00
Yu-Ping Wu 7edea1b790 Update arm-trusted-firmware submodule to upstream master
Updating from commit id 586aafa3a:
2021-07-19 05:36:18 +0200 - (Merge "errata: workaround for Neoverse V1 errata 1791573" into integration)

to commit id 73193689c:
2021-12-06 16:47:33 +0100 - (Merge changes I7c9f8490,Ia92c6d19 into integration)

This brings in 684 new commits.

Change-Id: I4173f3cb646839ad12c4e43e8c50b0be53364f04
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2021-12-09 01:51:01 +00:00
Sean Rhodes 89b6d4bf12 3rdparty/blobs: Update submodule
This brings in EC firmware binaries for Star Labs laptops, as
well as a custom bootsplash image.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Iab5ff610b19fbe6a2e61999457a13a86d47f0ca7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-11-22 14:46:37 +00:00
Felix Held 7842755d46 3rdparty/amd_blobs: advance submodule pointer
This adds the following commits from the submodule:
* cezanne: Upgrade blobs to 1.0.0.5
* cezanne: Upgrade ABL to ver. 0x19036070
* cezanne: Upgrade SMU FW to 64.52.0
* cezanne: Upgrade SMU to 64.57.0
* cezanne: Update ABLs to 0x1A296070

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id7b3f5d38d34c2714548dff92b7b83fb2628e936
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58989
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-08 14:46:01 +00:00
Selma Bensaid c42d875448 Update vboot submodule to upstream main (13f601f)
Updating from commit id c5a482ed:
    2021-09-08 17:16:59 +0000 - (sign_official_build: disable gsetup for reven)

to commit id 13f601f:
    13f601f vboot: boot from miniOS recovery kernels on disk b

This brings in 14 new commits.

Signed-off-by: Selma Bensaid <selma.bensaid@intel.com>
Change-Id: I66788ea434a6000435b97ce64107f3b5da882414
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57994
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-29 15:35:28 +00:00
Arthur Heymans a767a14878 3rdparty/fsp: Update submodule
This includes the Cedar Island FSP which is used by xeon_sp/cpx.
Also updates EHL FSP to latest MR1 version.

Change-Id: I1c2d440ce0f20a0922e5d91f615771843281fca6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57488
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-23 06:38:38 +00:00
Felix Held 6078fe2502 3rdparty/amd_blobs: update submodule pointer
* cezanne: Remove internal classification from PSP release notes

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8198a1d88e98a2192ccd2ddadb1842daabf9c02f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57689
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-09-17 17:14:16 +00:00
Hsuan Ting Chen bb127db428 Update vboot submodule to upstream main
Updating from commit id 4423276b:
2021-08-31 17:41:34 +0000 - (crossystem: add a hwid override mechanism from chromeos-config)

to commit id c5a482ed:
2021-09-08 17:16:59 +0000 - (sign_official_build: disable gsetup for reven)

This brings in 10 new commits.

Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Change-Id: I67d4bfa182eae98bb23ae487f117c991502b66ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57639
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-09-15 23:58:03 +00:00
Thejaswani Putta 60d0a30497 Update vboot submodule to upstream main
Updating from commit id ccc56f4:
    vboot: add x86 SHA256 ext support

to commit id 4423276:
    crossystem: add a hwid override mechanism from chromeos-config

Signed-off-by: Thejaswani Putta <thejaswani.putta@intel.com>
Change-Id: I7bd73b9f6c0492f96c336b61e21ecae37b8f3606
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Thejaswani Putta <thejaswani.putta@intel.corp-partner.google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-09-06 19:15:00 +00:00
Tim Crawford 8de2d591e2 3rdparty/intel-microcode: Update submodule to 20210608 release
Update submodule pointer to include microcode for TGL and others.

Tested the following still boot:

- galp3-c (WHL-U): sig=0x806eb pf=0x80 revision=0xe9
- oryp5 (CFL-H): sig=0x906ea pf=0x20 revision=0xe9
- gaze15 (CML-H): sig=0xa0652 pf=0x20 revision=0xe9

coreboot reports the revision as -1 from what it actually is. i.e.,
these should report revision=0xea (and that is what Linux reports).
However, this behavior is not new.

Change-Id: I084ba67e8eaf7383f1c05fa5589b63c92ff900b1
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56861
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-13 18:06:50 +00:00
Shelley Chen 530624de21 3rdparty/qc_blobs: Uprev to new HEAD (98db386)
Now that gsi_fw blob has landed, need to uprev the qc_blobs.

Change-Id: I0bf67a560ee2e5d771bdb71b60e3d3d372dad567
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56776
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-03 23:40:01 +00:00
Patrick Georgi a4422b84fd Update chromeec submodule to upstream main
Updating from commit id 1e800ac83:
2021-03-01 22:59:54 +0000 - (docs: point md files in master to main/HEAD)

to commit id 4c21b57eb:
2021-07-19 11:36:07 +0000 - (pd: Fix missing polarity_rm_dts in some conditions)

This brings in 3145 new commits.

Change-Id: Iff2e9f766e750070d71644c2f9895ad10e8b1c9a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56431
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-07-28 20:53:49 +00:00
Patrick Georgi aca017a8bb Update arm-trusted-firmware submodule to upstream integration
Updating from commit id 96404aa27:
2021-05-13 18:27:27 +0200 - (Merge "build(hooks): update Commitizen to ^4.2.4" into integration)

to commit id 586aafa3a:
2021-07-19 05:36:18 +0200 - (Merge "errata: workaround for Neoverse V1 errata 1791573" into integration)

This brings in 207 new commits.

Change-Id: Iaf8af5ffaf377070ee1430ed7cfdc51001a1ba6b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56416
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-07-28 20:53:44 +00:00
Shelley Chen eeaf569257 3rdparty/qc_blobs: Uprev to new HEAD (e96cde2)
Now that cpucp blobs have landed, need to uprev the qc_blobs.

Change-Id: I62dc410cee7baf5efa5c0406f35ee05a535f49b1
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56574
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-07-24 05:37:23 +00:00
Subrata Banik bf487e46d7 Update vboot submodule to upstream main
Updating from commit id b38e3a63:
    cros_ec: Use boot mode to check if EC can be trusted

to commit id ccc56f4:
    vboot: add x86 SHA256 ext support

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I4e170e84a12646386d3fd84ae97add6c19f23809
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-07-01 09:38:12 +00:00
Arthur Heymans c44ffc3084 security/intel/cbnt: Build test CBnT provisioning
This updates the intel-sec-tools submodule pointer to include a fake
acm binary to be included for buildtesting.

Change-Id: Id4a9e177f71306b8c5538a578da229a53d19487a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-06-28 04:13:54 +00:00
Patrick Georgi ecc5a2f147 3rdparty/libgfxinit: Update to latest ToT
This brings in three new commits that are mostly concerned about
fixing the build with gcc 11.

Change-Id: I35f9100e2bfb2a261b3a0a128697550caf5840d9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55498
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-17 04:29:55 +00:00
Patrick Georgi dc32051bb4 3rdparty/libhwbase: Update to latest ToT
This update adds a commit to fix building libgfxinit with gcc 11

Change-Id: I5c0e3823ab7219667f9430bce74e4f2fba0c0c3a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55497
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-06-15 19:46:19 +00:00
Angel Pons bd36177632 3rdparty/intel-sec-tools: Fix submodule pointer
The commit currently being pointed to is unreachable. Use the same
commit that exists in a reachable branch.

Fixes: Commit 1128817ed6
       (3rdparty/intel-sec-tools: Update to support Boot Guard)
Signed-off-by: Angel Pons <th3fanbus@gmail.com>

Change-Id: I1cfc08d48fe5471592fea1013e8b43bea5d7b565
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55414
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-14 05:26:05 +00:00
Raul E Rangel e766f6ba92 3rdparty/amd_blobs: Update submodule pointer
* Upgrade blobs to match PI 1.0.0.3c

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Id7d60f9b45be927afda5b9498d12443c7e19aac1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55280
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-06-10 05:36:45 +00:00
Christopher Meis 1128817ed6 3rdparty/intel-sec-tools: Update to support Boot Guard
Update intel-sec-tools to commit of BootGuard support.
Remove --coreboot argument in src/security/intel/cbnt/Makefile.inc:
was removed as argument for cbnt

Change-Id: Iaf34bdb65a5f067d1d632e35d340b8fc49aaf318
Signed-off-by: Christopher Meis <christopher.meis@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55013
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-07 11:36:22 +00:00
Lean Sheng Tan b67c5edf82 3rdparty/fsp: Update submodule pointer to newest master
Newest master includes these changes:
1. Introduce the FSP package for Elkhart Lake SKUs
2. Introduce the FSP package for Tiger Lake IoT SKUs
3. Update the FSP package to latest version for Apollo Lake,
   Comet Lake and Tiger Lake (client SKUs)

You can get further 3rdparty/FSP commit history here:
https://github.com/intel/FSP/commits/master

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I96d147fec82d0fcd5c7748c277deb0672a975ceb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55228
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-07 05:27:21 +00:00
Daisuke Nojiri e5706630ed Update vboot submodule to upstream main
Updating from commit id e681c37:
    change node locked version expectations

to commit id b38e3a63:
    cros_ec: Use boot mode to check if EC can be trusted

Change-Id: Id6de185af85a61a3843b302fef6fa0d4d3c17aef
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55026
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-30 20:18:08 +00:00
Aseda Aboagye 7a9fe102c2 Update vboot submodule to upstream/main (e681c37)
This commit updates the vboot submodule from commit 57c0c5b:
   cgpt: Move all GPT on SPI-NOR infra behind a flag

to e681c37:
    change node locked version expectations

Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ifd130e3f66f1819f59f00703f0ad0c2278b544bf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-05-16 21:53:53 +00:00
Yu-Ping Wu d5a94c5e0c Update arm-trusted-firmware submodule to upstream master
Updating from commit id 7ad39818b:
2020-10-12 09:16:21 +0000 - (Merge "mediatek: mt8192: add GIC600 support" into integration)

to commit id 96404aa27:
2021-05-13 18:27:27 +0200 - (Merge "build(hooks): update Commitizen to ^4.2.4" into integration)

This brings in 861 new commits.

Change-Id: I912545022e4320b86ab8a382144c02e315d0c835
Signed-off-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-05-15 06:00:20 +00:00
Angel Pons a0a778932e 3rdparty/libgfxinit: Update submodule pointer
This brings in LSPCON support.

Change-Id: I35cefa2aa8107b7841d7cf7a7bb61d4b591d14ae
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51147
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2021-05-12 14:49:26 +00:00
Shelley Chen 8479656c71 3rdparty/qc_blobs: Uprev to new HEAD (053eb2a)
Now that Boot blobs have landed, need to uprev the qc_blobs.

Change-Id: I510de2d1e4334612c81f35a082dea92d445da0bb
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54037
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-05-11 22:19:43 +00:00
Arthur Heymans f69cece074 3rdparty/intel-sec-tools: Update submodule pointer
Some changes:
- bg-prov got renamed to cbnt-prov
- cbfs support was added which means that providing IBB.Base/Size
  separatly is not required anymore. Also fspt.bin gets added as an
  IBB to secure the root of trust.

Change-Id: I20379e9723fa18e0ebfb0622c050524d4e6d2717
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52971
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-10 08:31:31 +00:00
Bora Guvendik 03dfd19e6e Update vboot submodule to upstream main
Updating from commit id 9d4053df:
2020-11-20 01:51:08 +0000 - (Revert "Reland: Clean up implicit fall through.")

to commit id 57c0c5be:
2021-04-09 11:45:39 +0800 - (cgpt: Move all GPT on SPI-NOR infra behind a flag)

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Id50a892f12ff3c4147c422c98b640ac047143128
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52453
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-22 12:43:10 +00:00
Shelley Chen ecc720b261 3rdparty/qc_blobs: Uprev to new HEAD (02ba9a6)
Change-Id: I18fc6443a6972e22c979daaf68d0b9c046d1866f
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-04-21 23:09:22 +00:00
Raul E Rangel 989323d29e 3rdparty/blobs: Update blobs pointer to f388b6794e6f
mb/google/guybrush: Update APCB - disable debug
    mb/google/guybrush: Add APCB to get through memory training
    soc/mediatek/mt8192: Add EMI Settings of 8GB Normal Mode
    soc/mediatek/mt8192: Update MCUPM firmware
    soc/mediatek/mt8192: Add version info for SSPM

TEST=Boot guybrush to OS

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I445d753c712670fe80efcdf29459736df2b76666
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52112
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-04-07 08:49:11 +00:00
Martin Roth 8bd525001f Update amd_blobs submodule to upstream master
Updating from commit id 3a9d7cd:
2021-03-03 15:37:08 -0700 - (picasso: Update Dali SMU firmware)

to commit id dded82f:
2021-03-23 15:36:36 -0600 - (picasso: Update Dali SMU firmware)

This brings in 2 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If71e52a2a3e50aeb8599798de7b49bc71ed26a04
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-28 16:06:19 +00:00
Arthur Heymans 7e4ad26b95 3rdparty/intel-sec-tools: Update submodule pointer
This includes the bg-prov tool.

Change-Id: Iba8efe3bcb67694da76ef78abaa0562d47f7850b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
2021-03-19 11:35:13 +00:00
Martin Roth ca2e7161d1 Update chromeec submodule to upstream master
Updating from commit id a2390f3c5:
2020-12-01 08:35:44 +0000 - (servo_v4/usb_pd_policy: Reject SNK->SRC power swap if CC_ALLOW_SRC not set)

to commit id 1e800ac83:
2021-03-01 22:59:54 +0000 - (docs: point md files in master to main/HEAD)

This brings in 188 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I5c276d7839e0bdbf14ac56f16c231d75a6ea4c3e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-16 11:18:34 +00:00
Martin Roth 206020ccff Update arm-trusted-firmware submodule to upstream master
Updating from commit id a4c979ade:
2020-08-26 14:59:05 +0000 - (Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration)

to commit id 7ad39818b:
2020-10-12 09:16:21 +0000 - (Merge "mediatek: mt8192: add GIC600 support" into integration)

This brings in 222 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Id186df36d90563f94f17cc210a6f634adc4ec61e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51463
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-16 11:18:21 +00:00
Martin Roth 50c667de52 Update amd_blobs submodule to upstream master
Updating from commit id 3b1a734:
2021-03-02 11:51:18 -0700 - (picasso: Update FSP to build 0x26)

to commit id 3a9d7cd:
2021-03-03 15:37:08 -0700 - (picasso: Update Dali SMU firmware)

This brings in 1 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Iff3b4ff667f97d3804bc66477f8a95a60e23b1a0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51459
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-15 01:37:53 +00:00
Martin Roth c381b194cc Update blobs submodule to upstream master
Updating from commit id 4fdfa1c:
2021-03-05 13:10:22 -0600 - (mb/amd/majolica: Update to use proper APCBs built for Majolica)

to commit id fc2d4e2:
2021-03-12 10:31:48 -0700 - (mb/google/guybrush: Add initial APCB)

This brings in 1 new commit.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I3003fdb8ba0bcfbc33452999c35a9a21775ecc10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51462
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-15 01:22:33 +00:00
Matt Papageorge a37ec522e1 mb/amd/majolica: Update to use proper APCBs built for Majolica
Some of the previous binaries were incorrect and should not be used
for Majolica because they are templates instead of APCBs specifically
built for the board. This APCB update also places the UMA region under
4G and size 32 MB which is essential for video output.

TEST=Boot with UEFI BIOS and verify we can get to OS. Also verify memory
region size, base and alignment.

Change-Id: Id797e2ad5bd67815c09752aedc19dad7dcf8ad12
Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-03-10 23:28:19 +00:00
Nikolai Vyssotski 794f1e785d amd_blobs: update submodule pointer
Pick up build 0x26 Picasso FSP binaries. The changes include increased
FSPS UPD block size from 0x152 to 0x202.

Change-Id: I11fc199ca7bc6ee7431c59d35a60d9ebd977bf10
Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51193
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-03-03 22:20:07 +00:00
Marshall Dawson d882bd478d amd_blobs: Update cezanne PSP Secure OS
Avoid a Secure OS Abort.  This prevents coreboot timing out on C2P
mailbox commands and allows HDT unlocking.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I358530a1ba959ee1896e26a47853c9918ee124b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51109
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-03-01 08:28:07 +00:00
Marshall Dawson 2c30a83d9b amd_blobs: Add cezanne whitelist bootloader
Advance the pointer to pick up the PSP whitelist bootloader.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I45da509ee6f782cbe64e7099f3945129282060b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-03-01 08:27:43 +00:00
Ritul Guru 8c80d9e612 3rdparty/blobs: advance submodule pointer.
This adds the apcb binary for Bilby.

Change-Id: I1487369bc72734e875c5a701f27ed2d6af41cd01
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-02-11 21:34:52 +00:00
Patrick Georgi 841491c06f Update chromeec submodule to upstream master
Updating from commit id a1afae4:
2019-10-02 11:47:45 +0000 - (juniper: initial setup)

to commit id a2390f3:
2020-12-01 08:35:44 +0000 - (servo_v4/usb_pd_policy: Reject SNK->SRC power swap if CC_ALLOW_SRC not set)

This brings in 4022 new commits.

Change-Id: Ib13921aa78a60f88455223eff602296abc424ca8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48212
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-06 10:47:13 +00:00
Tim Crawford 8818ddab82 3rdparty/intel-microcode: Update submodule to 20201118 release
Update submodule pointer to include microcode for CML-H and others.

Change-Id: Ide211b0b163f824a3cfa6500a73aea1e2176c652
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47914
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-23 17:00:15 +00:00
Felix Held e8ac16e7e9 3rdparty/blobs: advance submodule pointer
This pulls in the following changes:
* Drop geode_lx
* cpu/amd/model_fxx: Drop unused microcode
* cpu/amd/model_10xx: Drop unused microcode
* soc/mediatek/mt8192: Add dram.elf for DRAM full calibration
* soc/mediatek/mt8192: Add dpm binary
* soc/mediatek/mt8192: Add 4266Mbps flag for dpm & dram blob
* soc/mediatek/mt8192: add SPM firmware
* soc/mediatek/mt8192: Support 26M clock off in SPM
* soc/mediatek/mt8192: Add SSPM firmware
* soc/mediatek/mt8192: Add MCUPM firmware
* soc/mediatek/mt8192: Update MCUPM firmware
* soc/mediatek/mt8192: Support discrete DRAM modules
* mb/amd/majolica: Add APCB configuration files

Change-Id: I5c18349307421707fac71f392b785f3e2bef3acb
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-01-19 23:02:52 +00:00
Marshall Dawson 558a497f4c amd_blobs: Add new picasso VBIOS
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Icf1571ae360cee5698626f0360e1408360e8a7f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-01-14 01:16:08 +00:00
Marshall Dawson 663c17c78d amd_blobs: Advance pointer for picasso FSP 0x25
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I2aa5f353432cd8f79005153a06ac35c1e654f6f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49223
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-01-08 15:18:07 +00:00
Nico Huber 3394040e79 3rdparty/libgfxinit: Update for Cannon Point support
We missed that Cannon Point, the PCH usually paired with Coffee, Whiskey
and Comet Lake, differs a bit from its predecessors. Hence, libgfxinit
now has a new Kconfig setting for the PCH.

Change-Id: I1c02c0d9abb7340aabe94185ee5e17ef4c2b0d36
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48764
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-28 17:27:21 +00:00