Commit Graph

2721 Commits

Author SHA1 Message Date
Nikolay Petukhov 9c2255c66c Now coreboot performs IRQ routing for some boards.
You can see this by executing commands like this:
grep -r pci_assign_irqs coreboot/src/*

This basically AMD/LX based boards: pcengines/alix1c,
digitallogic/msm800sev, artecgroup/dbe61, amd/norwich, amd/db800.

Also for AMD/GX1 based boards need a patch
[http://www.pengutronix.de/software/ptxdist/temporary-src/references/geode-5530.patch]
for the right IRQ setup.
AMD/GX1 based boards is: advantech/pcm-5820, asi/mb_5blmp, axus/tc320,
bcom/winnet100, eaglelion/5bcm, iei/nova4899r, iei/juki-511p.

I have two ideas.
1. Delete duplicate code from AMD/LX based boards.
2. Add IRQ routing for AMD/GX1 boards in coreboot.

The pirq.patch for IRQ routing logically consist from of two parts:

First part of pirq.patch independent from type chipsets and assign IRQ for
ever PCI device. It part based on AMD/LX write_pirq_routing_table() function.

Second part of pirq.patch depends of type chipset and set PIRQx lines
in interrupt router. This part supports only CS5530/5536 interrupt routers.

IRQ routing functionality is included through PIRQ_ROUTE in Config.lb.

Tested on iei/juki-511p(cs5530a), iei/pcisa-lx(cs5536) and also on
TeleVideo TC7020, see
http://www.coreboot.org/pipermail/coreboot/2007-December/027973.html.

Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-29 16:59:27 +00:00
Jordan Crouse 0e122af465 [libpayload] Work around sign-extending issue
Somewhere characters are getting sign-extended, meaning that the
attributes of the drawing chars (>= 128) are wrong. Cast the value
before sending it to VGA.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3195 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-29 16:13:22 +00:00
Uwe Hermann 42cccdf03b Make a few array entries only as big as they absolutely need to be (trivial).
This decreases the size of the superiotool binary from ca. 1.1 MB to 600 KB.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-29 01:35:21 +00:00
Joseph Smith da0efc4ca5 Fix for irq routing issues.
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-28 03:35:11 +00:00
Uwe Hermann 8cc38d2f13 Add initial support for some basic CMOS read/write functions and the
bcd2dec()/dec2bcd() functions we'll need for (among other things)
converting some date/time parameters in CMOS.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-27 23:26:40 +00:00
Uwe Hermann a0c0093a09 Various tiny fixes (trivial):
- Show PCI IDs as 4-digit numbers always.

 - Cosmetic changes to make UI look more consistent.

 - Drop MODULE_COUNT #define and use ARRAY_SIZE() where needed.

 - Small fix to improve build system (create build/ when not there).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-27 20:46:49 +00:00
Uwe Hermann 408c4e1784 Drop -Os in libpayload for now, it causes run-time problems for some
strange reason (broken curses/VGA display, maybe others).

It'll be re-enabled when we fixed that.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3190 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-27 19:11:44 +00:00
Jon Dufresne c88b537461 Make the getpir output compile (Closes #70).
Signed-off-by: Jon Dufresne <jon.dufresne@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3189 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-25 19:43:01 +00:00
Uwe Hermann 2216d1b46a Add a recent kconfig version to coreinfo, in order to make the
supported features configurable later (currently unused). Store all
build files and results (coreinfo.elf) in build/ now.

I'm self-acking this as (though non-"trivial") it doesn't affect coreinfo
in its functionality, this is more or less a "cosmetic" change to the
build interface ("make" -> "make menuconfig && make").

This is a kconfig checkout from the Linux kernel (where kconfig is being
actively maintained) from 03/2008. The hash identifying the last commit
to kconfig is 587c90616a5b44e6ccfac38e64d4fecee51d588c.

The amount of changes to kconfig itself has been kept as small as possible
to keep the diff small and to ease updating/porting to newer kconfig versions.
The following changes were performed on the upstream Linux kconfig:

 - s/kernel/coreinfo/, and s/Linux/coreinfo/ in various strings.

 - Consistently use the env. variable KERNELVERSION in all kconfig
   interfaces -- e.g. config/menuconfig/gconfig/xconfig -- as version number.

 - Hardcode our paths/filenames in some places (could be improved upstream).

 - Always write .config and build/config.h, no matter which kconfig
   interface is used (config/menuconfig/gconfig/xconfig). We want to
   include build/config.h in our code.

 - Adapt the kconfig Makefile for our purposes (build/ directory, rules, etc).

In addition, a few items in the coreinfo Makefile are needed for this to work.

This kconfig setup is successfully tested with all targets from 'make help':

  config          - Update current config utilising a line-oriented program
  menuconfig      - Update current config utilising a menu based program
  xconfig         - Update current config utilising a QT based front-end
  gconfig         - Update current config utilising a GTK based front-end
  oldconfig       - Update current config utilising a provided .config as base
  silentoldconfig - Same as oldconfig, but quietly
  randconfig      - New config with random answer to all options
  defconfig       - New config with default answer to all options
  allmodconfig    - New config selecting modules when possible
  allyesconfig    - New config where all options are accepted with yes
  allnoconfig     - New config where all options are answered with no

For 'make defconfig' to work you have to do (which we don't need in coreinfo):

  $ mkdir configs; touch configs/defconfig

You can also use 'make foo_defconfig' in which case kconfig will use a
file called 'configs/foo_defconfig' as basis.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3188 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-24 15:47:49 +00:00
Uwe Hermann 0bfb5c4fb2 Make functions static (where possible) to reduce code size (trivial).
Also, disable header() for now, as it's not being used.

Here are some stats on size differences:

 - ls

23820 coreinfo.old.elf
23564 coreinfo.new.elf

 - size *elf

   text    data     bss     dec     hex filename
  15199    2468  181904  199571   30b93 coreinfo.old.elf
  14934    2468  181912  199314   30a92 coreinfo.new.elf

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3187 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-23 15:34:04 +00:00
Jonathan A. Kollasch b0e3f39a39 Make cursor positioning work by using both halves of the
VGA cursor position register.
   
Have vga_scroll_up() and vga_clear_line() present row/column
arguments to the VIDEO() macro in the right order.
       
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>

-This line, and those below, will be ignored--

M    libpayload/drivers/vga.c


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3186 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-22 15:27:26 +00:00
Uwe Hermann 661e380a75 Cosmetics, fix typos (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3185 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-21 18:37:23 +00:00
Uwe Hermann 29014056e7 Quickfix for libpayload's strcpy() to properly NUL-terminate strings (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3184 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-21 15:47:38 +00:00
Rudolf Marek 316e07fb04 Following patch adds K8M890 support. It initializes the AGP and graphics UMA.
The V-link setup and HT bridge is redone, because VT8237A has it in another
device. So far following combination of chipsets should now work:

K8T890CE + VT8237R
K8M890(CE) + VT8237R

VIA PC1 brige moved to NB code (vt8237r_bridge.c -> k8t890_bridge.c) and
notes about K8M890 support were added.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3183 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 21:19:50 +00:00
Uwe Hermann 14a3feb068 Fix code to allow usage of -Wall in libpayload and the sample (trivial).
This even fixes two bugs:

 - get_cpu_speed() didn't return a value.

 - The line
     win->_color - PAIR_NUMBER(0);
   should actually be
     win->_color = PAIR_NUMBER(0);

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3182 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 20:46:44 +00:00
Uwe Hermann 35845a2acb Smaller fixes to allow using -Wall (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 20:05:22 +00:00
Uwe Hermann 6a441bfb46 Cosmetics, coding style fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 19:54:59 +00:00
Christopher Kilgour 5f4c8abb65 Change kconfig references from 'buildrom' to 'libpayload'.
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 01:58:08 +00:00
Christopher Kilgour 0c1cea29e7 Allow 'make menuconfig' to function within libpayload.
Removes reference to BusyBox.

Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3178 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 01:56:05 +00:00
Uwe Hermann dc69e05d90 Make the list of functions in libpayload.h more complete (trivial).
We need to think about the exact API we want to expose later, though.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 01:53:30 +00:00
Jordan Crouse 5aa66da9a1 Add -Os to the CFLAGS for size improvements.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 01:15:16 +00:00
Jordan Crouse 2c7bb9e84f libpayload: Add -Os to the CFLAGS
Adding -Os to the CFLAGS gains us about 25% smaller code (give or take).
Unfortunately, it exposes a strange issue where strcpy() suddenly goes
missing - we think that strcpy() is being provided by libgcc, and that
for some reason, -Os changes the beahavior.  Oh, well - add a quick
strcpy() function and we're good.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3175 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 01:13:28 +00:00
Uwe Hermann 3a406feb17 Cosmetic changes and coding style fixes by running 'indent', with some
manual fixups afterwards (trivial).

No functionality changes, compile-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 01:11:28 +00:00
Jordan Crouse 7249f79792 corinfo: Inital release of the coreinfo code
This is the intial release of the coreinfo payload code.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 00:11:05 +00:00
Uwe Hermann c52761be0a libpayload: BSD solutions contributed by Uwe
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3172 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-20 00:02:07 +00:00
Jordan Crouse f3029a8fc9 libpayload: External code
This is external and properly licensed code that I pulled into the tree.
          
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-19 23:59:13 +00:00
Jordan Crouse f6145c3c15 libpayload: The initial chunk of code writen by AMD
This is the initial chunk of code written by me and copyrighted
by AMD.  Includes everything but a few files that we pulled from
outside sources.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-19 23:56:58 +00:00
Rudolf Marek c221349746 Following patch will setup KT890 HT automatically. It will find the
max width of the link and also it will take the frequency of K8 HT
already done coreboot (and checks if t can run on it).

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>

Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-19 20:24:33 +00:00
Stefan Reinauer cfcc9ca590 * split model_centaur into model_c3 and model_c7
* simplify and improve cpuid table
* add speedstep support for VIA C7 based CPUs
* also included as many of Uwe's suggestions as possible

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-18 23:10:24 +00:00
Carl-Daniel Hailfinger e98edfa386 Add ICH9 detection to flashrom. Straight from the datasheet, untested.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3167 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-18 00:54:10 +00:00
Stefan Reinauer 470d3650ad oops. forgot to add the file.
Support for the Winbond W39V080FA series of chips.
Support for flashing on the Kontron 986LCD-M board.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3166 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-18 00:36:18 +00:00
Stefan Reinauer 012ed48bf2 Support for the Winbond W39V080FA series of chips.
Support for flashing on the Kontron 986LCD-M board.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-17 22:59:40 +00:00
Ward Vandewege 2ce4e4caa9 The ATI vga rom is only 36K on the Tyan s2891, not 48K.
This is a trivial patch.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-17 17:06:06 +00:00
Uwe Hermann 969a9f69e8 Various smaller fixes in superiotool:
- Also dump the extra registers (e.g. EC regs) in --list-supported.

 - Small fix in the code to allow for building with -pedantic (yes,
   the fix is a bit silly, but it's simple and allows us to use the
   -pedantic flag to keep the code even cleaner and nicer).

 - Install the binary in /usr/sbin, as it's meant to be run as root.

 - Small typo in README.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3163 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-17 13:43:48 +00:00
Uwe Hermann a2ccf9fe4e Add support for the MSI MS-6119 mainboard.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-17 13:37:34 +00:00
Carl-Daniel Hailfinger fa510c7878 Clarify LZMA code license.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-17 01:37:27 +00:00
Ed Swierk 4f83d7ed96 oops. sorry, wrong checkin. This patch backs out r3155 and instead contains the
code it should have contained.

This patch updates the PCI IDs for Intel 3100 devices.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3160 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 23:43:04 +00:00
Ed Swierk 354e2d3dc1 This patch implements support for the Intel 3100 Development Kit
mainboard, aka "Mt. Arvon".   

Signed-off-by: Ed Swierk <eswierk@arastra.com>                                                                                                                                               
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 23:39:24 +00:00
Ed Swierk a9faea8977 This patch implements support for the Intel 3100 integrated
northbridge and RAM controller. 

Signed-off-by: Ed Swierk <eswierk@arastra.com>                                                                                                                                               
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3158 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 23:36:00 +00:00
Ed Swierk aaea11b749 Here is an updated patch addressing most of Uwe's and Peter's
comments. Ripping out the ehci/uhci_init() code doesn't seem to have                                                                                                                         
done any harm, and I got rid of a bunch of unused junk in                                                                                                                                    
i3100_smbus.h                                                                                                                                                                                
                                                                                                                                                                                             
I left the *_set_subsystem() arguments unsigned, as that's how the                                                                                                                           
function is declared in include/device/pci.h.                                                                                                                                                
                                                                                                                                                                                             
Signed-off-by: Ed Swierk <eswierk@arastra.com>   
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3157 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 23:34:10 +00:00
Ed Swierk 62eee3ff4f This patch implements support for the Intel 3100 integrated SuperIO and UART.
Signed-off-by: Ed Swierk <eswierk@arastra.com>                                                                                                                                               
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>                                                                                                                                                   
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3156 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 23:31:04 +00:00
Ed Swierk 791265a367 This patch updates the PCI IDs for Intel 3100 devices.
Signed-off-by: Ed Swierk <eswierk@arastra.com>                                                                                                                                               
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>                                                                                                                                                   
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3155 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 23:27:50 +00:00
Stefan Reinauer a4b901e3ef give the fam10 code a little more space until we have the time to debug this
properly. Everybody knows this by now.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 22:20:53 +00:00
Stefan Reinauer dd6877a46d check whether SST FWH chip was successfully erased on flashchip -E, too
(trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 19:44:13 +00:00
Uwe Hermann 568667da20 Sort list of flash chips alphabetically, add comment (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 02:06:25 +00:00
Stefan Reinauer 582ce71cc5 remove nasty warning that happened due to our vendor detection
mechanism.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-15 23:41:19 +00:00
Stefan Reinauer 9dcfc00dc6 fix typo
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-15 16:30:39 +00:00
Stefan Reinauer e989be26e6 BIOS_SPEW is log level 9. There is nothing beyound that line.
(Thus the patch is trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-15 12:26:12 +00:00
Rudolf Marek 5671787b9e Following patch extends the ROM decoding to last 1MB, allowing to use larger
flashes such as SST49LF080A: 1024K x8 (8 Mbit)

Tested on my system, the flash is found and if I use coreboot in second half it
works too.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3148 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-15 00:26:50 +00:00
Rudolf Marek dd52e17448 Following patch fixes the retrain/reset sequence which caused problem with some
nVidia cards. The enable link should be enough, retrain is done there.

Tested on my system.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-15 00:19:34 +00:00