For devices with Chrome EC, state the "board" name(s), so they're built
as part of the image.
A number of EC boards aren't supported in the Chrome EC master branch,
they're brought along but commented out, waiting for a port to master
in the Chrome EC code base.
Change-Id: Ic6ab821de55cf9b4e8b48fe5ebc603adeb8bb28b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13548
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Enable the option to back up Vboot non-volatile data from CMOS
to flash as these boards have the necessary nvram fmap region
and are using vboot2 which does not backup to the TPM.
BUG=chrome-os-partner:47915
BRANCH=glados
TEST=manually tested on chell
Change-Id: I7bfe88f2cb7826f3315987aaf56f77df708896ce
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 35df03c5ef24406129cba920ee9af6d55458cd45
Original-Change-Id: Ia7c014fe2768c55941a65ec5605ef4fbc986151c
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/324123
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13601
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Updating EC+PD takes long enough to update that it is good to
show the "critical update" screen when doing an EC/PD update.
BUG=chrome-os-partner:49650
BRANCH=glados
TEST=Build and boot on chell in normal mode with an EC update payload
and ensure that it reboots to enable graphics, shows the "critical
update" screen, and then reboots to disable graphics init again.
Change-Id: I436b96b95595b68273e594bdcfe2db0789ee26b2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 08e45decd066f8f57ad103ff8b76cb7a916afa9e
Original-Change-Id: Ie250f4531437e4a0ce14b5aeb0fe564e9461fe4d
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/322783
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13075
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Enable the config option for TPM to use PIRQ instead of SERIRQ
and enable the MAINBOARD_HAS_LPC_TPM option.
BUG=chrome-os-partner:46335
BRANCH=none
TEST=tested this patch with TPM ACPI driver(tpm_tis.force=0)
Change-Id: I311cc7d2e70cc52a7e90f3c3c60d422b7b998789
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ad9450c342c752f87e3385a2acd5dd79b65cc75f
Original-Change-Id: Ib7b1b40c296fce80d5366bd19e7ff20d7161db95
Original-Signed-off-by: Rishavnath Satapathy <rishavnath.satapathy@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/316287
Original-Commit-Ready: Pravin K Angolkar <pravin.k.angolkar@intel.com>
Original-Commit-Ready: Naveenkrishna Ch <naveenkrishna.ch@intel.com>
Original-Tested-by: Pravin K Angolkar <pravin.k.angolkar@intel.com>
Original-Reviewed-by: Pravin K Angolkar <pravin.k.angolkar@intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/12963
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Provide an option for including the NHLT blobs within the
kunimitsu mainboard directory while also adding the ACPI NHLT
table generation that the current hardware supports.
Kunimitsu does support two audio codec, ADI and MAXIM,
hence use AUDIO_DB_ID to read correct codec and craete
NHLT table, this will also help to load only one amplifier ASL
for machine driver consumption.
BUG=chrome-os-partner:44481
BRANCH=None
TEST=Built and booted kunimitsu board. Audio worked
with both ADI and MAXIM audio card.
CQ-DEPEND=CL:316352
Change-Id: Ic9b9af83a0229fdf5f1cb019245ae65ad9d2f06c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2db85062d65c5e831da297588aa4abb18d6ed1bb
Original-Change-Id: I3b08f3f23b334799a81cde81a30d6f231cc8583f
Original-Signed-off-by: Naresh G Solanki <Naresh.Solanki@intel.com>
Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/315450
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12959
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Because these platforms haven't been getting build testing, they've
missed out on some of the improvements that the other platforms have
gotten.
Enable MAINBOARD_HAS_LPC_TPM so that they will build.
Change-Id: I5e44135b6dfa800fa14e5b08c3e3e5921d50b082
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12865
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The Chrome OS verified boot path supported multiple CBFS
instances in the boot media as well as stand-alone assets
sitting in each vboot RW slot. Remove the support for the
stand-alone assets and always use CBFS accesses as the
way to retrieve data.
This is implemented by adding a cbfs_locator object which
is queried for locating the current CBFS. Additionally, it
is also signalled prior to when a program is about to be
loaded by coreboot for the subsequent stage/payload. This
provides the same opportunity as previous for vboot to
hook in and perform its logic.
BUG=chromium:445938
BRANCH=None
TEST=Built and ran on glados.
CQ-DEPEND=CL:307121,CL:31691,CL:31690
Change-Id: I6a3a15feb6edd355d6ec252c36b6f7885b383099
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12689
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
EC_SOFTWARE_SYNC depends on CHROMEOS, so move it into the CHROMEOS section.
This fixes the kconfig warning:
warning: (CHROMEOS && BOARD_SPECIFIC_OPTIONS ...) selects
EC_SOFTWARE_SYNC which has unmet direct dependencies
(MAINBOARD_HAS_CHROMEOS && CHROMEOS && VBOOT_VERIFY_FIRMWARE)
Change-Id: I459f48fd18c7568c4584df7d4aefa69dec3e4907
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12460
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The family variable was not being set yet for skylake, add this
to the current boards.
BUG=chromium:551715
BRANCH=none
TEST=emerge-glados coreboot
Change-Id: Icf175e4ce89cb47b9eabce1399eb3ef29e7a607f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7e379402f38634eb0204e03b616111fff9515cec
Original-Change-Id: Ia31fb04b5c22defc71a0c02d9fa1eff93ccbc49d
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/311213
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12390
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
- CACHE_ROM is no longer used in the coreboot code. It was removed in
commit 4337020b (Remove CACHE_ROM.)
- CAR_MIGRATION is also no longer used in coreboot code - it was removed
in commit cbf5bdfe (CBMEM: Always select CAR_MIGRATION)
- MARK_GRAPHICS_MEM_WRCOMB was removed in
commit 30fe6120 (MTRR: Mark all prefetchable resources as WRCOMB)
Change-Id: I8b33a08c256f6b022e57e9af60d0629d9a3ffac8
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12327
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Select the EC PD and software sync kconfig options so they are
supported by the mainboard and call the EC early init function
to reboot into RO in recovery mode.
BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-kunimitsu coreboot
Change-Id: I48316df99b796c568c2481c72588b41f7147bec0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c7507470f82848062bc98da809d3c5fe1ca31998
Original-Change-Id: I822aac9c24718f226819e5d3fcc82a4024b7c5a7
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297751
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11575
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Select the BOARD_ID_AUTO kconfig option to have the coreboot
tables populated with the board ID and print it early in
romstage as well. Also clean up the code for it.
BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-kunimitsu coreboot
Change-Id: I90bd85ef14543717287cbeaaab77e6c54b94df97
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1fed7de4a0650a497a240b091fd2eb99d59e1433
Original-Change-Id: I82e9d17ab618b1aae1fd874d9247b7d52b42334d
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297750
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11574
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Move the CHROMEOS dependent symbols VIRTUAL_DEV_SWITCH and
VBOOT_DYNAMIC_WORK_BUFFER under the CHROMEOS config options for the
mainboards that use them.
Change-Id: Iad126cf045cb3a312319037aff3c4b1f15f6529d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11336
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Add CHROMEOS dependencies to selects for the following Kconfig
symbols:
CHROMEOS_RAMOOPS_DYNAMIC
CHROMEOS_RAMOOPS_NON_ACPI
CHROMEOS_VBNV_CMOS
CHROMEOS_VBNV_EC
CHROMEOS_VBNV_FLASH
EC_SOFTWARE_SYNC
LID_SWITCH
RETURN_FROM_VERSTAGE
SEPARATE_VERSTAGE
VBOOT_DISABLE_DEV_ON_RECOVERY
VBOOT_EC_SLOW_UPDATE
VBOOT_OPROM_MATTERS
VBOOT_STARTS_IN_BOOTBLOCK
WIPEOUT_SUPPORTED
This gets rid of these sorts of Kconfig errors:
warning: BOARD_SPECIFIC_OPTIONS selects CHROMEOS_VBNV_EC which has
unmet direct dependencies (MAINBOARD_HAS_CHROMEOS && CHROMEOS)
Note: These two boards would never actually have CHROMEOS enabled:
intel/emeraldlake2 has MAINBOARD_HAS_CHROMEOS commented out
google/peach_pit doesn't have MAINBOARD_HAS_CHROMEOS
Change-Id: I51b4ee326f082c6a656a813ee5772e9c34f5c343
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11272
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
CHROMEOS is a user-visible bool. It must not be 'select'ed in Kconfig.
That's why we have MAINBOARD_HAS_CHROMEOS. This is the fifth time I
find this being used wrong.
Why is this confusing/so hard to get right?
Change-Id: Icb4629355c63508f5a044b46842524b3d203c2da
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/11290
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
On Skylake, only UART2 is supported as debug port and the macros
INTEL_PCH_UART_CONSOLE_NUMBER, INTEL_PCH_UART_CONSOLE and the partial
code for UART0, 1 are cleaned up for Skylake and Sklrvp, Kunimitsu and
Glados boards.
BRANCH=none
BUG=chrome-os-partner:40857
TEST=Built for kunimitsu, checked the coreboot logs on LPSS UART2
Change-Id: I2fbcfb1d1ca6f59309a77c67d022cf4f5da7f7c0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e714c18d462bc7bdd7068309fb6be77da6973642
Original-Change-Id: I9343abd90ce685ea2d676047dccbefad7457b69f
Original-Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.ch@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/285793
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Wenkai Du <wenkai.du@intel.com>
Original-Tested-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: http://review.coreboot.org/10994
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
BOOT_MEDIA_SPI_BUS is int, not hex.
Change-Id: I5cbcc3889a025caab921208037c8a61d224078a7
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/10973
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Initial files to support the Kunimitsu board.
Matches chromium tree at 927026db
This board uses the Skylake FSP 1.1 image and does not build without the
FspUpdVpd.h file.
BRANCH=none
BUG=None
TEST=Build and run ChromeOS on kunimitsu
Change-Id: I1017a66bc811af51a0921e864b589ce2cb618082
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
