Commit Graph

851 Commits

Author SHA1 Message Date
Nico Huber 66cc843f3d libpayload: Revive ffs()
Revive ffs() in a more fancy way (that is more likely to be accepted).
We dropped it in
  7a8a4ab lib: Unify log2() and related functions
but there is at least one user: flashrom.

Change-Id: I4e3fc15816b778e640bceea0d89cd9624d271c2e
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11591
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-09-10 20:11:33 +00:00
Nico Huber a7c609c262 libpayload: Fix merge of PL011 UART support
Wished I hadn't seen that. Git saw the conflict (file was gone), both
committer and reviewer thought it would be a good idea to re-add it as
dead code (see 558e9b5: libpayload: Add minimal support for PL011 UART).

Change-Id: Ifea8113fbc59e0463eaedb86b976f54ec11113a9
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11604
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-09-10 09:19:11 +00:00
Nico Huber 602a82af7c libpayload: Add missing autoconf dependency
With new version of kconfig we have to trigger [silent]oldconfig each
time .config changed. We missed that, because config.h had no dependen-
cies.

Change-Id: I9f0dd8adbc3aa434a18cb4815b1ccbd1f6e7847b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11603
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-09-10 09:18:12 +00:00
Daisuke Nojiri ccda446e52 video_printf: align text
This change allows video_printf to left/center/right-align text depending on
the enum value provided by the caller. This is useful especially because usually
the length of formatted string is unknown before calling video_printf.

BUG=none
BRANCH=smaug
TEST=drew fastboot screens on Smaug
CQ-DEPEND=CL:296460

Reviewed-on: https://chromium-review.googlesource.com/292929
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 436f05f60c1b88626740a35913e3ad37b5c777a3)
Change-Id: If1d50b7d8ddaa86eddc1618946756184cb87bfe1
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295413
Reviewed-on: http://review.coreboot.org/11583
Tested-by: build bot (Jenkins)
2015-09-08 11:51:55 +00:00
Daisuke Nojiri abe03d25e2 video: add video_printf
video_printf prints strings on the screen with specified foreground and
background color.

BUG=none
BRANCH=smaug
TEST=verified messages printed on Smaug

Change-Id: I619625f7d4c5bc19cd9de64a0ba07899cf9ba289
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: e0ac4cb4c0d43b40f5c8f8f5a90eac45b0263b77
Original-Reviewed-on: https://chromium-review.googlesource.com/290130
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-(cherry picked from commit 75ea2c025d629c8fabc0cb859c4e8ab8ba6ce6e3)
Original-Change-Id: Ief6d1fc820330b54f37ad9260cf3119853460b70
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/290373
Reviewed-on: http://review.coreboot.org/11407
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-09-08 11:51:26 +00:00
Stefan Reinauer 4460703f59 Drop "See file CREDITS..." comment
coreboot has no CREDITS file.

Change-Id: Iaa4686979ba1385b00ad1dbb6ea91e58f5014384
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/11514
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-07 15:54:50 +00:00
Duncan Laurie 5c25d0e8cc libpayload: x86: Add read/write{8,16,32} variants that match coreboot
Add the now coreboot standard MMIO read/write accessors that were
already defined for other architectures but not x86.

This leaves the old read/write{b,w,l} variants in place as was done
on the other architectures, presumably to support old payloads that
have not been updated.

BUG=chrome-os-partner:43072
BRANCH=none
TEST=emerge-glados libpayload
CQ-DEPEND=CL:294711

Change-Id: I5ae3d755adcef0f6ff27aaa7c35a5b12ddc32e22
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: c09dd557050e3002fa5b8504980d72d4cb79a56c
Original-Change-Id: I58d928338335d3fe4bb7fe2bdc9c2967d8689118
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/294565
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11405
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-08-28 06:46:28 +00:00
Julius Werner e8a8a00342 libpayload: usb: dwc2: Always return 'size' transferred bytes for OUT
Seems like our transferred bytes calculation for OUT transfers that span
more than one packet had been wrong, and we just got lucky that we never
noticed it before. The HCTSIZ.xfersize register field we're reading only
counts bytes transferred by the last packet we sent.

OUT endpoints cannot have short transfers -- every transfer should
either finish all bytes we wanted to send or end in a proper error
condition. Therefore, in the absence of an error we can just conclude
that all input bytes have been transferred.

BRANCH=veyron
BUG=chrome-os-partner:35525
TEST=SMSC95xx netboot on Jerry now works.

Change-Id: I57349e697c428df6b56e2f6f62e87652ef1e7a94
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 0abee13b6d89dec12c6fff581ece1836393c7703
Original-Change-Id: Id0a127e6919f5786ba05218277705dda1067b8c3
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/293956
Original-Reviewed-by: yunzhi li <lyz@rock-chips.com>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/11404
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-28 06:46:19 +00:00
Julius Werner 4bfa29e947 arm64: xcompile: Add support for A53 erratum 843419
This patch adds support to enable a linker workaround to a hardware
erratum on some early Cortex-A53 revisions. Since the linker option was
added very recently, we use xcompile to test whether the toolchain
supports it first. It is also guarded by a Kconfig since only a few
ARM64 SoCs will need this and it incurs a performance penalty.

BRANCH=none
BUG=none
TEST=Turned it on or off for Smaug and confirmed that it (dis)appeared
in verbose make output accordingly.

Change-Id: I01c9642d3cf489134645f0db6f79f1c788ddb00d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 57128785760c4dfa32d6e6d764756443a9323cb7
Original-Change-Id: Ia5dd124f484e38460d75fb864304e7e8b18d16b7
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/294745
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11403
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2015-08-28 06:46:09 +00:00
Nico Huber f58746bd33 libpayload: Fix default_memmove() implementation
If I wanted to fill the whole memory address space with one byte, I
wouldn't try it that subtle.

With size_t beeing unsigned the loop condition >= 0 was always true.

Change-Id: Idee6a4901f6697093c88bda354b5e43066c0d948
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11286
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-08-19 16:35:08 +00:00
Yunzhi Li 4938426783 libpayload: usb: dwc2: fix usb plug/unplug bug
Check device connect status while waiting for usb transfer complete
Avoid coreboot get stuck when usb device unplugged

BUG=chrome-os-partner:35525
TEST=None
BRANCH=None

Original-Change-Id: Id103501aa0d8b31b0b81bef773679c0fad79f689
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292630
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292966
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: David Hendricks <dhendrix@chromium.org>

Change-Id: I49396b74131dbfda505d9d3de5adbdc87eb92ce1
Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/11236
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-19 14:04:15 +00:00
Julius Werner 6f4c7a6fde libpayload: usb: xhci: Fix list of cleared port change bits
The xhci_rh_port_status_changed() function tries to always clear all
port status bits, even though most of them don't interest us. This is
generally a smart thing to do since not clearing a status bit may cause
the controller to not generate any more Port Status Change Events.
However, the bitmask we currently use doesn't cover bit 23 (Port Config
Error Change) and instead covers bit 16 (Port Link State Write Strobe)
which is not really related to this and not a W1C bit. Probably a typo,
so let's fix that.

BRANCH=None
BUG=None
TEST=Plugged/unplugged a bunch of USB devices on an XHCI Falco.

Original-Change-Id: Ia83f5b72cce094859c0f0e730752d7b5cfa6e1c6
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/291842
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I11f5fe38cb70055daf6e866a8ee84ca80488e3bf
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11194
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:18:16 +02:00
David Hendricks 75daee5ee9 libpayload: Do not gate USB_DWC2 on USB_HID
This forward-ports the change from CL:277155 since the Kconfig file
was renamed from Config.in.

BUG=chrome-os-partner:41416
BRANCH=none
TEST=built and booted on Mickey, keyboard works at dev screen
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>

Original-Change-Id: Ibffa5188df51ecd7b8bdd631d4b767ec64130819
Original-Reviewed-on: https://chromium-review.googlesource.com/291138
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>

Change-Id: Iebb1da6ec8c7886a6eb9ebcc67b59d617496c555
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/11188
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@google.com>
2015-08-14 15:17:36 +02:00
Julius Werner 57ddd9abc7 libpayload: usb: xhci: Count new Max Scratchpad Bufs bits from XHCI 1.1
The 1.1 revision of the XHCI specification added an extra 5 bits to the
Max Scratchpad Bufs field of HCSPARAMS2 that newer controllers make use
of. Not honoring these bits means we're not allocating as many
scratchpad buffers as the controller expects, which means it will
interpret some uninitialized values from the end of the pointer array as
scratchpad buffer pointers, which obviously doesn't end well. Let's fix
that.

BRANCH=none
BUG=chrome-os-partner:42279
TEST=Makes a USB-related memory corruption issue disappear.

Original-Change-Id: I7c907492339262bda31cdd2b5c0b588de7df8544
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/291681
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Iba1007bfebffe1f564f78bb875fff9ba0fe11a38
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11189
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:17:30 +02:00
Yunzhi Li 8b4988933c libpayload: usb: dwc2: fix short packet transfer
If short packet detected, stop this transfer and return the actual
transferred size

BUG=chrome-os-partner:42817
TEST=Netboot could run well
BRANCH=None

Original-Change-Id: Icb4317f48aa04ac15bb1886b81d2e3c472d123d0
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/288215
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-(cherry picked from commit d372343b4e3d664ce2d76dbf55a5061b5d496bba)
Original-Reviewed-on: https://chromium-review.googlesource.com/291064
Original-Commit-Queue: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Julius Werner <jwerner@chromium.org>

Change-Id: I43d9edffe2074c037f2df203621863e54d2597fa
Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/11187
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:17:18 +02:00
Chunfeng Yun b4a24995c9 libpayload: usb: Fixup wrong use of config
replace CONFIG_LP_XHCI_MTK_QUIRK by CONFIG_LP_USB_XHCI_MTK_QUIRK

BRANCH=none
BUG=none
TEST=Rev0-oak

Original-Change-Id: I68f58ed3b02caa7cef8f0f60a4a8f5e9755c97a7
Original-Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/290522
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>

Change-Id: I316712e99e0b44d292dab27cf66e26837dc2e957
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-on: http://review.coreboot.org/11179
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:14:18 +02:00
Julius Werner 5f9a3f7fae libpayload: xhci: Carry over fixes from Chromium tree
This patch re-adds a few fixes that originally went into the
chromeos-2013.04 tree. I kinda seem to have slipped them into the
backport of Nico's original XHCI patch (crosreview.com/168097) instead
of making a new change, which was not very clever and caused them to be
forgotten in the later upstreaming wave.

Changing internal XHCI error numbers is just a cosmetic change to make
them uniquely identifyable in debug output. Bumping the timeout to 3
seconds is an actually important fix since we have seen mass storage
devices needing that much in the past.

BRANCH=None
BUG=None
TEST=Diffed payloads/libpayload/drivers/usb between chromeos-2013.04 and
chromeos-2015.07, confirmed that no serious differences remain.

Original-Change-Id: I03d865dbe536072d23374a49a0136e9f28568f8e
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/290423
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I5d773d3a23683fb2164916cc046f4a711b8d259e
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11178
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:14:09 +02:00
Daisuke Nojiri 03e8188a3f cbfs: fix printf for 64bit architectures
BUG=none
BRANCH=smaug
TEST=Built for Smaug

Original-Change-Id: I7ff577f97252265ca6c96963ca44a6fbd0de9f7a
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/290049
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-(cherry picked from commit 9cff308653766ea81978214e99a3d740aff4dbbe)
Original-Reviewed-on: https://chromium-review.googlesource.com/290116
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>

Change-Id: I5dcc17e0a42b46350fe6c398767f8155bdd0fd9d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: http://review.coreboot.org/11177
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:13:39 +02:00
Aaron Durbin e3260ec29a libpayload: usb: don't prematurely free the usb device
Before the controller's destroy_device() could interrogate
the usbdev_t object usb_detach_device() was freeing and
NULLing out the pointer. That results in all callers who
needed that object to start accessing random bits of memory.

This eventually led into free()ing memory it shouldn't which
corrupted the allocator's state. Eventually, all forward
progress was lost by way of a single ended linked list
turning into a circular list.

The culprit seems to be a bad merge in commit e00ba21.

BUG=chrome-os-partner:43419
BRANCH=None
TEST=Can boot into OS now w/o "hanging" on glados.

Original-Change-Id: I86dcaa1dbaf112ac6782e90dad40f0932f273a1f
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/290048
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>

Change-Id: I9135eb0f798bf7dbeccc7a033c3f8471720a0de5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11173
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-13 16:34:09 +02:00
Paul Kocialkowski f1b7afb4a4 libpayload: Kconfig include in lpgcc
Payloads will include headers from libpayload, which depend on kconfig.h, so it
has to be included in the command line produced by lpgcc.

Change-Id: I3b55928babba2896a112f8c5fae46365cf71d308
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11114
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-10 20:29:07 +02:00
Patrick Georgi 7db6cef7fd libpayload: Fix compile error in time.c if nvram support is disabled
rdtsc() is only used for nvram access.

Change-Id: I896116d6a5782e5e50aa3acfbe1831b080f55d34
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/11137
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-10 18:10:00 +02:00
Stefan Reinauer 2c6fe441a7 libpayload: Use CONFIG_LP_CCACHE instead of CONFIG_CCACHE
CONFIG_CCACHE was obsoleted a long time ago for libpayload.

Change-Id: Ib0a418d97f368439476e524b753160a6229bb9f6
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10710
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-09 21:02:37 +02:00
Patrick Georgi d7eb0cbf9a license headers: Drop FSF addresses again
Some FSF addresses found their way back into our tree.

Change-Id: I34b465fc78734d818eca1d6962a1e62bf9d6e7f3
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/11145
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-08-09 17:49:13 +02:00
Paul Kocialkowski 7572e66bc7 libpayload: lpgcc: CFLAGS and CMDLINE order inversion
When building an external payload with lpgcc, the provided cmdline needs to be
included before libpayload-specific CFLAGS so that the include priority is the
payload first. This way, a payload using e.g. Kconfig that declares a config.h
will have its config.h included first, instead of libpayload's config.h.

Change-Id: I19b8012623e04c92a427d74904aed7f3bf5f0996
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11113
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-09 13:07:04 +02:00
Paul Kocialkowski 5d5fcdd82b libpayload: .xcompile target is an actual file
Marking .xcompile as PHONY implies triggering the xcompile script each time make
is invoked. This is particularly problematic, especially when the script cannot
find the crossgcc toolchains on its own and has to be fed XGCCPATH.

Change-Id: Icb5ae82b210bca1ee9cf56d76130eefde481f81e
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11118
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-04 08:06:55 +02:00
Paul Kocialkowski 8d829bf2cd libpayload: Veyron configs unification
All the currently-provided configs for veyron boards are the same, so we might
as well have a common one that can be used on all boards.

Change-Id: I2e24f2d7a5206878381467b97f01d3e752a93289
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11115
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-04 08:06:45 +02:00
Paul Kocialkowski db0c0c4a60 libpayload: Allow for KBUILD_DEFCONFIG override
In order to specify a defconfig to libpayload, one might want to declare
KBUILD_DEFCONFIG in the make command line and run the defconfig target.

Change-Id: I2ade6f4ff2f0b6478a0831158028ebc79b5daa81
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11112
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-03 17:24:32 +02:00
Julius Werner bf697566da libpayload: lz4: Add output overrun check to incompressible case
The LZ4 decompressor currently doesn't check for output overruns before
writing data in the case where a block had been incompressible (and
included verbatim in the compression stream). This is extremely unlikely
with the default 4MB blocks, but still a nice thing to fix. We'll still
output as much data as we can before returning an error to support
partial decompression use cases.

This matches the behavior already in place for normal, LZ4-compressed
blocks where the decompression function is already (supposed to be)
doing complete bounds checking (although it is not guaranteed to output
all valid bytes before aborting on an output overrun, and you should try
to provide a few dozen bytes of extra buffer space beyond the parts
you're interested in on partial decompression).

BRANCH=None
BUG=chrome-os-partner:32184
TEST=None

Change-Id: I5e40c8cec8947ec0ec8f6d8c8fa2574cfb4dc958
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 636985334c9b3b93a12d4066d2829f1f999c9315
Original-Change-Id: Iecf44650aade60b9fa1b13e57da752fb482a3f3f
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/286240
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11016
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-07-21 21:27:42 +02:00
Julius Werner 752fba7846 libpayload: usb: Add support for SuperSpeed hubs
This patch adds support for the SuperSpeed half of USB 3.0 hubs, which
previously prevented SuperSpeed devices behind those hubs from working.

BRANCH=None
BUG=chrome-os-partner:39877
TEST=Played around with multiple hubs and devices on Oak and Falco, can
no longer find a combination that doesn't work.

Change-Id: I20815be95769e33d399b7ad91c3020687234e059
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3db96ece20d2304e7f6f6aa333cf114037c48a3e
Original-Change-Id: I2dd6c9c3607a24a7d78c308911e3d254d5f8d91d
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/284577
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: chunfeng yun <chunfeng.yun@mediatek.com>
Reviewed-on: http://review.coreboot.org/10958
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-18 09:40:48 +02:00
Julius Werner e44a4e8787 libpayload: usb: xhci: Prevent address reuse
We have been trying to avoid reassigning previously used USB addresses
to different devices since CL:197420, because some devices seem to take
issue with that. Unfortunately, that patch doesn't affect XHCI: those
controllers insist on chosing addresses on their own. The only way to
prevent them from reusing a previously assigned address is to not
disable that slot at all.

This patch implements address reuse avoidance on XHCI by not disabling
slots when a device is detatched (which may occur both on physical
detachment or if we simply couldn't find a driver for that device).
Instead, we just release as many resources as we can for detached
devices (by dropping all endpoint contexts) and defer the final cleanup
until the point where the controller actually runs out of resources (a
point that we probably don't often reach in most firmware scenarios).

BRANCH=none
BUG=chrome-os-partner:42181
TEST=Booted an Oak plugged into a Servo without having a driver for the
SMSC network chip, observed that it could still enumerate the next
device afterwards. Kept unplugging/replugging stuff until the cleanup
triggered and made sure the controller still worked after that. Also
played around a bit on a Falco without issues.

Change-Id: Idfbab39abbc5bc5eff822bedf9c8d5bd4cad8cd2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 88c6bcbc41156729c3c38937c8a4adebc66f1ccb
Original-Change-Id: I0653a4f6a02c02498210a70ffdda9d986592813b
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/284175
Original-Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10957
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-18 09:40:32 +02:00
Yunzhi Li ebd3da7dba libpayload: usb: dwc2: support split transaction
With split transaction, dwc2 host controller can handle full- and
low-speed devices on hub in high-speed mode. This commit adds support
for split control and interrupt transfers

BUG=None
TEST=Connect usb keyboard through hub, usb keyboard can work
BRANCH=None

Change-Id: If7a00db21c8ad4c635f39581382b877603075d1a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4fb514b7f7f7e414fa94bfce05420957b1c57019
Original-Change-Id: I07e64064c6182d33905ae4efb13712645de7cf93
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/283282
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/10956
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-16 22:39:59 +02:00
Patrick Georgi 2272b80a1d libpayload: assume cbfs file alignment is 64 byte
Change-Id: I8dfd8fbd452ce92fbca2cf095bc5e43e4a26969d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10920
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-15 16:34:50 +02:00
Patrick Georgi f61b35d5b0 libpayload: store boot media information in sysinfo
Write boot media information in sysinfo, if it exists. This allows picking the
right CBFS for further files in case there are several.

Change-Id: I75a8ee6b93f349b9f2fab1e82826aba675949c0a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10869
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-07-14 22:37:10 +02:00
Patrick Georgi 89f73dccdb libpayload: Add support for handling fmaps
They will become more common soon, so better support them now.

Change-Id: I2b16e1bb7707fe8410365877524ff359aeefc161
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10868
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-14 18:12:06 +02:00
Julius Werner 6df355da87 libpayload: Fix arithmetic precedence in div_round_up()
Well, this is just embarrassing...

BRANCH=None
BUG=None
TEST=None

Change-Id: I7c443d2100b6861d736320ac14c1bd9965937a66
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 455e3784882ea1b76bcf8e17724869e37d9c629d
Original-Change-Id: Ia33e98aeaa8e78e3e3d2c7547e673a623ea86ce2
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/284596
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/10879
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Martin Roth <gaumless@gmail.com>
2015-07-13 09:19:42 +02:00
Stefan Reinauer 5d866213f4 libpayload: Have make install save .xcompile file
Useful information, record it in the destination directory,
together with .config.

Change-Id: Icf3282f61f502b37f9f06d7d5a0a630f49c96ed2
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10864
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-09 08:47:41 +02:00
Stefan Reinauer f53dbfaa8c libpayload: Use top level xcompile
Instead of having a second copy that already within 2-3 days
becamer quite outdated, use the same xcompile copy for coreboot
and libpayload, as we do with Kconfig already.

This requires a simple change to the top level xcompile to understand
both CONFIG_COMPILER_GCC and CONFIG_LP_COMPILER_GCC (only one of
them will occur at the same time)

libpayload's .xcompile target was moved later so that it can make use
of $(top)

Change-Id: I44001067f551cd0776dd303cbaeaa40eb3d5c1db
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10863
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-09 08:47:16 +02:00
Julius Werner bf27391da5 libpayload: Add LZ4 decompression algorithm
This patch adds support for the LZ4 decompression algorithm to
libpayload. It's what all the cool kids are using for decompression
these days and has many interesting advantages over LZMA (and everything
else I know of): blazing fast decompression (20(!) times faster than
LZMA, twice as fast as LZO on my Cortex-A72), no memory requirements on
decompression, and possibly in-place decompression support. It pays for
that with a lower compression ratio (about 50% larger compressed size
than LZMA, 10% larger than LZO for an ARM64 Linux kernel binary), but
the boot time math still works in its favor for our IO speeds.

This patch only adds the raw decompression functions for use by external
payloads, we can later try integrating them in CBFS. It copies the
decompression code itself unmodified from the upstream LZ4 library at
github.com/Cyan4973/lz4 which will hopefully make it easy to update. The
frame format parsing is reimplemented since the upstream version looks
unnecessarily complex and unreadable for our needs.

BRANCH=smaug
BUG=chrome-os-partner:32184
TEST=With other patches, booted ARM64 kernel that got compressed from
15M to 5.1M and decompresses in 44ms.

Change-Id: I65bdc4b2b19bd51c7b7e17a4e4b79da301a2a014
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f8a1fc996d5b0234d07f567fa8163d0f802d5144
Original-Change-Id: I15c0620da05561ade2552b15ffdf6bb3afd7eb26
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282743
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10845
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-09 00:10:16 +02:00
Patrick Georgi 838c88f1b7 libpayload: update defconfigs
That way they don't need an initial 'make oldconfig' pass to
be useful again.

Change-Id: I3724fffab24b69478b8077f34e9d787555fd157b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10805
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-08 10:25:11 +02:00
Patrick Georgi 9b8c738942 libpayload: don't overwrite CFLAGS
Makefile already sets it to contain the architecture specific flags,
don't drop them, but add to that instead.

Change-Id: I147e6480ab2b3c1ee4f4ace511197b4ba94280b8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10804
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:27:17 +02:00
Patrick Georgi 21fc58b660 libpayload: architecture mapping is now done in xcompile
This helps the build system find i386 and mips compilers.

Change-Id: I17d18019b556190f860d288e66f368f8d29ca24d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10803
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:27:01 +02:00
Patrick Georgi 46eeb339e9 libpayload: drop LIBGCC_FILE_NAME variable
It's unused. If we need something like that, .xcompile provides it,
and in a cross-platform and clang-aware way.

Change-Id: Ic1bdc2e3e252d612a5b99ad4e8caebc5158a485f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10802
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:26:42 +02:00
Patrick Georgi db0325591d libpayload: defer including .xcompile
It needs to come after DOTCONFIG so that the compiler decision can
be made.

Change-Id: I5c6730ac58ab8731f07bb7c5161b2d0a59588e28
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10801
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:26:12 +02:00
Patrick Georgi b7d8f26eec libpayload: Add compiler switch
clang is totally untested, but it mirrors coreboot now.

Change-Id: I0e13ff8bba2007159a4a795ca07d187504b606b2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10800
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:25:52 +02:00
Patrick Georgi 3f02466b00 libpayload: mark util/xcompile/xcompile executable
Change-Id: I97088df1550f580d4648c7cccbd81c696fcfe2dc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10799
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:25:05 +02:00
Daisuke Nojiri 9150e5e0f2 cbfs: define libpayload_init_default_cbfs_media weakly
To allow a payload to define its own libpayload_init_default_cbfs_media,
default implementation needs to be defined weakly.

BUG=none
BRANCH=tot
TEST=dumped a cbfs file from depthcharge cli on jerry

Change-Id: Ice73ae5a63dfd49e79c0eeb92d4eade016d61c39
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1f308177fffb0d525fdb50f8d024568bb9025352
Original-Change-Id: I4721139aea3169c62c10a2a26582bd9277e4cb83
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/283061
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10783
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:42:12 +02:00
Daisuke Nojiri 3740546bd8 sysinfo: remove unused tag for struct spi_flash
This will conflict with struct spi_flash defined in spi_flash.h

BUG=none
BRANCH=tot
TEST=built libpayload for veyron jerry

Change-Id: I7e1be28cf430021944fc96890082a0704d093e9f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0f0b8a7ec114046335fb1a51b6a92e10e5a16520
Original-Change-Id: I6d4f8a8e93aeb055f7dd6e5e8fd5e6c6153ab837
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282588
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: http://review.coreboot.org/10782
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:41:54 +02:00
Daisuke Nojiri e0a8a88912 update common base header files
IS_ENABLED is defined in kconfig.h, thus, should be included in
libpayload.h.

BUG=none
BRANCH=tot
TEST=built coreboot/libpayload for veyron_jerry

Change-Id: I9c5879b6125ac66a75a507ab07a6816ab54ed0ba
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 51dcd58a841009081fdefcadf9aa74286152dde6
Original-Change-Id: I30e6d87c9de827a214a6100449cd716e773c2ba3
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282587
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: http://review.coreboot.org/10781
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:41:38 +02:00
Julius Werner d8086876a7 lzma: Return correct amount of decompressed bytes
The LZMA functions are supposed to return the decompressed size, but
what they actually return is just an unaltered field from the LZMA
header that is *supposed* to contain the decompressed size. Apparently
some encoders just overshoot that for no good reason. This patch changes
the code such that the actual amount of decompressed bytes is returned.

BRANCH=smaug
BUG=None
TEST=Printed output bytes when decompressing kernels with LZMA in
depthcharge, noted that amounts now make sense.

Change-Id: Icdd8f782aa87841f770eff4c14a08973530c7446
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 24b2fa8c9a342ca4288dad1430c8965395f00263
Original-Change-Id: Ib4cf8673846aedd34656e594ce7b8ea875b56099
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282742
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10777
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:40:37 +02:00
Yunzhi Li aa33609d28 libpayload: usb: dwc2: support interrupt transfer
dwc2 host core do not have a periodic schedule list, so try to send
an interrupt packet in poll_intr_queue() function and use frame
number read from usb core register to calculate time and schedule
transfers.

BUG=None
TEST=Tested on RK3288 with two USB keyboards(connect to SoC without
USB hub), both work correctly.
BRANCH=None

Change-Id: I16f7977c45a84b37c32b7c495ca78ad76be9f0ce
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3d0206b86634bcfdbe03da3e2c8adf186470e157
Original-Change-Id: Ie54699162ef799f4d3d2a0abf850dbeb62417777
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/280750
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: http://review.coreboot.org/10774
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:40:02 +02:00