When a new variant is created, its SPD_SOURCES contains a placeholder
file, to avoid a build failure due to SPD_SOURCES being empty. Currently
these placeholder files live with the rest of the SPD files in soc and
mainboard directories, e.g.
src/soc/intel/alderlake/spd/placeholder.spd.hex
Add a similar placeholder SPD file to the new spd/ directory.
BUG=b:191776301
TEST=None
Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: Ia6d76ed512a7e44221fc93ad960790be575c44c2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57732
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Use the new unified version of the spd_gen tool to generate all LP4x and
DDR4 SPDs, storing them in a new spd/ directory. Storing them in a
common location allows platforms with the same SPD requirements to share
SPD files, reducing duplication compared to storing SPDs in soc/ and
mainboard/ directories.
For each memory technology there are multiple sets of SPDs. Each set
corresponds to a set of platforms with different SPD requirements, e.g.
due to different memory training code expectations. A manifest file
(platforms_manifest.generated.txt) lists the platform -> set mappings.
Commands used to generate SPDs:
cp util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt \
spd/lp4x/memory_parts.json
cp util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt \
spd/ddr4/memory_parts.json
util/spd_tools/bin/spd_gen spd/lp4x/memory_parts.json lp4x
util/spd_tools/bin/spd_gen spd/ddr4/memory_parts.json ddr4
BUG=b:191776301
TEST=None
Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: Iac82847a1a0c1f2e7271d0d3b3a7261849813a24
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57514
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reka Norman