This contains the following commits:
* 835724d: mainboard/starlabs/starbook: Update the EC binaries
for StarLabs
* ecbe941: soc/mediatek: Update capitalization of coreboot
* 0e4444e: soc/mediatek/mt8188: Update MCUPM firmware from
v1.01.02 to v1.01.03
* 88570f6: mainboard/starlabs/starbook/adl: Update the EC binary
to 1.01 by Sean Rhodes
* f8e84db@ mainboard/starlabs/cezanne/starbook: Add EC binary
1.02 by Sean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I7afd43102718f211fe8d4fd69061dcdce5bfc323
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68587
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Updating from commit id b827ddb9:
2022-09-01 06:37:33 +0000 - (tests: Ensure auxfw sync runs after EC sync)
to commit id 148e5b83:
2022-10-25 09:36:59 +0000 - (Makefile: Fix and simplify the RUNTEST test wrapper)
This brings in 28 new commits:
148e5b83 Makefile: Fix and simplify the RUNTEST test wrapper
a9c47c41 futility/cmd_show: set uninitialized variable
e18a6cda gscvd: presume GBB flags are zero when hashing the RO space contents
0b0aee9c gscvd: refactor discovering GBB in the image
ff1749cb futility: add option to save ro_gscvd section in a blob
84c65cd3 vboot_reference: Check OS/firmware mismatch and report to UMA
9a1be550 cmd_update: avoid variable name aliasing
d0f7fdf6 treewide: Fix copyrights and extra new lines at end of file
0ca75fd1 tpm_lite: Fix copyrights, line endings, extra new lines at end of file
4ca43a34 crossystem: arm: Retry if we fail to read a GPIO
f1a7efc0 futility: updater: Scan patch files for the signer_config manifest
64803227 futility: updater: Support patching GSCVD
2aa69d0c futility: Remove validate_rec_mrc command
0ca7a9e4 firmware: host: futility: Add CBFS metadata hash support
aaeb307f futility: Use ccd update mode for suzyq ti50
aa44b7cf vboot: gbb_flags_common should treat ccd_ti50 like ccd_cr50
ff8bb2d9 futility: Address double free
6a33a0fc treewide: Fix license headers to conform with linter
b2b4f767 DIR_METADATA: Add V2 Test Plans.
5346938c futility gscvd: add option to print out root key hash
5790c0aa gscvd: add support for reading ranges from the image
499e5743 gbb_flags_common.sh: Restore tmpfile cleanup trap
f3f9d2a6 scripts/OWNERS: Fix engeg email chromium -> google
ce620761 tests: Remove --allow-multiple-definition linker option
956c2efb futility: Skip picking apart an x86 kernel if has the EFI stub
9f2e9804 Avoid build failures on recent distros
62cc7885 subprocess: Log subprocess arguments when running
3bd35108 2api: Add a new entry point for only loading and verifying the kernel
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I9a16d6e02cee34140ec375ed6166f47560459140
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68540
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This picks up the following changes:
4ed38e55 glinda: add placeholder blobs
6de2d3c2 mendocino: Add all blobs from PI 1.0.0.3
Change-Id: Ic2d024f9e5dcd73abed9123b6a6255fe0c28fd4a
Signed-off-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68870
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Updating from commit id 7805999e6:
2022-09-05 16:42:34 +0200 - (Merge changes from topic "st-nand-updates" into integration)
to commit id c45d2febb:
2022-10-12 15:56:24 +0200 - (Merge "fix(ufs): retry commands on unit attention" into integration)
This brings in 288 new commits.
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Change-Id: I4137cab0a1a352e94e21f105717ae0b6c515b75b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68386
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
That's 3 years of development, including adapting to new, shiny,
Cascade of Attention-Deficit Teenagers[0] induced incompatible
assembler syntaxes.
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
[0] https://web.archive.org/web/20220824045741/https://www.jwz.org/doc/cadt.html
Change-Id: I8606700149ca74e93b85d78546a29df2916d39b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67456
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Updating from commit id e0a6a512b:
2022-02-03 22:59:34 +0100 - (Merge changes from topic "msm8916" into integration)
to commit id 7805999e6:
2022-09-05 16:42:34 +0200 - (Merge changes from topic "st-nand-updates" into integration)
This brings in 1030 new commits.
Change-Id: I981956fbdcbcfa4ce185652478b9bb30d40f5686
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67358
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
CL:3825558 changes all vb2_digest and vb2_hash functions to take a new
hwcrypto_allowed argument, to potentially let them try to call the
vb2ex_hwcrypto API for hash calculation. This change will open hardware
crypto acceleration up to all hash calculations in coreboot (most
notably CBFS verification). As part of this change, the
vb2_digest_buffer() function has been removed, so replace existing
instances in coreboot with the newer vb2_hash_calculate() API.
Due to the circular dependency of these changes with vboot, this patch
also needs to update the vboot submodule:
Updating from commit id 18cb85b5:
2load_kernel.c: Expose load kernel as vb2_api
to commit id b827ddb9:
tests: Ensure auxfw sync runs after EC sync
This brings in 15 new commits.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I287d8dac3c49ad7ea3e18a015874ce8d610ec67e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
This picks up the following changes
83c44ad mendocino: Add additional SPI configs
5141d91 mendocino: Add all blobs from PI 1.0.0.1
3b29a7d cezanne: Upgrade microcode patch to 00A50F00h
BUG=239072117
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I1060dc7bec8f436dccf270bc3abde75cb09bb591
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66462
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
The latest master adds the missing MemInfoHob.h to IOT ADL-P &
ADL-S folders.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I8ef998b2e414d3d63494e6177b4fde2dc26e9d55
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66366
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Updating from commit id 61971455:
vboot_ref/Makefile: Expose symbols irregardless of USE_FLASHROM
to commit id a975eed3:
2kernel.c: check display request in vb2api_kernel_phase2
This brings in 20 new commits.
BUG=b:172339016
TEST=builds with vboot_ref uprev.
Signed-off-by: Selma Bensaid <selma.bensaid@intel.com>
Change-Id: I8f9339f169c4c16216a9f380a7ca00a36098d7f8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This contains the following commits:
* d55c315 mb/starlabs: Remove padding from logo
* 6412d38 mb/starlabs/starbook/cml: Update EC from 1.03 to 1.07
* fb72ac5 mb/starlabs/starbook/tgl: Update EC from 1.00 to 1.03
* cda5eaa mb/starlabs: Rename labtop to starbook
* f16020a Revert "soc/mediatek/mt8186: Update SPM firmware to
pcm_suspend_v0215…
This also changes starlabs/labtop Kconfig to use the new paths for
the EC binaries from the above commits.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I83143118af422276ee335ad4ef9eca76f54a9fc0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Update 3rdparty/fsp submodule to include AlderLake FSP.
Hook up the Kconfig settings to point to Fsp.fd and headers for
ADL-S and ADL-P platforms which the FSP has been published for.
The FSP binaries are compliant with the specification revision 2.3
so update these settings accordingly.
Although FSP header is v2.3 compliant, the features set of the FSP
v2.3 is not being met.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I577931da7952b681534bb78b7b2c7683cd99febd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65519
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Updating from commit id 25b94935:
vboot_ref/futility: Wrap flashrom_drv behind USE_FLASHROM
to commit id 61971455:
vboot_ref/Makefile: Expose symbols irregardless of USE_FLASHROM
This brings in 90 new commits.
BUG=b:207808292,b:231152447
TEST=builds with vboot_ref uprev.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Change-Id: Id542f555732b58e1205e757393f9d5fdbde2de68
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Updating from commit id 9ab0f0b:
sc7280: Update AOP firmware to version 379
to commit id e8efa5d:
sc7180/boot: Update qclib blobs binaries from 44 to 46
This brings in 7 new commits.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I5f0a9075cde90991e927f3bfb75246bdb9877837
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64844
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Updating from:
f4bbf5a Apollo Lake MR10 FSP
Updating to:
c607bab Whitley&CedarIsland: Fix link issue with newer toolchains
This brings in 10 new commits:
* c607bab Whitley&CedarIsland: Fix link issue with newer toolchains
* 08c041d Alder Lake - P IoT FSP PV
* a3dc6c6 Alder Lake - P IoT FSP PV
* 2cedeba Alder Lake - S IoT FSP MR1
* 72266f6 Elkhart Lake MR3 FSP
* 48d4c23 Tiger Lake - IoT FSP 4391_03
* e86327d Alder Lake - S IoT FSP PV
* 478a80a Whitley FSP 2.2.0.3A
* cb94d31 Whitley FSP 2.2.0.3A
* d678813 Alder Lake - S IoT FSP PV
Change-Id: I2473bfa5718676e5b6c90b76a3b817cd9f55da4b
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64568
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
Updating from commit id 73193689c:
2021-12-06 16:47:33 +0100 - (Merge changes I7c9f8490,Ia92c6d19 into integration)
to commit id e0a6a512b:
2022-02-03 22:59:34 +0100 - (Merge changes from topic "msm8916" into integration)
This brings in 324 new commits.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I44bca36f4b05e08fe7d7de0966131be84c0a7d2b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60818
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Updating from commit id 98db386:
2021-08-03 11:57:30 -0700 - (herobrine: Add gsi_fw_blobs and Release Notes)
to commit id 9ab0f0b:
2022-01-18 19:01:30 +0530 - (sc7280: Update AOP firmware to version 379)
This brings in 13 new commits:
9ab0f0b sc7280: Update AOP firmware to version 379
826cb9c sc7180/boot : Update qclib blobs binaries and release notes
ddf67d1 sc7280/ boot and shrm blobs updated
8592f11 sc7280: Update AOP firmware to version 364
aef8a0a sc7280/ boot and shrm blobs updated
c72bc4e sc7280/cpucp: Update cpucp blobs binaries and release notes version from 054 to 060
33e57fe sc7280/boot,/shrm : Update qclib blobs binaries and release notes version 13
511851b sc7180/boot : Update qclib blobs binaries and release notes version 30
f91d0ef herobrine: qc_sec blob update
8c50f78 sc7180/boot : Update qclib blobs binaries and release notes
8523ef4 sc7180/qtiseclib: Update version from 26 to 44
5b77a37 sc7280/qtiseclib: Update version from 33 to 44
4815cc2 sc7280: Update AOP firmware to version 360
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I510141916900507fd29a0e9315a3f8d954bc0cab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This adds the following commits:
* 22ce1b5 cezanne: Upgrade SMU to 64.60.0
* dd37ad2 cezanne: Update ABL to 0x1B096070
* 01fbf5d cezanne: Update SMU to 64.58.0
* f638765 cezanne: Update ABLs to 0x1A296070
BUG=none
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I8f51cb007ce4127428b7b81095fb2c7afb33e608
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61046
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Updating from commit id 4c21b57eb:
2021-07-19 11:36:07 +0000 - (pd: Fix missing polarity_rm_dts in some conditions)
to commit id e486b388a:
2022-01-12 21:11:11 +0000 - (zephyr: Update power policy for API change)
This brings in 2212 new commits.
Signed-off-by: zhixingma <zhixing.ma@intel.com>
Change-Id: I4437f09c3193ec7c89f7f9550940a0fa5464a511
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Thejaswani Putta <theja427@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
Updating from commit id 586aafa3a:
2021-07-19 05:36:18 +0200 - (Merge "errata: workaround for Neoverse V1 errata 1791573" into integration)
to commit id 73193689c:
2021-12-06 16:47:33 +0100 - (Merge changes I7c9f8490,Ia92c6d19 into integration)
This brings in 684 new commits.
Change-Id: I4173f3cb646839ad12c4e43e8c50b0be53364f04
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This brings in EC firmware binaries for Star Labs laptops, as
well as a custom bootsplash image.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Iab5ff610b19fbe6a2e61999457a13a86d47f0ca7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This adds the following commits from the submodule:
* cezanne: Upgrade blobs to 1.0.0.5
* cezanne: Upgrade ABL to ver. 0x19036070
* cezanne: Upgrade SMU FW to 64.52.0
* cezanne: Upgrade SMU to 64.57.0
* cezanne: Update ABLs to 0x1A296070
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id7b3f5d38d34c2714548dff92b7b83fb2628e936
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58989
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Updating from commit id c5a482ed:
2021-09-08 17:16:59 +0000 - (sign_official_build: disable gsetup for reven)
to commit id 13f601f:
13f601f vboot: boot from miniOS recovery kernels on disk b
This brings in 14 new commits.
Signed-off-by: Selma Bensaid <selma.bensaid@intel.com>
Change-Id: I66788ea434a6000435b97ce64107f3b5da882414
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57994
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This includes the Cedar Island FSP which is used by xeon_sp/cpx.
Also updates EHL FSP to latest MR1 version.
Change-Id: I1c2d440ce0f20a0922e5d91f615771843281fca6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57488
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Updating from commit id 4423276b:
2021-08-31 17:41:34 +0000 - (crossystem: add a hwid override mechanism from chromeos-config)
to commit id c5a482ed:
2021-09-08 17:16:59 +0000 - (sign_official_build: disable gsetup for reven)
This brings in 10 new commits.
Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Change-Id: I67d4bfa182eae98bb23ae487f117c991502b66ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57639
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Update submodule pointer to include microcode for TGL and others.
Tested the following still boot:
- galp3-c (WHL-U): sig=0x806eb pf=0x80 revision=0xe9
- oryp5 (CFL-H): sig=0x906ea pf=0x20 revision=0xe9
- gaze15 (CML-H): sig=0xa0652 pf=0x20 revision=0xe9
coreboot reports the revision as -1 from what it actually is. i.e.,
these should report revision=0xea (and that is what Linux reports).
However, this behavior is not new.
Change-Id: I084ba67e8eaf7383f1c05fa5589b63c92ff900b1
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56861
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Now that gsi_fw blob has landed, need to uprev the qc_blobs.
Change-Id: I0bf67a560ee2e5d771bdb71b60e3d3d372dad567
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56776
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Updating from commit id 1e800ac83:
2021-03-01 22:59:54 +0000 - (docs: point md files in master to main/HEAD)
to commit id 4c21b57eb:
2021-07-19 11:36:07 +0000 - (pd: Fix missing polarity_rm_dts in some conditions)
This brings in 3145 new commits.
Change-Id: Iff2e9f766e750070d71644c2f9895ad10e8b1c9a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56431
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Updating from commit id 96404aa27:
2021-05-13 18:27:27 +0200 - (Merge "build(hooks): update Commitizen to ^4.2.4" into integration)
to commit id 586aafa3a:
2021-07-19 05:36:18 +0200 - (Merge "errata: workaround for Neoverse V1 errata 1791573" into integration)
This brings in 207 new commits.
Change-Id: Iaf8af5ffaf377070ee1430ed7cfdc51001a1ba6b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56416
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Now that cpucp blobs have landed, need to uprev the qc_blobs.
Change-Id: I62dc410cee7baf5efa5c0406f35ee05a535f49b1
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56574
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Felix Singer