2 Commits

Author	SHA1	Message	Date
Arthur Heymans	ea1e36694d	coreboot_tables: Drop uart PCI addr ... Only edk2 used this to fill in a different struct but even there the entries go unused, so removing this struct element from coreboot has no side effects. Change-Id: Iadd2678c4e01d30471eac43017392d256adda341 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>	2022-10-26 14:12:06 +00:00
Mariusz Szafranski	94b64431f3	configs: Add intel/harcuvar FSP 2.0 sample configuration ... Add Intel Harcuvar CRB FSP 2.0 sample configuration. Change-Id: I60ec6921eca17a910cd1b9f8b0b86a1a1bf9bbea Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com> Reviewed-on: https://review.coreboot.org/21693 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: FEI WANG <wangfei.jimei@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>	2017-10-04 02:56:33 +00:00