Commit Graph

39687 Commits

Author SHA1 Message Date
Elyes HAOUAS 488f5d8593 mb/packardbell: Convert to ASL 2.0 syntax
Built for packardbell/ms2290 provides same build/dsdt.dsl file.

Change-Id: I5f1dbb2595c3ee8cb35bb8a6431288f4a96ce978
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:47:40 +00:00
Elyes HAOUAS a59b5f8ca3 mb/lippert: Convert to ASL 2.0 syntax
Built provides same dsdt.dsl file for  lippert/frontrunner-af

Change-Id: I61d8af98e2003547e332f463b23c1e1cf79f7f00
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46083
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:46:27 +00:00
Elyes HAOUAS f6676df8b5 mb/lenovo/x230: Convert to ASL 2.0 syntax
Change-Id: I18667ae74454e0db83fb40d8f130909510ddc379
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46206
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:45:06 +00:00
Elyes HAOUAS 8972cacd48 mb/lenovo/x1_carbon_gen1: Convert to ASL 2.0 syntax
Change-Id: I9764d90e713f35d54056fbafae3e3ada18bea1eb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46202
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:44:51 +00:00
Elyes HAOUAS bbc3cf499a mb/lenovo/x131e: Convert to ASL 2.0 syntax
Change-Id: I3bee00030f03577b0449202233f7e76f7de96339
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46201
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:44:27 +00:00
Elyes HAOUAS f608a9b8c6 mb/lenovo/t530: Convert to ASL 2.0 syntax
Change-Id: I95eab372b3c6b6df5231f0d232e878576bab5290
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46200
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:44:09 +00:00
Elyes HAOUAS 03437f0773 mb/lenovo/t520: Convert to ASL 2.0 syntax
Change-Id: Ice7cfc263c339ba9ec3705c1cee44a6d69f2e4d3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46199
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:43:55 +00:00
Elyes HAOUAS 15a5b0a571 mb/lenovo/t440p: Convert to ASL 2.0 syntax
Change-Id: I91e25fe62080582b925fa1f1a88512f318ab9415
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46198
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:43:42 +00:00
Elyes HAOUAS 3b2d9970dc mb/lenovo/t430s: Convert to ASL 2.0 syntax
Change-Id: I2825dff6b68da9b1e2bb13f03a4251af02438b66
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46197
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:43:23 +00:00
Elyes HAOUAS c0ee13a730 mb/lenovo/t430: Convert to ASL 2.0 syntax
Change-Id: Id4a724193c4c120373a3e696ebd1fb7155fd8531
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46196
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:43:04 +00:00
Elyes HAOUAS 9d403afe5b mb/lenovo/t420s: Convert to ASL 2.0 syntax
Change-Id: I6e928c23165abad623ee3c2a26e090b029d55572
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:42:48 +00:00
Elyes HAOUAS 1cc58cff6b mb/lenovo/l520: Convert to ASL 2.0 syntax
Change-Id: I9d0e4982888823bb62a174a603a126676e68e308
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46190
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:42:32 +00:00
Elyes HAOUAS dc324792be mb/lenovo/g505s: Convert to ASL 2.0 syntax
Change-Id: I56f844706ba6bde3e57a6a81ff1d8e16863913f2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46189
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:42:17 +00:00
Elyes HAOUAS 9dfa63b3fd mb/lenovo/t420: Convert to ASL 2.0 syntax
Change-Id: I3890f75e3c27a689e9d57b4708514160e1550fdb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46194
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:41:18 +00:00
Elyes HAOUAS cb108eef21 mb/lenovo/t410: Convert to ASL 2.0 syntax
Change-Id: I5859c64b0ccd1dfdce040b2c3bbdd9192617ffbe
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46193
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:41:03 +00:00
Elyes HAOUAS 9759dc334e mb/lenovo/x60: Convert *.asl to ASL 2.0 syntax
Generated 'build/dsdt.dsl' are identical.

Change-Id: I305561625d973093645236c77ef13a96ab780f94
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46011
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:40:25 +00:00
Elyes HAOUAS 328a023795 mb/lenovo/x220: Convert to ASL 2.0 syntax
Change-Id: I4c5c67d70e004eeece61e66d427d6f9df9cab4ec
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46205
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:39:37 +00:00
Elyes HAOUAS 23af35f040 mb/lenovo/x201: Convert to ASL 2.0 syntax
Generated 'build/dsdt.dsl' files are identical.

Change-Id: I3b553e1b68ee8f236fcab311a076001b94a47975
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46204
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-24 21:39:18 +00:00
Elyes HAOUAS 965f98c8dc mb/lenovo/x200: Convert to ASL 2.0 syntax
Generated 'build/dsdt.dsl' are identical.

Change-Id: I0767afcb0ffdd6f9a8d83209955d42d9e89325e9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46203
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:38:12 +00:00
Elyes HAOUAS 635ac11deb mb/biostar/am1ml: Convert to ASL 2.0 syntax
Generated 'dsdt.dsl' files are identical.

Change-Id: Ifdd5008bcb9c7e41e637a30f70316c7926f927b5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:36:28 +00:00
Elyes HAOUAS d67cf181bf soc/intel/quark/gpio_i2c.c: Use __func__
Change-Id: Id84a88933d32f60dd8d864d9a10d84a2b3c365ff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49563
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:28:19 +00:00
Elyes HAOUAS 7dbc4a4658 soc/intel/denverton_ns/pmc.c: Use __func__
Change-Id: I06134e48b2d33c178883fc2047bcfbad417c6d02
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:27:07 +00:00
Elyes HAOUAS f9e18520c9 soc/intel/denverton_ns/npk.c: Use __func__
Change-Id: Ib0f425d74bc219ef518394526b51f2756eb95d61
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
2021-01-24 21:26:23 +00:00
Elyes HAOUAS e98dbf31f2 soc/intel/denverton_ns/lpc.c: Use __func__
Change-Id: Ic83a6a5db3b3d8a08c92064f8039d1bac825ffc3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:25:56 +00:00
Elyes HAOUAS 9cf49da224 mainboard/lenovo/s230u/smihandler.c: Use __func__
Change-Id: If46ef5ffbd3de82d793a095b011e5740b776ff14
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:24:28 +00:00
Elyes HAOUAS e167c38775 mainboard/intel/strago/ec.c: Use __func__
Change-Id: Ifa30e9d2a71eae9a438e84367fd8b4f8bd920983
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:24:05 +00:00
Elyes HAOUAS 038dc4535c mainboard/intel/emeraldlake2/ec.c: Use __func__
Change-Id: I75f534245d37f401357b611efc5c190e8a872d02
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49554
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:23:44 +00:00
Elyes HAOUAS 1ad0f6d90b ec/acpi/ec.c: Use __func__
Change-Id: I4823b84d851d7d1f0f48be44ab28e7365b553b6f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49553
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:23:30 +00:00
Elyes HAOUAS 75d19d740b drivers/intel/gma/opregion.c: Use __func__
Change-Id: Ia45825ade0c9d24d5b87882e21bfc6df82a693e6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:23:17 +00:00
Elyes HAOUAS 36f9ea6f2a drivers/elog/elog.c: Use __func__
Change-Id: I024a0c2d7c53634c58d5d80522933ecad554d7c9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:22:58 +00:00
Elyes HAOUAS 0c1d660263 device/pci_rom.c: Use __func__
Change-Id: I24c40d511eeaa5073acd2b47b20b4ec2f85bb69e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49545
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:22:34 +00:00
Elyes HAOUAS 433bc3eed3 mb/lenovo/t400: Convert to ASL 2.0 syntax
Change-Id: I4e6d5048ca9e949a70f3619f05b74870c1f1fe30
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:18:01 +00:00
Elyes HAOUAS c23ec645d3 mb/lenovo/s230u: Convert to ASL 2.0 syntax
Generated 'build/dsdt.dsl' are identical.

Change-Id: I8843d418bd9c34a4f079444bc6ce8ecd4559e36d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:17:20 +00:00
Elyes HAOUAS 67e3365eb0 ec/purism/librem/acpi/ec.asl: Convert to ASL 2.0 syntax
Change-Id: Ic773f8404c24fc886e8420a5f4b3e00b2d752ba2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49572
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 21:16:09 +00:00
Elyes HAOUAS 944cf91fd9 soc/samsung/exynos5250/dp-reg.c: Use __func__
Change-Id: I572ee7faaa4453d32852eea2b83b0b27c549abf2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
2021-01-24 21:15:31 +00:00
Kyösti Mälkki 0be419947e arch/x86: Use wildcard for mb/smihandler.c
Change-Id: I306f8cd74af62c0cd30f445d20c47f774f122481
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49247
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-24 21:06:22 +00:00
Kyösti Mälkki 37eb24be15 ACPI: Clean up GNVS initialisation
With the common <soc/nvs.h> approach platform does not
need to implement the common accessors or sizeof() function.

Change-Id: I1050a252f765c763c1ae2d1610cbfb0d973ba026
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49793
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-24 19:57:17 +00:00
Felix Held cc975c5c65 soc/amd/cezanne/Kconfig: select missing SSE2 option
This will set the corresponding enable bit in CR4 in bootblock_crt0.S

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I648a83fbcb71456bf1e5b11c491e7cadc8e0e281
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-01-24 18:16:17 +00:00
Felix Held f09221c033 soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRS
This option will make the ramstage MTRR core set the additional bits in
the fixed MTRRs that need to be set on AMD CPUs to enable caching.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I94bca61acfc6e38a6d808eb5020537b4e8596178
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49851
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-01-24 18:16:09 +00:00
Felix Held 57419de187 soc/amd/cezanne: add basic romstage
This currently only initializes the console, calls into the FSP driver
that then calls into FSP-M and then jumps to ramstage after the FSP-M
returns. Right now, this mainly unblocks the FSP-M development.

Change-Id: I9f3cdaac573e365bb4d59364d44727677f53e91b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-01-24 18:15:59 +00:00
Felix Held 8d0a609e6d soc,vendorcode/amd/cezanne: add basic FSP integration
This is a trimmed-down version of the Cezanne FSP integration code, so
for example the UPD definitions are empty, which will be addressed
later. Since coreboot just leaves the UPD values at their default, this
is not a problem during the initial platform bring-up.

Change-Id: Ie0fc30120c2455aa2160708251e9d2f229984305
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49445
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-01-24 18:15:46 +00:00
Zheng Bao 45b0714c89 soc/amd/picasso: Remove some empty strings
Change-Id: If1ff88010f8bf941ec6a76019c4b6a4cb9b31093
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49815
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-01-24 18:10:31 +00:00
Zheng Bao f51738ddab soc/amd/cezanne: Add PSP integration for cezanne
Change-Id: Ifa69f03b4c7b871a9f018f40930d2382d2154403
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48528
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-24 18:09:19 +00:00
Arthur Heymans 7a5c369614 soc/intel/xeon_sp/cpx: Account for 'rc' heap manager
The xeon_sp/cpx has a second 'rc' heap inside FSP-M that is statically
allocated at the start of CAR. This breaks FSP 2.0 specification. This
can be worked around in the linker scripts to make sure coreboot and
FSP-M don't fight over the same memory.

Tested
- on ocp/deltalake: boot and the "Smashed stack detected in
romstage!" message at the end of romstage is gone.
- qemu/i440fx: BUILD_TIMELESS=1 results in the same binary.

Change-Id: I6d02b8a46a2a8ef00f34d8f257595d43f5d3d590
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
2021-01-24 15:54:22 +00:00
Arthur Heymans 9789689e41 arch/x86/car.ld: Account for FSP-T reserved area
Tested
 - on ocp/deltalake: boots (with FSP-T).
 - qemu/i440fx: BUILD_TIMELESS=1 results in the same binary.

Change-Id: I7e364ab039b65766eb95538db6b3507bbfbfb487
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-24 15:54:13 +00:00
Michael Niewöhner aaa69b621b soc/intel/lpc_lib: drop dead code
Change-Id: I7cf5f97c3229fe6a72d70a36e8cff49ff3cf611b
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-01-24 14:46:15 +00:00
Michael Niewöhner 0fc6bec763 soc/intel/icl: drop wrong, unused code
The ids used in function `soc_get_pch_series()` are not valid for
Icelake. Since it's not even used, instead of fixing it, drop it.

Change-Id: I4a1ee4b84f11ea314cb666ce4506ff90168da0ca
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49875
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-24 14:03:44 +00:00
Michael Niewöhner 89fe2f34b4 soc/intel/cnl: use Kconfig to determine PCH type
We already know the PCH type at build time, so there is no need to do
runtime detection. Thus, use Kconfig and drop `get_pch_series()`.

Change-Id: I470871af5f5954e91a8135fddf4a2297a514d740
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49874
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-24 14:03:33 +00:00
Angel Pons d0d528a92a soc/intel/broadwell: Align raminit with Haswell
Rename and split functions to match what Haswell does.

Change-Id: I4f3e997dd934bdf7717a70603d9413eae93cf181
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49778
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 12:07:55 +00:00
Angel Pons 24e4edb376 soc/intel/broadwell: Drop `struct romstage_params`
It is no longer necessary.

Change-Id: Ib37c9de83badc6339dca6916aec8c34a43797652
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49777
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-01-24 12:07:07 +00:00