Commit Graph

223 Commits

Author SHA1 Message Date
Felix Held 8a4536dfb7 3rdparty/amd_blobs: update submodule pointer
Change-Id: I468f0d3ab018ee0044e8de7df829c64940c7df2b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-05-22 22:50:51 +00:00
Matt DeVillier bba5bfc7d2 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit submodule pointer to pull in handling for
presence straps bypass and some minor cleanup.

Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Change-Id: Id4a903383f32f352aa3595bd72bc5f6f0777171c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-05-20 23:37:31 +00:00
Bill XIE 02043c995b 3rdparty/libgfxinit: Update submodule pointer, again
6b95507ec5 has mistakenly reverted
the submodule pointer of 3rdparty/libgfxinit to cdbfce27, canceling
c844d14ca5.

This commit sets it back, recovering c844d14c.

Change-Id: Ib594e40a39ea83dd2238becb287f2516e7c54046
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41400
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-18 07:37:09 +00:00
Marshall Dawson 3e30c1284f 3rdparty/amd_blobs: Update with Picasso images
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Ie886815ed354762ea52fd6a76169cf25576f8852
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2020-05-17 21:06:52 +00:00
Bill XIE 6b95507ec5 mainboard/lenovo/x230: Add ThinkPad x230s as a variant
The code is based on autoport and that for X230. Major differences are:
    - Only one DDR3 slot
    - HM77 PCH
    - M.2 socket instead of mini pci-e
    - no docking
    - no tpm

Tested:
    - CPU i5-3337U
    - Slotted DIMM 8GiB
    - Camera
    - pci-e and usb2 on M.2 slot with A key for wlan
    - sata and usb2  (no superspeed components) on M.2 slot with B key for wwan
    - On board SDHCI connected to pci-e
    - USB3 ports
    - libgfxinit-based graphic init
    - NVRAM options for North and South bridges
    - Sound
    - Thinkpad EC
    - S3
    - Linux 4.9 within Debian GNU/Linux stable, loaded from
      Seabios.

Untested:
    - Touch screen, which is said to work under ubuntu but not debian.

Change-Id: Ie537645d5ffaee799e79af2f821f80c3ebd2dfec
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-05-13 12:10:38 +00:00
Matt DeVillier c844d14ca5 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit submodule pointer to pull in workaround for VT-d.

Change-Id: I09f811bdb917365f4e97b7ab385781337d4c9cf7
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41181
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11 09:27:41 +00:00
Yu-Ping Wu a4f8e40663 Update vboot submodule to upstream master
Updating from commit id 55154620:
  vboot: Add screens for recovery using disk

to commit id 3aab3014:
  vboot: Convert reboot-related errors to vboot2-style

This brings in 3 new commits.

Change-Id: I75be535e0b0f8080366b98e5ae2007452ad51738
Signed-off-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40845
Reviewed-by: Joel Kitching <kitching@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-01 06:27:49 +00:00
Felix Singer d1e0a466d3 3rdparty/intel-microcode: Update submodule pointer to 20191115 release
Update submodule pointer to 20191115 release to include the microcode
update for CML-U62, and others.

Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: I4765a70be0b1182acd340a3c31a5d71fd0ab500f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-28 14:39:27 +00:00
Daisuke Nojiri 16a29e53ff Update vboot submodule to upstream master
Updating from commit id 46ff62c3:
  vboot: stop reading from ACPI for wpsw_boot

to commit id 55154620:
  vboot: Add screens for recovery using disk

This brings in 37 new commits.

Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ie184cbe6cc18cea540966d5801472ae821ea3e86
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40503
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-23 01:20:49 +00:00
Duncan Laurie c68902c210 Update vboot submodule pointer
Update the pointer for vboot_reference so it can be used to compile
depthcharge payload on the master branch.

Change-Id: I5fc6e05896d7221a1e48ca86c6b15081488302b5
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2020-04-14 09:47:56 +00:00
Nico Huber 4ce52903b0 3rdparty/libgfxinit: Update submodule pointer
Changes allow to use the integrated panel logic (power sequen-
cing and backlight control) for more connectors. The Kconfigs
GFX_GMA_PANEL_1_PORT and GFX_GMA_PANEL_2_PORT can now be set
to any port, e.g.

  config GFX_GMA_PANEL_1_PORT
          default "DP3"

Now that the panel logic is not tied to the `Internal` port
choice anymore, we can properly split it into `LVDS` and `eDP`.

This also adds Comet Lake PCI IDs which should still work the
same as Kaby and Coffee Lake.

Change-Id: I78b1b458ca00714dcbe7753a7beb4fb05d69986b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38921
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-09 08:20:12 +00:00
dnojiri 94b032ee5e Update vboot submodule to upstream master
Updating from commit id 8b9732f5:
2020-01-28 02:32:08 +0000 - (2lib: Fix struct vb2_hash the way it was
meant to be)

to commit id 5059062d:
2020-03-05 02:40:39 (EFS: Implement EFS2 and NO_BOOT mode)

This brings in 19 new commits.

Change-Id: Ic33500921e2c1a6109c24ad36713b41ab6e43de9
Signed-off-by: dnojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39324
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Joel Kitching <kitching@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-07 20:44:32 +00:00
Joel Kitching 24d994afd2 Update vboot submodule to upstream master
Updating from commit id 0e97e25e:
2020-01-28 02:32:08 +0000 - (2lib: Fix struct vb2_hash the way it was meant to be)

to commit id 8b9732f5:
2020-02-18 05:55:01 +0000 - (vboot: do not call vb2_commit_data at end of VBSLK)

This brings in 36 new commits.

Change-Id: Icb0ab2c82c3264185171a32357944949afd2edce
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-02-19 12:07:57 +00:00
Patrick Georgi c294fe792c 3rdparty/blobs: Update to include STM binary
Change-Id: I5f053c1270bab71aeab3bb785c60417419736b44
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38717
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2020-02-05 18:50:48 +00:00
Julius Werner 94e5ceea8c Update vboot submodule to upstream master
Updating from commit id 6ef33b99:
2019-11-22 Hung-Te Lin     futility: updater: refactor: unify
                           getting temp files for firmware images

to commit id 0e97e25e:
2020-01-23 Julius Werner   2lib: Fix struct vb2_hash the way it was
			   meant to be

Change-Id: I539aba2f283804f67ff3ff4f98324b3d10b2bb54
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Joel Kitching <kitching@google.com>
2020-02-03 16:53:14 +00:00
Julius Werner a211298d20 Update vboot submodule to upstream master
Updating from commit id 2843aa62:
2019-12-12 Julius Werner   2lib: Move firmware body size reporting to
			   separate function

to commit id f5367d59:
2020-01-20 Joel Kitching   vboot: translate recovery reason info from
			   vboot 2->1

This brings in 27 new commits.

Change-Id: I7d33337881fa2d36d6e562b0a390b56227cfad55
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Joel Kitching <kitching@google.com>
2020-01-22 22:00:46 +00:00
Nico Huber 933e6ff02d Populate 3rdparty/amd_blobs/
Kconfig default paths already point into `3rdparty/amd_blobs/`.

Change-Id: Ibb6f12183c48c7c07f76e794b4971c8b75116333
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38042
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2020-01-05 23:54:24 +00:00
Nico Huber bf15b2f7c3 3rdparty/fsp: Update to current master again
We had to role the `fsp` submodule back for a minute due to a regression
with the Coffee Lake binary. Intel silently mixed FSP 2.1 features into
the Coffee Lake FSP which is supposed to be FSP 2.0. With the stack and
heap usage partitioned for FSP using coreboot's stack (config FSP_USES_
CB_STACK), it works again.

To make this even messier: We already selected this Kconfig option for
Whiskey Lake, which is supposed to use the very same FSP binary. So with
either submodule pointer, something was always broken :-/

Change-Id: Id2aa17aaa2c843dcc7e0fb28779d1e5948da83c9
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37700
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jeremy@system76.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Mimoja <coreboot@mimoja.de>
2019-12-16 09:41:57 +00:00
Julius Werner f8e1764bb9 security/vboot: Ensure firmware body size is respected again
CB:36845 simplified how coreboot finds the RW CBFS after vboot has and
eliminated a layer of caching. Unfortunately, we missed the fact that
the former cached value didn't exactly match the FMAP section... it was
in fact truncated to the data actually used by vboot. That patch
unintentionally broke this truncation which leads to performance
regressions on certain CBFS accesses.

This patch makes use of a new API function added to vboot (CL:1965920)
which we can use to retrieve the real firmware body length as before.

(Also stop making all the vb2_context pointers const. vboot generally
never marks context pointers as const in its API functions, even when
the function doesn't modify the context. Therefore constifying it inside
coreboot just makes things weird because it prevents you from calling
random API functions for no reason. If we really want const context
pointers, that's a refactoring that would have to start inside vboot
first.)

This patch brings in upstream vboot commit 4b0408d2:
2019-12-12 Julius Werner   2lib: Move firmware body size reporting to
			   separate function

Change-Id: I167cd40cb435dbae7f09d6069c9f1ffc1d99fe13
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
2019-12-13 20:14:26 +00:00
Julius Werner 9b7c232924 Update vboot submodule to upstream master
Updating from commit id 695c56dc:
2019-12-04 Julius Werner   Makefile: Make loop unrolling fully
			   controllable by the caller

to commit id b10e5e32:
2019-12-09 Yu-Ping Wu      vboot: Make 2nvstorage.h private to
			   vboot_reference

This brings in 19 new commits.

Change-Id: I9cdccd25422aee26620d48d31f83bcf32a7b4809
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37717
Reviewed-by: Mathew King <mathewk@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-13 20:14:06 +00:00
Christian Walter 8a2204896a 3rdparty/fsp: Set back commit to working version of the FSP
With CB:37564 (3rdparts/fsp: Update fsp submodule) a regression
has been introduced to CFL platforms, such that the FSP-M fails/is
broken. This commit sets the commit to checkout in the submodule
FSP back to a working version.

Change-Id: I8eac551211559962fc60e7edd46ff118d7bde830
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37669
Reviewed-by: Mimoja <coreboot@mimoja.de>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-13 09:00:01 +00:00
Johanna Schander 0b82b3d6fd 3rdparts/fsp: Update fsp submodule
The name for the CoffeeLake FSP.fd was changed to Fsp.fd.
Therefore the CoffeLake / WhiskeyLake default path was
changed.

Change-Id: I0f51e378fcaacb25392d8940a342fc968c730157
Signed-off-by: Johanna Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37564
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-09 09:44:07 +00:00
Joel Kitching 1debc0c101 vboot: update VbExNvStorageWrite function
Going forwards, vb2ex_commit_data will be used to flush both
nvdata and secdata.

The patch that is circularly dependent on this lies between a patch that
makes vboot no longer build and the patch that fixes that, so we have to
pull the whole thing in at once to sort out the mess.

Updating from commit id 1c4dbaa0:
2019-11-18 Julius Werner   Makefile: Fix typo for MOCK_TPM

to commit id 695c56dc:
2019-12-04 Julius Werner   Makefile: Make loop unrolling fully
                           controllable by the caller

BUG=b:124141368, chromium:1006689
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: Ia2612da0df101cd3c46151dbce728633a39fada1
Signed-off-by: Joel Kitching <kitching@google.com>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37315
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-12-06 05:23:26 +00:00
Tim Wawrzynczak a4a512c68a Update vboot submodule to upstream master
Updating from commit id ecdca931:
2019-11-13 06:14:05 +0000 - (vboot: move vb2_context inside vb2_shared_data (persistent context))

to commit id 1c4dbaa0:
2019-11-19 06:31:23 +0000 - (Makefile: Fix typo for MOCK_TPM)

This brings in 17 new commits.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I1952d7a26725e2c008b5009705b2e78ac0bb82df
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36936
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-20 13:30:21 +00:00
Patrick Georgi e5ca52bbba Update opensbi submodule to upstream master
Updating from commit id e561c63:
2019-10-02 17:03:58 +0530 - (lib: Fix coldboot race condition observed on emulators/simulators)

to commit id 215421c:
2019-11-11 16:40:34 -0800 - (lib: Remove date and time from init message)

This brings in 13 new commits and allows reproducible builds with
opensbi.

Change-Id: I0fb9e0921b017822defa8b56df5a0f3e014d7f33
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36866
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-11-16 20:39:09 +00:00
Frans Hendriks 7dfbaab6de 3rdparty/blobs: Add Facebook FBG1701 descriptor and Intel ME
Upgrade to blobs version with descriptor and Intel ME binary

BUG=N/A
TEST=booting Facebook FBG1701

Change-Id: I2143b94a81eebfb22d99833aaf1f3743983dd80c
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34442
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-15 13:17:08 +00:00
Joel Kitching 2332c7459e vboot: use vboot persistent context
vb2_context object is now stored on the workbuf as part of
vb2_shared_data.  Use vboot's new API functions vb2api_init
and vb2api_relocate to create and move the workbuf.

BUG=b:124141368, chromium:994060
TEST=Build locally
BRANCH=none

Change-Id: I051be1e47bf79b15a1689d49a5d4c031e9363dfa
Signed-off-by: Joel Kitching <kitching@google.com>
Also-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1902339
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
2019-11-15 10:37:13 +00:00
Joel Kitching 348002c305 Update vboot submodule to upstream master
Updating from commit id b2c8984d:
2019-10-01 06:01:59 +0000 - (vboot: fix compile error with MOCK_TPM)

to commit id 87276ffe:
2019-11-07 17:46:09 +0800 - (futility: updater: Clean up hard-coded section names to preserve)

This brings in 48 new commits.

Change-Id: Iabaadc63227b856d0a2b7f3b23fe8c41b28d8eae
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36813
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-14 11:31:54 +00:00
Marshall Dawson d9ccaefabe submodules: Add 3rdparty/amd_blobs
This is currently an empty repo.  The intention for amd_blobs may be
found in Documentation/soc/amd/amdblobs_license.md.  A subsequent
patch will make the repo's init and checkout optional based on a
Kconfig symbol.

Change-Id: Ia93fb2711beaea4cb1c8e5d71dc3a9e0facc5485
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36441
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-10-31 12:28:38 +00:00
Nico Huber 21961fc092 3rdparty/libgfxinit: Update submodule pointer
This includes a huge set of refactorings to support Core Display Clock
(CDClk) frequency switching based on the current mode requirements.

The CDClk is configurable since Haswell and runtime switching is suppor-
ted since Broadwell. Always using the lowest possible frequency setting
should allow some power-savings. While, on the upper end, we can support
higher resolution panels now, without having to change the static confi-
guration.

There have also been some smaller changes and fixes, including:
  o Parsing of eDP 1.4+ DPCD link rates, enables panels that don't
    advertise a maximum link rate but only individual ones.
  o DP support for Ibex Peak.
  o Corrected limit for HDMI on G45 to 165MHz.
  o Reworked GMBUS reset handling and timeouts, should help with
    stalled GMBUS controllers when unimplemented ports were probed
    by accident.

Tested on various boards from GM45 to KBL-R.

Change-Id: I0a90bd4afe2091699a46a5a1323af9723ff43018
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35898
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-10-29 10:46:41 +00:00
Patrick Georgi 8be1fdf26f Update arm-trusted-firmware submodule to upstream master
Updating from commit id 42cdeb93:
2019-09-13 12:09:21 +0000 - (Merge "stm32mp1: manage CONSOLE_FLAG_TRANSLATE_CRLF and cleanup driver" into integration)

to commit id ace23683:
2019-09-27 09:54:27 +0000 - (Merge changes from topic "ld/stm32-authentication" into integration)

This brings in 83 new commits.

Change-Id: I273b5014db76d307d8735d78a8fdd5db3d07146c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35625
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-10-03 18:30:08 +00:00
Patrick Georgi 22f009901d Update chromeec submodule to upstream master
Updating from commit id 860fe2962:
2018-12-29 05:45:29 -0800 - (mt_scp/ipi: Support host command.)

to commit id a1afae4e0:
2019-10-02 11:47:45 +0000 - (juniper: initial setup)

This brings in 1723 new commits.

Change-Id: Ieb4f00b21a4354bb634c3427c73260123b54ac2a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35624
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-10-03 04:43:36 +00:00
Patrick Georgi 4685e53fe6 Update opensbi submodule to upstream master
Updating from commit id ce228ee:
2019-07-02 11:11:08 +0530 - (include: Bump-up version to 0.4)

to commit id e561c63:
2019-10-02 17:03:58 +0530 - (lib: Fix coldboot race condition observed on emulators/simulators)

This brings in 44 new commits.

Change-Id: Ide6e3c2bb98e79750b40a9b8ca9f2f1d2c123628
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35314
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-10-03 04:43:28 +00:00
Patrick Georgi 193eefb2e8 Update vboot submodule to upstream master
Updating from commit id e6700f4c:
2019-08-13 04:36:52 +0000 - (vboot: update vboot2 functions to use new vb2_error_t)

to commit id b2c8984d:
2019-10-01 06:01:59 +0000 - (vboot: fix compile error with MOCK_TPM)

This brings in 71 new commits.

Change-Id: Id7cefa3ad5b30c955d18e469494fec32f6f58a48
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35315
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-10-03 04:43:17 +00:00
Elyes HAOUAS dd12d53494 3rdparty/chromeec: Update to latest master
It's been some time and there are 1420 new commits. Including one that
allows reproducible builds \o/ and one that breaks building with empty
$(CC) :-/

Change-Id: I5e81d5a2f1018481b9103fc5a1f4b8c72fb9deec
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30679
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-16 13:42:10 +00:00
Julius Werner b3f24b4884 arm64: Uprev Arm TF and adjust to BL31 parameter changes
This patch uprevs the Arm Trusted Firmware submodule to the new upstream
master (commit 42cdeb930).

Arm Trusted Firmware unified a bunch of stuff related to BL31 handoff
parameters across platforms which involved changing a few names around.
This patch syncs coreboot back up with that. They also made header
changes that now allow us to directly include all the headers we need
(in a safer and cleaner way than before), so we can get rid of some
structure definitions that were duplicated. Since the version of entry
point info parameters we have been using has been deprecated in Trusted
Firmware, this patch switches to the new version 2 parameter format.

NOTE: This may or may not stop Cavium from booting with the current
pinned Trusted Firmware blob. Cavium maintainers are still evaluating
whether to fix that later or drop the platform entirely.

Tested on GOOGLE_KEVIN (rk3399).

Change-Id: I0ed32bce5585ce191736f0ff2e5a94a9d2b2cc28
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2019-09-14 05:01:16 +00:00
Marty E. Plummer 1e02d73c73 3rdparty/ffs: add open-power ffs utils
These tools are used to manipulate open-power specific partitioning and
ecc algorithms.

Change-Id: I0657f76aab75190244d0e81c2b1a525e50af484d
Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35007
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-25 07:37:11 +00:00
Joel Kitching 220ac049ba vboot: update vboot2 functions to use new vb2_error_t
To make explicit when vboot2 error codes should be returned,
use the new vb2_error_t type on all functions which return
VB2_ERROR_* constants.

Additionally, add required vboot submodule commit id e6700f4c:
    2019-07-31 14:12:30 +0800 - (vboot: update vboot2 functions to use new vb2_error_t)

NOTE: This patch was merged separately on the Chromium tree:
https://chromium-review.googlesource.com/c/1728499

BUG=b:124141368, chromium:988410
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: I804c2b407e496d0c8eb9833be629b7c40118415c
Signed-off-by: Joel Kitching <kitching@google.com>
Cq-Depend: chromium:1728292
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34860
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-21 09:32:45 +00:00
Joel Kitching 057d1b9d7e Update vboot submodule to upstream master
Updating from commit id 9c906110:
2019-08-06 06:07:01 +0000 - (vboot/tpm: fix return type inconsistencies)

to commit id a5afd01f:
2019-08-08 11:02:44 -0700 - (Minor fixes for clang)

This brings in 6 new commits.

Change-Id: Ic334ce8a5f24a0119fa2aaf000ce76c4c9e4932a
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34859
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-21 09:32:14 +00:00
Dawei Chien bab69c3fe2 3rdparty/blobs: Update submodule for MT8183
Update the 3rdparty/blobs submodule to the newest HEAD, which
contains the SPM binary for MT8183 platforms
( https://review.coreboot.org/c/blobs/+/34543 ).

Change-Id: I505ec9fffd9ddd62fffbe9514cbba50625825693
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34734
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-08 03:29:07 +00:00
Joel Kitching 6276dfee51 Update vboot submodule to upstream master
Updating from commit id dac763c7:
2019-05-10 10:43:55 -0700 - (Make vboot -Wtype-limits compliant)

to commit id 9c906110:
2019-08-06 06:07:01 +0000 - (vboot/tpm: fix return type inconsistencies)

This brings in 68 new commits.

Change-Id: Ia96347d8ed94db6f0ec5f5108cb98ab0c4087bd4
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-08 03:20:56 +00:00
Nico Huber 6c5e7c70ac 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit:

o Add support for ULX (CPU Y series) variants
o Add support for Kaby/Coffee/Whiskey/Amber Lakes
o Publish Read_EDID() procedure
o Fix certain GMBUS error conditions
o Fix DP training when clock recovery needed voltage-swing increase
o Fix scaling on eDP for BDW+

Change-Id: Ib252303708d2bb0524ecc47f498df45902ba774f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2019-08-05 08:24:01 +00:00
Patrick Rudolph b5871e5ccf 3rdparty/opensbi: Bump version
Use latest OpenSBI that include support for dynamic firmware loader.

That allows us to use OpenSBI similar to BL31 on aarch64:
* coreboot loads the payload
* coreboot loads OpenSBI ELF right before payload handoff
* OpenSBI does platform lockdown and provides runtime services
* OpenSBI hands control to already loaded payload

The uncompressed compiled OpenSBI code is about 41KiB.

Required to boot GNU/Linux on qemu-riscv as some instructions needs to be
emulated by SBI.

Change-Id: If7ed706bc54a75fb583a8aa46fdd61ae7d18c546
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34139
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-07-28 09:35:21 +00:00
Julius Werner 47a7b37cbf 3rdparty/blobs: Update submodule
Uprev the 3rdparty/blobs submodule to the newest HEAD, which
contains the SSPM binary for MT8183 platforms
( https://review.coreboot.org/c/blobs/+/32698 ).

Change-Id: I8a4dfa7eaace1ea473f5970596c3201342e48927
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34494
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-23 20:24:01 +00:00
Bora Guvendik a88921e2b0 3rdparty/fsp: Update submodule pointer
Update fsp submodule pointer to Coffee Lake FSP 7.0.64.40

github commit:
59964173e1

Change-Id: I864404a03be63aa60e81db21af16d69cda2d4e12
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33642
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-02 16:11:03 +00:00
zaolin 15110f12cb Add intel-microcode submodule repository
Change-Id: Icc5ac0a8033e371ecf2b4b28ba45dab961e86b3f
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
2019-06-18 10:42:17 +00:00
Arthur Heymans 01c83a2e99 3rdparty/blobs: Update submodule, SNB improvements
The sandybridge systemagent-r6 blob is modified:
- To be more flexible about the location of the stack w.r.t. the heap
- Place the MRC pool right below the MRC_VAR region
- to work with the same DCACHE_RAM_BASE from the native raminit (could
  make the CAR linker symbols easily compatible if desired)

This allows CAR setup compatibility between mrc.bin and native
bootpath and also allows for BIOS/memory mappeds region larger than
8MB.

This changes the semantics of CONFIG_DACHE_RAM_MRC_VAR_SIZE to also
include the pool on top of MRC_VAR region.

TESTED on T520 (boots and resumes from S3 with mrc.bin).

Change-Id: I17d240656575b69a24718d90e4f2d2b7339d05a7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33228
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-17 08:15:04 +00:00
Julius Werner e429d86655 3rdparty: Uprev vboot submodule to upstream master
This patch uprevs the vboot submodule to the new upstream HEAD commit

 dac763c782 Make vboot -Wtype-limits compliant

Change-Id: I363e218e019b25483bc4c06315ca4e0e34599daf
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32748
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Joel Kitching <kitching@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-05-13 09:32:04 +00:00
Nico Huber 47953d0ae0 3rdparty/libgfxinit: Update for runtime CPU detection
Beside one tiny fix for framebuffer scaling, this contains a major
refactoring of libgfxinit's configuration infrastructure. With this,
we are finally able to detect CPUs at runtime and only have to confi-
gure a CPU/GPU generation.

Change-Id: Iccf4557453878536f527e4a1902439a1961ab701
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32736
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-12 15:02:23 +00:00
Nico Huber a029b3f4a4 3rdparty/libhwbase: Update to current master
Beside some refactorings that don't affect coreboot, this contains
bd0ed91 (Makefile: Revise support for generated sources) that fixes
an issue with upcoming libgfxinit configuration changes.

Change-Id: Ib47aeff8f6426ae27ddbc235a954e3bd60029072
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32735
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-12 15:02:16 +00:00
Joel Kitching 0de835d52e Update vboot submodule to upstream master
Updating from commit id 304aa429:
2019-03-12 10:38:56 -0700 - (futility: updater: Unit test for preserving sections using FMAP flags)

to commit id e7edff66:
2019-05-03 07:02:32 -0700 - (vboot: implement DISPLAY_INIT context and SD flag)

This brings in 45 new commits.

Change-Id: I7493e43bddc553f9724de46130ccb4cb44e18573
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32612
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-05-07 07:42:59 +00:00
Matt DeVillier 73b0136fa3 3rdparty/fsp: Update submodule pointer to upstream master
Update submodule pointer to pull in newly-updated Braswell FSP.

Adjust FSP_FD_PATH for soc/cannonlake due to filename case change.

Change-Id: I02ee0d32fd4c04cd4971eff20fc5a7de3f9b07ec
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32420
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-04-25 15:52:53 +00:00
zaolin 29035f3c36 3rdparty/opensbi: Add submodule
* Add opensbi for RISC-v

Change-Id: I1a6baa6b6c05095ff5545492aabf7408a23af181
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32418
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-04-24 08:46:25 +00:00
Joel Kitching 6b8a29e8b9 Update vboot submodule to upstream master
Updating from commit id 1e177741:
2019-02-14 05:27:16 -0800 - (vboot: rename VB2_DISABLE_DEVELOPER_MODE)

to commit id 304aa429:
2019-03-12 10:38:56 -0700 - (futility: updater: Unit test for preserving sections using FMAP flags)

This brings in 18 new commits.

Change-Id: Ie2889ed0217c38734eb2c496ca20f95b6a12b102
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31872
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-14 11:39:55 +00:00
Nico Huber ae546422ed 3rdparty/blobs: Update submodule pointer
* Update SMU firmware for amd/stoneyridge
* Remove stale Sandy Bridge MRC binaries

Change-Id: Ifd1a9f02d96bc7cf5d23706a09634c0353dfae61
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-03-07 17:16:04 +00:00
Joel Kitching 3ba6caf81e Update vboot submodule to upstream master
Updating from commit id a32c930e:
2018-12-28 16:14:08 -0800 - (futility: updater: quirks: Support special released SNOW RO)

to commit id 1e177741:
2019-02-14 05:27:16 -0800 - (vboot: rename VB2_DISABLE_DEVELOPER_MODE)

This brings in 11 new commits.

Change-Id: I59d83de49006a6d081b206716002697d39099aa4
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/31542
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-02-22 11:07:20 +00:00
Patrick Georgi d13b2d0508 Update vboot submodule to upstream master
Updating from commit id 392211f0:
2018-04-23 13:07:25 -0700 - (Update Android signing to support signature scheme v2)

to commit id a32c930e:
2018-12-28 16:14:08 -0800 - (futility: updater: quirks: Support special released SNOW RO)

This brings in 159 new commits.

Change-Id: I7fea9ff1e4109d4dbc979289172191f677438933
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30914
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-01-16 06:27:49 +00:00
Nico Huber ab4eb2afc3 3rdparty/blobs: Update for current Intel microcode
The microcode included for `model_6xx` was for a 660, that path has
changed.

Change-Id: I09a41a8269cfdf8953bac10c9630922192851e73
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/30081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-01-10 09:24:47 +00:00
Arthur Heymans e956255509 3rdparty/libgfxinit: Update submodule pointer
Updates to current master.

This includes:
- A fix for textmode scaling on G45
- Refactor things to rely less on inline proving
- Increased width of modeline fields to 32 bits

Change-Id: Iab2915b747f6e4fa4e78eb28fea29bb3a9b3b687
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/30311
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-21 18:12:36 +00:00
Richard Spiegel 8f64759326 3rdparty/blobs: Update video BIOS to customize release binary
A liara specific VBIOS was released and merged to blobs. Now coreboot
need to point to the updated blob, so it can use liara specific VBIOS.

Liara Chromebook Stoney VBIOS BRT39865
BRT39865.001 12/05/18,01:13:54 CL#1716128 @ 15.49.0.18 ATOMBuild#436504

Major Changes included:
1. First Stoney VBIOS released to Liara update eDP power up sequence.

BUG=b:120534087
TEST=none

Change-Id: I3b060b1ccfb311584afd0fb66258eb7cc942408d
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/30089
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2018-12-07 15:19:06 +00:00
Richard Spiegel 497b880701 3rdparty/blobs: Add new blob
New VBIOS code has been added to blobs/mainboard/google/kahlee. It has been
merged, so now coreboot needs to use latest blob.

BUG=b:112618193
TEST=none

Change-Id: If430ee06f03e0f20806bf8fd2b649814251ffcf5
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/29869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-11-28 20:25:20 +00:00
Patrick Georgi 1a6fd0b538 3rdparty/blobs: Update to include QuarkFsp
Change-Id: I0032e86755750755e7ae6e2a53863e1600f96a5b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/29030
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-12 23:21:35 +00:00
Patrick Georgi 7aa44522f2 3rdparty/fsp: update to current master
This includes the SplitFspBin.py script.

Change-Id: I6323a7a1a2bd9b5e11c0b21e5ea991a3fbd3daac
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/28775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-10-05 03:29:25 +00:00
Patrick Georgi f585141cb9 submodules: add FSP mirror as non-default submodule
Like the 3rdparty/blobs repo this isn't checked out by default. Right
now you can manually check it out using

    $ git submodule init --checkout

A follow up commit will add some automagic if USE_BLOBS and
MAINBOARD_USES_FSP2_0 are enabled.

Change-Id: Ie612495abc2a2d5947225e6ab54872aa72d4bec6
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/28303
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-02 03:07:50 +00:00
Patrick Rudolph a93d22dd58 3rdparty/blobs: Update submodule pointer to pull in latest changes
* Include Cavium's CN81xx BL31.elf
* mainboard/google: Add folder kahlee for video binary
* Stoney Ridge: PSP bootloader update
* cpu/intel: remove microcode header files for model_306ax

Change-Id: Ie8f3b2e8db0692e95caee245733054e4e20f61ea
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27647
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-07-27 03:00:43 +00:00
Paul Menzel fafc11f2f5 3rdparty/blobs: Update submodule pointer to include latest AMD ucode
The two commits below are added to the BLOBs repository.

*   fe7c6a3 pcengines/apu2: Disable ECC Exclusion range
*   3854ad2 cpu/amd/family_15h: Add latest AMD ucode file

The latest AMD microcode patches include Spectre mitigations.

Change-Id: I4729cc054fe8267549d7369cea4d26aa51861e1c
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/27297
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-02 07:41:03 +00:00
Arthur Heymans b00bac707f 3rdparty/libgfxinit: Update submodule pointer
Update to current master.

This includes:
- G45 support
- fixes scaling on eDP (needed for working textmode on eDP)
- gfx_test drawing and moving cursors
- Adding support for Tiling on <= Haswell
- Allow changes to the framebuffer configurarion without resetting the
pipe.

Change-Id: I4ff3c17ec7308115de7bf2f2bb9276c2fad41253
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/26823
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-08 03:27:23 +00:00
Nico Huber 514bd56af9 3rdparty/libgfxinit: Update submodule pointer
Update to current master. Beside a minor workaround for GCC 8
compatibility, this includes only refactorings and preparations
for G4x support.

Change-Id: I6b2aa6bd9d41b852dacd8e1dfe89d92c8a548121
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26420
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-23 12:43:03 +00:00
Patrick Georgi 2e8b770a9e 3rdparty/chromeec: Update to latest master
Includes the necessary changes to build with gcc 8.1

Change-Id: Ie8c3dede4d702ab7838162dbff09f94df34b7c91
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/26453
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-23 12:02:58 +00:00
Nico Huber 466841e723 3rdparty/libhwbase: Update submodule pointer
Pull a minor update for GCC 8 compatibility.

Change-Id: I0a4af47d56f3ca0b8ed82533e84c44041661ca35
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26306
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22 07:12:43 +00:00
Martin Kepplinger e397f55702 3rdparty/blobs: Update submodule marker for Intel microcode updates
This adds the following changes to the blobs repository:

78a02a7 cpu/intel: microcode: add license agreement
1d37962 cpu/intel: add microcode updates 20180312 for new CPU models
8b8bbce cpu/intel: apply microcode updates 20180312 to currently tracked models

In short: Bump Intel microcode updates. They include spectre/meltdown
mitigations.

Change-Id: I141f4446bc4e3bff5641bc39b70b299dc09ac8a7
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/26270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-15 13:19:19 +00:00
Nico Huber e100fe4a59 Revert "3rdparty/blobs: Update submodule marker for Intel microcode updates"
This reverts commit 0ff9daac45.

It points to a stale commit under review; i.e. not to a commit on
blob.git's master branch like it's supposed to.

Change-Id: I19cb8a32b3971c3104e381673ca08ae4d3979128
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26241
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-05-12 20:17:02 +00:00
Martin Kepplinger 0ff9daac45 3rdparty/blobs: Update submodule marker for Intel microcode updates
This moves the blobs submodule marker forward to include the following:

b45abbd cpu/intel: microcode: add license agreement
1d37962 cpu/intel: add microcode updates 20180312 for new CPU models
8b8bbce cpu/intel: apply microcode updates 20180312 to currently tracked models

in short: bump Intel's microcode updates to the latest version. This
includes Spectre/Meltdown mitigations.

Change-Id: I4ab74ae0bdcf2a109b0697ad233fbb812b5c4544
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/25505
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-11 06:33:43 +00:00
Duncan Laurie cab643e472 Update vboot submodule to upstream master
Updating from commit id e0b38418:
- image_signing: Add sha1sum of keys in keyset to VERSION.signer.

To commit id 392211f0:
- Update Android signing to support signature scheme v2

This fixes bulding with depthcharge master.

Change-Id: I07b570f54b26a937a5a7c53ade464e0c7a550312
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/25837
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-04-26 16:35:16 +00:00
Nico Huber 0beb62760d 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit to current master. Changes include:

* a fix to decode the size stolen memory correctly on pre-SandyBridge
  hardware,
* a PCI id based generation check, obsoleting the old check based
  on PCH audio ids,
* some minor improvements around rarely used DDI ports (D and E), and
* added support for tiled and rotated framebuffers on Skylake+ hardware
  (less interesting for coreboot, I guess?).

TEST=Booted kontron/ktqm77 (Ivy Bridge) and pending kontron/bsl6
     (Skylake) both with text and linear framebuffers and observed
     FILO's prompt showing up.

Change-Id: I9a3c35c60b9edf8775f3a489df7577092910e127
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/25453
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-13 16:42:48 +00:00
Richard Spiegel 013f1024c3 stoneyridge: Update AGESA binary and AGESA.h
AGESA.bin was updated in the binary repo, so update the submodule pointer.
Among other changes, this added a callback "AGESA_HALT_THIS_AP", which
requires updated header files.

BUG=b:70338633
TEST=build kahlee.

Change-Id: I5a07f1c539d00aed34cfe45d6d7ef60c1dc56566
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/25183
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-03-16 19:01:30 +00:00
Martin Roth 13089b008f Update chromeec submodule to upstream master
Updating from commit id 9fb10386a: 2017-06-21 04:19:06 -0700
(Poppy: Configure camera PMIC to low power mode.)

to commit id 927b64a0b: 2018-02-15 00:10:45 -0800
(meowth: zoombini: enable CONFIG_CMD_PD_CONTROL)

This brings in 1205 new commits.

Change-Id: I3f7a1ceb1ea8c70d57a8f067023358b93df2670b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-02-22 10:03:22 +00:00
Marc Jones 3e9694ef48 Update blobs submodule to upstream master
Updating from commit id a5efee5:
2018-01-04 16:24:19 -0700 - (Kahlee/Grunt: Move remaining stoneyridge blobs)

to commit id 19dea8d:
2018-02-01 08:51:06 -0700 - (soc/amd/Stoneyridge: Update PSP binaries to AGESA 1.3.0.9)

This brings in 2 new commits.

Change-Id: I7858ad8be13d9992949effb0216723d2480fa74d
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/23562
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
2018-02-05 19:51:22 +00:00
Julius Werner 98d2d3940e Update arm-trusted-firmware submodule to current upstream master
This patch updates the arm-trusted-firmware submodule from:

commit 9fd4a36c408a254d887106e6e3960d496456be2c
(Merge pull request #1211 from Leo-Yan/remove_ca73_cpu_nap_state)

to

commit 693e278e308441d716f7f5116c43aa150955da31
(Merge pull request #1245 from antonio-nino-diaz-arm/an/checkpatch)

This brings in 79 new commits.

Change-Id: Ieceb07760178f8ddbb5cafebabeb78f8def4072d
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/23555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-02 22:18:49 +00:00
Richard Spiegel 4eaf0fa155 src/soc/amd/stoneyridge/Kconfig: Use vbios new location
3rdparty/blobs was updated to move northbridge/amd/00670F00 contents into
soc/amd/stoneyridge. Now soc/amd/stoneyridge/Kconfig needs to be updated
to use VBIOS.bin new location.

BUG=b:70785272
TEST=Update 3rdparty/blobs master branch, try to build kahlee. It should
fail. Update soc/amd/stoneyridge/Kconfig, try to build kahlee again, it
should work (need to rebuild .config first).
CQ-DEPEND=CL:881709

Change-Id: I8cb9874eedc4a5d41d42b3f727c6d3cb9b920b5a
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/23398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-25 16:33:08 +00:00
Martin Roth e6108b2ce3 Update vboot submodule to upstream master
Updating from commit id f6780a36:
2017-12-01 14:54:40 -0800 - (firmware: header tweaks for depthcharge)

to commit id e0b38418:
2018-01-16 04:08:26 -0800 - (image_signing: Add sha1sum of keys in keyset to VERSION.signer.)

This brings in 25 new commits.

Change-Id: If60f19decd91eaafec1d555c1e7d3ca0249d8068
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23332
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 22:57:57 +00:00
Martin Roth feb0883a3b Update arm-trusted-firmware submodule to upstream master
Updating from commit id b1187232:
2017-06-20 15:34:54 +0100 - (Merge pull request #992 from davidcunado-arm/dc/fix-signed-comparisons)

to commit id 9fd4a36c:
2018-01-17 17:34:29 +0000 - (Merge pull request #1211 from Leo-Yan/remove_ca73_cpu_nap_state)

This brings in 596 new commits.

Change-Id: Icbe7ede1583f715f3e30bf013df6ba164319e3a1
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-01-23 22:57:49 +00:00
Richard Spiegel a98727849a 3rdparty/blobs/soc/amd/stoneyridge: Use new location of stoneyridge blob
Stoneyridge related contents of 3rdparty/blobs/southbridge/amd/kern were
moved to 3rdparty/blobs/southbridge/amd/stoneyridge. Commit the new blob
to coreboot, and modify src/soc/amd/stoneyridge/Kconfig to use it.

BUG=b:69613465
TEST=Build and run kahlee.

Change-Id: I1784824dc7767c620e2fcbad7c6e5674934832ff
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/23125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-07 18:36:30 +00:00
Nico Huber 82049cb850 drivers/intel/gma: Power up legacy VGA block early
This is required at least on Skylake to be able to configure text mode.
3rdparty/libgfxinit is also updated by the single commit:

    42fb2d065d gma: Add procedure to power up legacy VGA block

Change-Id: I2fe144765e2b2acd9f6b76db375cae5b8feb5489
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/21386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-12-12 09:20:07 +00:00
Marc Jones 17c354dda9 Update vboot submodule to upstream master
Updating from commit id 3b80572:
2017-10-12 16:35:30 -0700 - (tlcl, tpmc: extend GetVersion to report vendor specific data)

to commit id f6780a3:
2017-12-01 14:54:40 -0800 - (firmware: header tweaks for depthcharge)

This brings in 19 new commits.

Change-Id: I49b1349cfd9266cd815b68759ae89bdffdd0d74b
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22777
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-12-09 03:11:11 +00:00
Nico Huber 504d1eff4b 3rdparty/lib{hwbase,gfxinit}: Update to latest master
Simplifies our C interface function gma_gfxinit(), due to the following
changes:

* *libgfxinit* knows about the underlying PCI device now and can
  probe MMIO addresses by itself.
* The framebuffer mapping is now completely handled inside the
  library where we validate that we neither overflow
  - the stolen memory,
  - the GTT address space, the GTT itself nor
  - the aperture window (i.e. resource2 of the PCI device)
    that we use to access the framebuffer.

Other changes:

* Fixes and a quirk for DP training.
* Fix for DP-VGA adapters that report an analog display in EDID.
* Fixes for Skylake support with coreboot.
* DDI Buffer drive-strength configuration for Haswell, Broadwell and
  Skylake.
* `gfx_test` can now be run from X windows (with glitches).
* Compatibility with GCC 7 and SPARK GPL 2017.

TEST=Booted lenovo/t420 and verified that everything works as usual.

Change-Id: I001ba973d864811503410579fd7ad55ab8612759
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-10-28 19:46:17 +00:00
Daisuke Nojiri 6370e7dfc1 Update vboot submodule to upstream master
Updating from commit id a52fc548
(image_signing: Remove legacy unified build feature)

to commit id 3b805725
(tlcl, tpmc: extend GetVersion to report vendor specific data)

This brings in 22 new commits.

Change-Id: I51e44490e0ffd2c5cc73d439c1f3f8831d816be9
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/22004
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-10-22 01:47:34 +00:00
Daisuke Nojiri c6dcdbfe19 Update vboot submodule to upstream master
Updating from commit id 3f3a496a 2017-09-01 09:20:19
(image_signing: Fix loem.ini pattern for unibuilds)

to commit id 753e34e9 2017-08-31 10:12:40
(futility: Make rwsig sign command produce EC_RW image)

This brings in 5 new commits.

This also updates Depthcharge stable commit ID.

Updating from a843f262 2016-08-16 08:41:04
(kahlee: select emmc boot first if available)

to commit id f3bb31fe 2017-08-15 17:15:33
(vboot: Support EC early firmware selection)

This brings in 14 new commits.

Change-Id: I17d034e87fa642c5e30e933eb98bcfe5ceaaa3a8
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/21490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-09-13 02:24:37 +00:00
Patrick Georgi 2997a97a3a 3rdparty/vboot: update to latest master
Besides some internal changes that won't have much effect on coreboot,
the newer version also supports building host tools on systems that
self-designate as i686.

Change-Id: I823bad862805cdec1dfecc8ba046f73ac206d3e8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/21302
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-09-06 08:24:04 +00:00
Martin Roth 66dce275e5 Update vboot submodule to upstream master
Updating from commit id 8b714252 - 2017-07-18 02:36:16
(crossystem: Remove defunct sw_wpsw_bootfield)

to commit id 8c4b8285 - 2017-08-14 20:37:45 -0700
(detachables: Skip "Enable Developer Mode" in DEV mode)

This brings in 6 new commits.

Change-Id: I7769035453796a162c6313cd0c87661ef1e64f89
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/21074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2017-08-23 16:32:52 +00:00
Martin Roth 6c1c9d5d5f Update vboot submodule to upstream master
Updating from commit id 04b3835b:
2017-06-12 06:47:41 -0700 - (Add a script to generate a keypair for signing Rose RW firmware.)

to commit id 8b714252:
2017-07-18 02:36:16 -0700 - (crossystem: Remove defunct sw_wpsw_boot field)

This brings in 19 new commits.

Change-Id: Ib68068b1afc5a264623021325e19644e8b63f8f3
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20702
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-31 20:30:55 +00:00
Martin Roth 8f1e1bd44d Update arm-trusted-firmware submodule to upstream master
Updating from commit id 3944adca:
2017-03-18 12:16:27 +0000 - (Merge pull request #861 from soby-mathew/sm/aarch32_fixes)

to commit id b1187232:
2017-06-20 15:34:54 +0100 - (Merge pull request #992 from davidcunado-arm/dc/fix-signed-comparisons)

This brings in 373 new commits.

Change-Id: I653007f664921305d22645f7904bb2d8eb85fe67
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20701
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-31 20:30:51 +00:00
Martin Roth 07cca22c22 3rdparty/chromeec: Update submodule to upstream master
Update from commit bcffec7fd - reef: Cleanup battery code
to commit 9fb10386a - Poppy: Configure camera PMIC to low power mode.

Brings in 794 new commits from Jan 2, 2017 to Jun 21, 2017

Change-Id: I864679360bd3b211b6883a662e20812b49aefbba
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-27 16:06:31 +00:00
Martin Roth f3ed7c1a34 3rdparty/blobs: Update submodule
Update blobs pointer to bring in the AGESA.bin changes for
amd/00670F00/FP4 and amd/00670F00/FT4.

Change-Id: I739124090e41edaf76210cda6189b2c7545cdf58
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-27 01:11:22 +00:00
Martin Roth 8b388e4741 Update vboot submodule to upstream master
Update from commit a1c5f7c0
vboot_reference: Add support for 3072-bit exponent 3 keys

to commit 04b3835b
Add a script to generate a keypair for signing Rose RW firmware

This brings in 34 new commits.

Change-Id: Ifa304af5c2cf0bcc466dfc4878dd9d08436eec75
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20228
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-06-17 19:58:40 +02:00
Nico Huber eb881d46e2 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit to the latest master. Changes:

* Remove trailing whitespace in debug output.
* Change some types to make it verify with SPARK Pro.
* Add Broxton (Apollo Lake) support for eDP/DP/HDMI.
* Add Linux user-space test tool `gfx_test`.
* Add a README describing libgfxinit and the build process.

TEST=Booted lenovo/t420 and verified that internal and
     external displays are working.

Change-Id: I4d0e23b8a254234173461b831585eae58d3af58e
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-08 14:15:19 +02:00
Nico Huber 7b79a338bd 3rdparty/libhwbase: Update submodule pointer
Update libhwbase to the current master. Some noteworthy changes:

* Add prerequisites for upcoming Apollo Lake support in libgfxinit.
* Add some support for Linux user-space for libgfxinit's `gfx_test`.
* Fix compilation with GCC 7.

Change-Id: If3c65065ef9a2ff6fce221939fda43c9e30c1eb8
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-08 14:14:45 +02:00
Martin Roth 76b8c0e044 3rdparty/arm-trusted-firmware: Update to upstream master
Submodule 3rdparty/arm-trusted-firmware 236c27d21f..3944adca59

This brings in 241 new commits from the upstream arm-trusted-firmware
repository, merged to the upstream tree between December 30, 2016 and
March 18, 2017.

3944adca Merge pull request #861 from soby-mathew/sm/aarch32_fixes
..
e0f083a0 fiptool: Prepare ground for expanding the set of images at
runtime

Also setup ATF builds so that unused functions don't break the build.
They're harmless and they don't filter for these like we do.

Change-Id: Ibf5bede79126bcbb62243808a2624d9517015920
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18954
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-05-18 23:55:48 +02:00
Nico Huber 989aae9f61 3rdparty/libgfxinit: Update submodule pointer
Some renamings force us to update our code:

  * Scan_Ports() moved into a new package Display_Probing.

  * Ports Digital[123] are called HDMI[123] now (finally!).

  * `Configs_Type` became `Pipe_Configs`, `Config_Index` `Pipe_Index`.

Other noteworthy changes in libgfxinit:

  * libgfxinit now knows about ports that share pins (e.g. HDMI1 and
    DP1) and refuses to enable any of them if both are connected
    (which is physically possible on certain ThinkPad docks).

  * Major refactoring of the high-level GMA code.

Change-Id: I0ac376c6a3da997fa4a23054198819ca664b8bf0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/18770
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-04-08 13:02:44 +02:00
Marshall Dawson 3c645391c0 3rdparty/blobs: Update for AMD Stoney Ridge
Add the binaryPI file for the FT4 package and add SMU firmware to
be consumed by fanless OPNs.

Change-Id: I1c9b5ded6b494fac1553cc2ec7756a7a47386ecf
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/18988
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-28 22:33:14 +02:00