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Author SHA1 Message Date
Tim Wawrzynczak
092813a50c soc/intel/alderlake: Add initial chipset.cb
Similar to the chipset.cb for TGL, this patch gives alias names to all
of the published PCI devices.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I6576ef4237c1fc8439795ad5b64b1840504edf73
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48009
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-30 08:07:26 +00:00