Commit Graph

313 Commits

Author SHA1 Message Date
Robert Zieba dd8472e2b6 Update blobs submodule to upstream master
Updating from commit id f14575c:
2022-02-14 21:14:23 +0800 - (mb/google/guybrush: Add SPL table)

to commit id 8c580e5:
2022-03-21 16:05:58 -0600 - (mb/google/guybrush: Update APCB file)

This brings in 3 new commits.

Signed-off-by: Robert Zieba <robertzieba@google.com>
Change-Id: Iee7a8c550a69bc50b82850b9bfac1a8ca5229557
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63027
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-24 17:20:58 +00:00
Jason Glenesk bddb16ba76 3rdparty/amd_blobs: advance submodule pointer
This adds the following commits:
 * a069321 cezanne: Update SMU firmware to 64.62.0
 * d8a51cb cezanne: Upgrade ABL to 0x22146070

Change-Id: I066252eda56b8b62db420cbcfc95c97875a3b6d1
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-03-16 16:56:06 +00:00
Martin Roth 7e76883f35 Update fsp submodule to upstream master
Updating from commit id 10eae55:
2021-08-24 21:11:18 +0800 - (Elkhart Lake MR1 FSP)

to commit id f4bbf5a:
2022-01-29 00:32:47 +0800 - (Apollo Lake MR10 FSP)

This brings in 20 new commits:
f4bbf5a Apollo Lake MR10 FSP
aab8be0 Apollo Lake MR10 FSP
45b935f Apollo Lake MR10 FSP
755e782 Signed-off-by: Wong <swee.heng.wong@intel.com>
da956c1 Whitley FSP 2.2.0.3A
7e3d894 Whitley FSP 2.2.0.3A
04ad3cd Tiger Lake - UP3 IoT FSP MR4
ccf7f35 Elkhart Lake MR2 FSP
4aa1275 Elkhart Lake MR2 FSP
8aa6a9a Cedar Island FSP 2.2.0.3A
2e2e740 Whitley FSP 2.2.0.3A
91a6117 Tiger Lake - UP3 IoT FSP MR3
2863499 Delete FspUpd.h
df41c58 Delete FsptUpd.h
0d420eb Delete FspsUpd.h
53cc56a Delete FspmUpd.h
ad51318 Tiger Lake - UP3 IoT FSP MR3
63273a4 Delete Fsp.fd
ce61eb3 Tiger Lake - UP3 IoT FSP MR3
f7f77a2 Delete Fsp.bsf

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I6128b9703498dd36be73c19cbbfe349c206c6cf3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60820
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-03-01 01:53:17 +00:00
Zheng Bao bd842a9b92 Update blobs submodule to upstream master
Updating from commit id b8e3eaf:
2021-07-15 08:09:11 +0000 - (mainboard/starlabs: Add files for Star Labs laptops)

to commit id f14575c:
2022-02-14 21:14:23 +0800 - (mb/google/guybrush: Add SPL table)

This brings in 11 new commits.
2021-07-15 08:09:11 +0000 - (mainboard/starlabs: Add files for Star Labs laptops)
2021-07-22 15:52:42 +0800 - (soc/mediatek/mt8195: Update MCUPM firmware from v1.00.00 to v1.01.00)
2021-07-22 17:11:04 +0800 - (soc/mediatek/mt8195: Add dram.elf for full calibration flow)
2021-07-29 16:19:31 +0800 - (soc/mediatek/mt8195: Add dpm.pm and dpm.dm version 1.0)
2021-10-06 16:18:46 +0800 - (soc/mediatek/mt8195: Update MCUPM firmware from v1.01.00 to v1.02.00)
2021-11-16 12:01:22 +0800 - (soc/mediatek/mt8186: Add MT8186 basic files)
2021-12-24 17:25:31 +0800 - (soc/mediatek/mt8186: Add SPM firmware)
2021-12-24 17:25:33 +0800 - (soc/mediatek/mt8186: Add SSPM firmware)
2022-01-21 10:30:35 +0800 - (soc/mediatek/mt8186: List `sspm.bin` in README)
2022-01-24 16:48:56 +0800 - (soc/mediatek/mt8186: Add dram.elf version 0.1.0 for DRAM calibration)
2022-02-09 14:53:44 +0800 - (soc/mediatek/mt8195: Update dram.elf from 1.7.1 to 1.8.1)
2022-02-14 21:14:23 +0800 - (mb/google/guybrush: Add SPL table)

Change-Id: I0ced625982135c0cb7630cd0fb94cf78e3654673
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61935
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-02-15 17:03:11 +00:00
Martin Roth bde5558e54 Update arm-trusted-firmware submodule to upstream master
Updating from commit id 73193689c:
2021-12-06 16:47:33 +0100 - (Merge changes I7c9f8490,Ia92c6d19 into integration)

to commit id e0a6a512b:
2022-02-03 22:59:34 +0100 - (Merge changes from topic "msm8916" into integration)

This brings in 324 new commits.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I44bca36f4b05e08fe7d7de0966131be84c0a7d2b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60818
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-10 21:18:07 +00:00
Martin Roth 74249b9af9 Update qc_blobs submodule to upstream master
Updating from commit id 98db386:
2021-08-03 11:57:30 -0700 - (herobrine: Add gsi_fw_blobs and Release Notes)

to commit id 9ab0f0b:
2022-01-18 19:01:30 +0530 - (sc7280: Update AOP firmware to version 379)

This brings in 13 new commits:
9ab0f0b sc7280: Update AOP firmware to version 379
826cb9c sc7180/boot : Update qclib blobs binaries and release notes
ddf67d1 sc7280/ boot and shrm blobs updated
8592f11 sc7280: Update AOP firmware to version 364
aef8a0a sc7280/ boot and shrm blobs updated
c72bc4e sc7280/cpucp: Update cpucp blobs binaries and release notes version from 054 to 060
33e57fe sc7280/boot,/shrm : Update qclib blobs binaries and release notes version 13
511851b sc7180/boot : Update qclib blobs binaries and release notes version 30
f91d0ef herobrine: qc_sec blob update
8c50f78 sc7180/boot : Update qclib blobs binaries and release notes
8523ef4 sc7180/qtiseclib: Update version from 26 to 44
5b77a37 sc7280/qtiseclib: Update version from 33 to 44
4815cc2 sc7280: Update AOP firmware to version 360

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I510141916900507fd29a0e9315a3f8d954bc0cab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-10 21:16:07 +00:00
Martin Roth caa1d41d5c Update intel-microcode submodule to upstream master
Updating from commit id 3f97690:
2021-06-08 09:44:38 -0700 - (microcode-20210608 Release)

to commit id 115c3e4:
2022-02-07 18:23:52 -0800 - (microcode-20220207 Release)

This brings in 1 new commits:
115c3e4 microcode-20220207 Release

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Idb2dcd3e3ef9692e21109ac0e8bdfa9f61740f14
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61769
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-02-10 21:14:45 +00:00
Jason Glenesk d91af22f11 3rdparty/amd_blobs: advance submodule pointer
This adds the following commits:
 * 9e8f457 picasso: Update Dali SMU firmware
 * 428da69 Revert "cezanne: Correct the whitelist bootloader name"
 * ebed66e cezanne: Correct the whitelist bootloader name

Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Change-Id: I73a240e8443ee4bf264e55857dfc78c11a08113f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61516
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-02-01 20:28:53 +00:00
Raul E Rangel c8283d7014 3rdparty/amd_blobs: advance submodule pointer
This adds the following commits:
* 22ce1b5 cezanne: Upgrade SMU to 64.60.0
* dd37ad2 cezanne: Update ABL to 0x1B096070
* 01fbf5d cezanne: Update SMU to 64.58.0
* f638765 cezanne: Update ABLs to 0x1A296070

BUG=none
TEST=Boot guybrush to OS

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I8f51cb007ce4127428b7b81095fb2c7afb33e608
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61046
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-01-18 19:25:59 +00:00
zhixingma e5af29c40b Update chromeec submodule to upstream main
Updating from commit id 4c21b57eb:
2021-07-19 11:36:07 +0000 - (pd: Fix missing polarity_rm_dts in some conditions)

to commit id e486b388a:
2022-01-12 21:11:11 +0000 - (zephyr: Update power policy for API change)

This brings in 2212 new commits.

Signed-off-by: zhixingma <zhixing.ma@intel.com>
Change-Id: I4437f09c3193ec7c89f7f9550940a0fa5464a511
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Thejaswani Putta <theja427@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
2022-01-17 15:55:32 +00:00
Hsuan Ting Chen 876cffae65 Update vboot submodule to upstream master
Updating from commit id 13f601fb:
2021-09-24 12:25:24 +0000 - (vboot: boot from miniOS recovery kernels on
disk)

to commit id 25b94935:
2021-12-29 21:34:41 +0000 - (vboot_ref/futility: Wrap flashrom_drv
behind USE_FLASHROM)

This brings in 44 new commits.

Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Change-Id: Ife75d21ddfa0b956fdf7a638cd53b55b11f6cb7d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-01-04 06:49:49 +00:00
Yu-Ping Wu 7edea1b790 Update arm-trusted-firmware submodule to upstream master
Updating from commit id 586aafa3a:
2021-07-19 05:36:18 +0200 - (Merge "errata: workaround for Neoverse V1 errata 1791573" into integration)

to commit id 73193689c:
2021-12-06 16:47:33 +0100 - (Merge changes I7c9f8490,Ia92c6d19 into integration)

This brings in 684 new commits.

Change-Id: I4173f3cb646839ad12c4e43e8c50b0be53364f04
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2021-12-09 01:51:01 +00:00
Sean Rhodes 89b6d4bf12 3rdparty/blobs: Update submodule
This brings in EC firmware binaries for Star Labs laptops, as
well as a custom bootsplash image.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Iab5ff610b19fbe6a2e61999457a13a86d47f0ca7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-11-22 14:46:37 +00:00
Felix Held 7842755d46 3rdparty/amd_blobs: advance submodule pointer
This adds the following commits from the submodule:
* cezanne: Upgrade blobs to 1.0.0.5
* cezanne: Upgrade ABL to ver. 0x19036070
* cezanne: Upgrade SMU FW to 64.52.0
* cezanne: Upgrade SMU to 64.57.0
* cezanne: Update ABLs to 0x1A296070

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id7b3f5d38d34c2714548dff92b7b83fb2628e936
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58989
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-08 14:46:01 +00:00
Selma Bensaid c42d875448 Update vboot submodule to upstream main (13f601f)
Updating from commit id c5a482ed:
    2021-09-08 17:16:59 +0000 - (sign_official_build: disable gsetup for reven)

to commit id 13f601f:
    13f601f vboot: boot from miniOS recovery kernels on disk b

This brings in 14 new commits.

Signed-off-by: Selma Bensaid <selma.bensaid@intel.com>
Change-Id: I66788ea434a6000435b97ce64107f3b5da882414
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57994
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-29 15:35:28 +00:00
Arthur Heymans a767a14878 3rdparty/fsp: Update submodule
This includes the Cedar Island FSP which is used by xeon_sp/cpx.
Also updates EHL FSP to latest MR1 version.

Change-Id: I1c2d440ce0f20a0922e5d91f615771843281fca6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57488
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-23 06:38:38 +00:00
Felix Held 6078fe2502 3rdparty/amd_blobs: update submodule pointer
* cezanne: Remove internal classification from PSP release notes

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8198a1d88e98a2192ccd2ddadb1842daabf9c02f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57689
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-09-17 17:14:16 +00:00
Hsuan Ting Chen bb127db428 Update vboot submodule to upstream main
Updating from commit id 4423276b:
2021-08-31 17:41:34 +0000 - (crossystem: add a hwid override mechanism from chromeos-config)

to commit id c5a482ed:
2021-09-08 17:16:59 +0000 - (sign_official_build: disable gsetup for reven)

This brings in 10 new commits.

Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Change-Id: I67d4bfa182eae98bb23ae487f117c991502b66ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57639
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-09-15 23:58:03 +00:00
Thejaswani Putta 60d0a30497 Update vboot submodule to upstream main
Updating from commit id ccc56f4:
    vboot: add x86 SHA256 ext support

to commit id 4423276:
    crossystem: add a hwid override mechanism from chromeos-config

Signed-off-by: Thejaswani Putta <thejaswani.putta@intel.com>
Change-Id: I7bd73b9f6c0492f96c336b61e21ecae37b8f3606
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Thejaswani Putta <thejaswani.putta@intel.corp-partner.google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-09-06 19:15:00 +00:00
Tim Crawford 8de2d591e2 3rdparty/intel-microcode: Update submodule to 20210608 release
Update submodule pointer to include microcode for TGL and others.

Tested the following still boot:

- galp3-c (WHL-U): sig=0x806eb pf=0x80 revision=0xe9
- oryp5 (CFL-H): sig=0x906ea pf=0x20 revision=0xe9
- gaze15 (CML-H): sig=0xa0652 pf=0x20 revision=0xe9

coreboot reports the revision as -1 from what it actually is. i.e.,
these should report revision=0xea (and that is what Linux reports).
However, this behavior is not new.

Change-Id: I084ba67e8eaf7383f1c05fa5589b63c92ff900b1
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56861
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-13 18:06:50 +00:00
Shelley Chen 530624de21 3rdparty/qc_blobs: Uprev to new HEAD (98db386)
Now that gsi_fw blob has landed, need to uprev the qc_blobs.

Change-Id: I0bf67a560ee2e5d771bdb71b60e3d3d372dad567
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56776
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-03 23:40:01 +00:00
Patrick Georgi a4422b84fd Update chromeec submodule to upstream main
Updating from commit id 1e800ac83:
2021-03-01 22:59:54 +0000 - (docs: point md files in master to main/HEAD)

to commit id 4c21b57eb:
2021-07-19 11:36:07 +0000 - (pd: Fix missing polarity_rm_dts in some conditions)

This brings in 3145 new commits.

Change-Id: Iff2e9f766e750070d71644c2f9895ad10e8b1c9a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56431
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-07-28 20:53:49 +00:00
Patrick Georgi aca017a8bb Update arm-trusted-firmware submodule to upstream integration
Updating from commit id 96404aa27:
2021-05-13 18:27:27 +0200 - (Merge "build(hooks): update Commitizen to ^4.2.4" into integration)

to commit id 586aafa3a:
2021-07-19 05:36:18 +0200 - (Merge "errata: workaround for Neoverse V1 errata 1791573" into integration)

This brings in 207 new commits.

Change-Id: Iaf8af5ffaf377070ee1430ed7cfdc51001a1ba6b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56416
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-07-28 20:53:44 +00:00
Shelley Chen eeaf569257 3rdparty/qc_blobs: Uprev to new HEAD (e96cde2)
Now that cpucp blobs have landed, need to uprev the qc_blobs.

Change-Id: I62dc410cee7baf5efa5c0406f35ee05a535f49b1
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56574
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-07-24 05:37:23 +00:00
Subrata Banik bf487e46d7 Update vboot submodule to upstream main
Updating from commit id b38e3a63:
    cros_ec: Use boot mode to check if EC can be trusted

to commit id ccc56f4:
    vboot: add x86 SHA256 ext support

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I4e170e84a12646386d3fd84ae97add6c19f23809
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-07-01 09:38:12 +00:00
Arthur Heymans c44ffc3084 security/intel/cbnt: Build test CBnT provisioning
This updates the intel-sec-tools submodule pointer to include a fake
acm binary to be included for buildtesting.

Change-Id: Id4a9e177f71306b8c5538a578da229a53d19487a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-06-28 04:13:54 +00:00
Patrick Georgi ecc5a2f147 3rdparty/libgfxinit: Update to latest ToT
This brings in three new commits that are mostly concerned about
fixing the build with gcc 11.

Change-Id: I35f9100e2bfb2a261b3a0a128697550caf5840d9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55498
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-17 04:29:55 +00:00
Patrick Georgi dc32051bb4 3rdparty/libhwbase: Update to latest ToT
This update adds a commit to fix building libgfxinit with gcc 11

Change-Id: I5c0e3823ab7219667f9430bce74e4f2fba0c0c3a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55497
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-06-15 19:46:19 +00:00
Angel Pons bd36177632 3rdparty/intel-sec-tools: Fix submodule pointer
The commit currently being pointed to is unreachable. Use the same
commit that exists in a reachable branch.

Fixes: Commit 1128817ed6
       (3rdparty/intel-sec-tools: Update to support Boot Guard)
Signed-off-by: Angel Pons <th3fanbus@gmail.com>

Change-Id: I1cfc08d48fe5471592fea1013e8b43bea5d7b565
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55414
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-14 05:26:05 +00:00
Raul E Rangel e766f6ba92 3rdparty/amd_blobs: Update submodule pointer
* Upgrade blobs to match PI 1.0.0.3c

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Id7d60f9b45be927afda5b9498d12443c7e19aac1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55280
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-06-10 05:36:45 +00:00
Christopher Meis 1128817ed6 3rdparty/intel-sec-tools: Update to support Boot Guard
Update intel-sec-tools to commit of BootGuard support.
Remove --coreboot argument in src/security/intel/cbnt/Makefile.inc:
was removed as argument for cbnt

Change-Id: Iaf34bdb65a5f067d1d632e35d340b8fc49aaf318
Signed-off-by: Christopher Meis <christopher.meis@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55013
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-07 11:36:22 +00:00
Lean Sheng Tan b67c5edf82 3rdparty/fsp: Update submodule pointer to newest master
Newest master includes these changes:
1. Introduce the FSP package for Elkhart Lake SKUs
2. Introduce the FSP package for Tiger Lake IoT SKUs
3. Update the FSP package to latest version for Apollo Lake,
   Comet Lake and Tiger Lake (client SKUs)

You can get further 3rdparty/FSP commit history here:
https://github.com/intel/FSP/commits/master

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I96d147fec82d0fcd5c7748c277deb0672a975ceb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55228
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-07 05:27:21 +00:00
Daisuke Nojiri e5706630ed Update vboot submodule to upstream main
Updating from commit id e681c37:
    change node locked version expectations

to commit id b38e3a63:
    cros_ec: Use boot mode to check if EC can be trusted

Change-Id: Id6de185af85a61a3843b302fef6fa0d4d3c17aef
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55026
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-30 20:18:08 +00:00
Aseda Aboagye 7a9fe102c2 Update vboot submodule to upstream/main (e681c37)
This commit updates the vboot submodule from commit 57c0c5b:
   cgpt: Move all GPT on SPI-NOR infra behind a flag

to e681c37:
    change node locked version expectations

Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ifd130e3f66f1819f59f00703f0ad0c2278b544bf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-05-16 21:53:53 +00:00
Yu-Ping Wu d5a94c5e0c Update arm-trusted-firmware submodule to upstream master
Updating from commit id 7ad39818b:
2020-10-12 09:16:21 +0000 - (Merge "mediatek: mt8192: add GIC600 support" into integration)

to commit id 96404aa27:
2021-05-13 18:27:27 +0200 - (Merge "build(hooks): update Commitizen to ^4.2.4" into integration)

This brings in 861 new commits.

Change-Id: I912545022e4320b86ab8a382144c02e315d0c835
Signed-off-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-05-15 06:00:20 +00:00
Angel Pons a0a778932e 3rdparty/libgfxinit: Update submodule pointer
This brings in LSPCON support.

Change-Id: I35cefa2aa8107b7841d7cf7a7bb61d4b591d14ae
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51147
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2021-05-12 14:49:26 +00:00
Shelley Chen 8479656c71 3rdparty/qc_blobs: Uprev to new HEAD (053eb2a)
Now that Boot blobs have landed, need to uprev the qc_blobs.

Change-Id: I510de2d1e4334612c81f35a082dea92d445da0bb
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54037
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-05-11 22:19:43 +00:00
Arthur Heymans f69cece074 3rdparty/intel-sec-tools: Update submodule pointer
Some changes:
- bg-prov got renamed to cbnt-prov
- cbfs support was added which means that providing IBB.Base/Size
  separatly is not required anymore. Also fspt.bin gets added as an
  IBB to secure the root of trust.

Change-Id: I20379e9723fa18e0ebfb0622c050524d4e6d2717
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52971
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-10 08:31:31 +00:00
Bora Guvendik 03dfd19e6e Update vboot submodule to upstream main
Updating from commit id 9d4053df:
2020-11-20 01:51:08 +0000 - (Revert "Reland: Clean up implicit fall through.")

to commit id 57c0c5be:
2021-04-09 11:45:39 +0800 - (cgpt: Move all GPT on SPI-NOR infra behind a flag)

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Id50a892f12ff3c4147c422c98b640ac047143128
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52453
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-22 12:43:10 +00:00
Shelley Chen ecc720b261 3rdparty/qc_blobs: Uprev to new HEAD (02ba9a6)
Change-Id: I18fc6443a6972e22c979daaf68d0b9c046d1866f
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-04-21 23:09:22 +00:00
Raul E Rangel 989323d29e 3rdparty/blobs: Update blobs pointer to f388b6794e6f
mb/google/guybrush: Update APCB - disable debug
    mb/google/guybrush: Add APCB to get through memory training
    soc/mediatek/mt8192: Add EMI Settings of 8GB Normal Mode
    soc/mediatek/mt8192: Update MCUPM firmware
    soc/mediatek/mt8192: Add version info for SSPM

TEST=Boot guybrush to OS

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I445d753c712670fe80efcdf29459736df2b76666
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52112
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-04-07 08:49:11 +00:00
Martin Roth 8bd525001f Update amd_blobs submodule to upstream master
Updating from commit id 3a9d7cd:
2021-03-03 15:37:08 -0700 - (picasso: Update Dali SMU firmware)

to commit id dded82f:
2021-03-23 15:36:36 -0600 - (picasso: Update Dali SMU firmware)

This brings in 2 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If71e52a2a3e50aeb8599798de7b49bc71ed26a04
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-28 16:06:19 +00:00
Arthur Heymans 7e4ad26b95 3rdparty/intel-sec-tools: Update submodule pointer
This includes the bg-prov tool.

Change-Id: Iba8efe3bcb67694da76ef78abaa0562d47f7850b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
2021-03-19 11:35:13 +00:00
Martin Roth ca2e7161d1 Update chromeec submodule to upstream master
Updating from commit id a2390f3c5:
2020-12-01 08:35:44 +0000 - (servo_v4/usb_pd_policy: Reject SNK->SRC power swap if CC_ALLOW_SRC not set)

to commit id 1e800ac83:
2021-03-01 22:59:54 +0000 - (docs: point md files in master to main/HEAD)

This brings in 188 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I5c276d7839e0bdbf14ac56f16c231d75a6ea4c3e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-16 11:18:34 +00:00
Martin Roth 206020ccff Update arm-trusted-firmware submodule to upstream master
Updating from commit id a4c979ade:
2020-08-26 14:59:05 +0000 - (Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration)

to commit id 7ad39818b:
2020-10-12 09:16:21 +0000 - (Merge "mediatek: mt8192: add GIC600 support" into integration)

This brings in 222 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Id186df36d90563f94f17cc210a6f634adc4ec61e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51463
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-16 11:18:21 +00:00
Martin Roth 50c667de52 Update amd_blobs submodule to upstream master
Updating from commit id 3b1a734:
2021-03-02 11:51:18 -0700 - (picasso: Update FSP to build 0x26)

to commit id 3a9d7cd:
2021-03-03 15:37:08 -0700 - (picasso: Update Dali SMU firmware)

This brings in 1 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Iff3b4ff667f97d3804bc66477f8a95a60e23b1a0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51459
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-15 01:37:53 +00:00
Martin Roth c381b194cc Update blobs submodule to upstream master
Updating from commit id 4fdfa1c:
2021-03-05 13:10:22 -0600 - (mb/amd/majolica: Update to use proper APCBs built for Majolica)

to commit id fc2d4e2:
2021-03-12 10:31:48 -0700 - (mb/google/guybrush: Add initial APCB)

This brings in 1 new commit.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I3003fdb8ba0bcfbc33452999c35a9a21775ecc10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51462
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-15 01:22:33 +00:00
Matt Papageorge a37ec522e1 mb/amd/majolica: Update to use proper APCBs built for Majolica
Some of the previous binaries were incorrect and should not be used
for Majolica because they are templates instead of APCBs specifically
built for the board. This APCB update also places the UMA region under
4G and size 32 MB which is essential for video output.

TEST=Boot with UEFI BIOS and verify we can get to OS. Also verify memory
region size, base and alignment.

Change-Id: Id797e2ad5bd67815c09752aedc19dad7dcf8ad12
Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-03-10 23:28:19 +00:00
Nikolai Vyssotski 794f1e785d amd_blobs: update submodule pointer
Pick up build 0x26 Picasso FSP binaries. The changes include increased
FSPS UPD block size from 0x152 to 0x202.

Change-Id: I11fc199ca7bc6ee7431c59d35a60d9ebd977bf10
Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51193
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-03-03 22:20:07 +00:00
Marshall Dawson d882bd478d amd_blobs: Update cezanne PSP Secure OS
Avoid a Secure OS Abort.  This prevents coreboot timing out on C2P
mailbox commands and allows HDT unlocking.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I358530a1ba959ee1896e26a47853c9918ee124b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51109
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-03-01 08:28:07 +00:00
Marshall Dawson 2c30a83d9b amd_blobs: Add cezanne whitelist bootloader
Advance the pointer to pick up the PSP whitelist bootloader.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I45da509ee6f782cbe64e7099f3945129282060b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-03-01 08:27:43 +00:00
Ritul Guru 8c80d9e612 3rdparty/blobs: advance submodule pointer.
This adds the apcb binary for Bilby.

Change-Id: I1487369bc72734e875c5a701f27ed2d6af41cd01
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-02-11 21:34:52 +00:00
Patrick Georgi 841491c06f Update chromeec submodule to upstream master
Updating from commit id a1afae4:
2019-10-02 11:47:45 +0000 - (juniper: initial setup)

to commit id a2390f3:
2020-12-01 08:35:44 +0000 - (servo_v4/usb_pd_policy: Reject SNK->SRC power swap if CC_ALLOW_SRC not set)

This brings in 4022 new commits.

Change-Id: Ib13921aa78a60f88455223eff602296abc424ca8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48212
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-06 10:47:13 +00:00
Tim Crawford 8818ddab82 3rdparty/intel-microcode: Update submodule to 20201118 release
Update submodule pointer to include microcode for CML-H and others.

Change-Id: Ide211b0b163f824a3cfa6500a73aea1e2176c652
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47914
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-23 17:00:15 +00:00
Felix Held e8ac16e7e9 3rdparty/blobs: advance submodule pointer
This pulls in the following changes:
* Drop geode_lx
* cpu/amd/model_fxx: Drop unused microcode
* cpu/amd/model_10xx: Drop unused microcode
* soc/mediatek/mt8192: Add dram.elf for DRAM full calibration
* soc/mediatek/mt8192: Add dpm binary
* soc/mediatek/mt8192: Add 4266Mbps flag for dpm & dram blob
* soc/mediatek/mt8192: add SPM firmware
* soc/mediatek/mt8192: Support 26M clock off in SPM
* soc/mediatek/mt8192: Add SSPM firmware
* soc/mediatek/mt8192: Add MCUPM firmware
* soc/mediatek/mt8192: Update MCUPM firmware
* soc/mediatek/mt8192: Support discrete DRAM modules
* mb/amd/majolica: Add APCB configuration files

Change-Id: I5c18349307421707fac71f392b785f3e2bef3acb
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-01-19 23:02:52 +00:00
Marshall Dawson 558a497f4c amd_blobs: Add new picasso VBIOS
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Icf1571ae360cee5698626f0360e1408360e8a7f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-01-14 01:16:08 +00:00
Marshall Dawson 663c17c78d amd_blobs: Advance pointer for picasso FSP 0x25
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I2aa5f353432cd8f79005153a06ac35c1e654f6f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49223
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-01-08 15:18:07 +00:00
Nico Huber 3394040e79 3rdparty/libgfxinit: Update for Cannon Point support
We missed that Cannon Point, the PCH usually paired with Coffee, Whiskey
and Comet Lake, differs a bit from its predecessors. Hence, libgfxinit
now has a new Kconfig setting for the PCH.

Change-Id: I1c02c0d9abb7340aabe94185ee5e17ef4c2b0d36
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48764
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-28 17:27:21 +00:00
Felix Singer b8d614f8cc 3rdparty/fsp: Update submodule pointer to newest master
Newest master introduces the FSP for Tiger Lake client SKUs.

Change-Id: Id437faf72f1b8c5bc5310596bdab980e64614fa0
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48712
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-24 08:16:05 +00:00
Marshall Dawson b8602aa184 amd_blobs: Add cezanne files
Add blobs from the 1.0.0.1 release of CezannePI-FP6.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Iebfbe819ed429a7aed1882964061e1bc98f3bc39
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48647
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-12-17 13:27:06 +00:00
Marshall Dawson 535fa0a1cd 3rdparty/amd_blobs: Update pointer for picasso SMU and FSP
Add the newest SMU firmware and FSP blobs for the picasso project.
This supports Picasso, Dali, and Pollock devices.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I75e6f3d2a59ed8b2e42afba3a6978574373ec4e5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-12-02 15:20:35 +00:00
Patrick Georgi 2f1d686ba6 Update vboot submodule to upstream master
Updating from commit id 9d4053d:
2020-11-20 01:51:08 +0000 - (Revert "Reland: Clean up implicit fall through.")

to commit id 48195e5:
2020-11-24 10:23:45 +0000 - (Makefile: Test for warning flags before using them)

This brings in 3 new commits.

Change-Id: I64f27f346df264cb6eeeb4e3203fcca7d35f7e83
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2020-11-25 16:26:48 +00:00
Julius Werner d656d08f5e Update vboot submodule to upstream master
Updating from commit id 4c523ed1:
    vboot2: Add support for modexp acceleration

to commit id 9d4053df:
    Revert "Reland: Clean up implicit fall through."

This brings in 32 new commmits. Among the changes are restored support
for older GCC/clang versions that do not support
__attribute__((fallthrough)).

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I1110664bf71b4376bcdd9ba934a95031ba872c1d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Joel Kitching <kitching@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-11-21 00:35:46 +00:00
Felix Held 4fc4a37038 3rdparty/amd_blobs: update submodule pointer
This now tracks a recently created upstream repository located at
https://github.com/amd/firmware_binaries

BUG=b:166107781

Change-Id: Ib193d646bb51cbf7b86f46828033e619c3f70e16
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46594
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-21 13:45:30 +00:00
Felix Held 059c7910eb 3rdparty/blobs: advance submodule pointer
The 3 commits commits from the blob repository this patch pulls in
remove executable flags from files in the repo that shouldn't have those
flags set:

* pi/amd/00660F01/FP4/AGESA.bin: Remove execute file mode bit
* Remove execute permission from all binaries
* Remove execute permission from plaintext files

Change-Id: I9c2b7c69f07e46bac466bfbfb277595c9fbc5a5a
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46554
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-20 15:04:03 +00:00
Kangheui Won 68e5fd2a5c Update vboot submodule to upstream master
Updating from commit id 4bb06cc1:
    COIL: Change denylist to blocklist

to commit id 4c523ed1:
    vboot2: Add support for modexp acceleration

This brings in 10 new commmits.

Change-Id: Iff6eb99c8ed3046b6fdb6c1e2892aab956f3b562
Signed-off-by: Kangheui Won <khwon@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Eric Peers <epeers@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2020-10-07 04:24:26 +00:00
Felix Held 4ae3e41deb 3rdparty/blobs: advance submodule pointer
This pulls in the following changes:
* soc/intel/baytrail/microcode.bin: Remove outdated microcode
* mainboard/amd/mandolin: add Cereme APCB

Change-Id: If6dd7881b346782635dec07710fe5c4449254e3c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45851
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-30 21:45:06 +00:00
Eugene D Myers 61a77d6fcc 3rdparty: Add STM as a submodule
The patch incorporates the STM build as a part of the coreboot
build.  A separate patch lists and documents the options that
the developer can use.  In most cases the default options will
suffice.

Change-Id: I8c6e0c85edd4e2b0658791553bd9947656e8c796
Signed-off-by: Eugene D Myers <cedarhouse@comcast.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>
2020-09-30 10:17:03 +00:00
Matt Papageorge ec0fb40893 Update amd_blobs submodule to upstream master
Updating from commit id 3bd9078:
2020-08-12 17:03:38 -0600 - (picasso: Update PSP to 0.8.6.7B)

to commit id e393a88:
2020-09-16 14:32:50 +0000 - (Update SMU firmware for Picasso, Pollock and Dali)

This brings in 1 new commits.

Change-Id: I1e317cf6ef4803577e9b353fb3313d001db228d7
Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45455
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-17 19:46:18 +00:00
Idwer Vollering 042edd389b Update vboot submodule to upstream master
Updating from commit id fefcaa65:
    vboot: adjust VB2_SECDATA_KERNEL_FLAGS in non-recovery path

to commit id 4bb06cc1:
    COIL: Change denylist to blocklist

This brings in 20 new commmits.

Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Change-Id: I0efef2f0ab6ecb89c8132cca2bd4ab7f71e85ced
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45299
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-12 20:53:25 +00:00
Philipp Deppenwiese 404a42bb3a 3rdparty: Add submodule intel-sec-tools
Project: https://github.com/9elements/converged-security-suite
License: BSD-3

Tooling for Intel platform security features

Change-Id: I7421b30eb38e64cf6b77b7e1c485c5700728997b
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45170
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-09 13:08:25 +00:00
Julius Werner 8e0f9f30f6 3rdparty/qc_blobs: Uprev to new HEAD (6b7fe498eb)
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I2de0c13000e5b1e32e9c1a6de3daa09acf6c321b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45057
Reviewed-by: Philip Chen <philipchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-09 00:02:00 +00:00
Felix Singer dd9f635a60 3rdparty/fsp: Update submodule pointer to current master
Change-Id: I50bac5a70425495832649e0d6d6e91aad623f25c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
2020-09-03 21:13:36 +00:00
Julius Werner 0900bd0927 Update arm-trusted-firmware submodule to upstream master
Updating from commit id ace23683b:
2019-09-27 Merge changes from topic "ld/stm32-authentication" into
	   integration

to commit id a4c979ade:
2020-08-26 Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration

This brings in 1825 new commits.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Id26301dae421eec61c10a2d18842053f3228c557
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44885
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-31 06:39:15 +00:00
Kangheui Won 4c875c8a5d Update vboot submodule to upstream master
Updating from commit id 3932b1c:
2020-08-19 02:09:04 +0000 - inclusive: change usage of
blacklist/whitelist

to commit id fefcaa6:
2020-08-24 04:32:03 +0000 - vboot: adjust VB2_SECDATA_KERNEL_FLAGS in
non-recovery path

This brings in 2 new commits.

Change-Id: Ia3ff764537b91f76ba6fa3ba2646638964800510
Signed-off-by: Kangheui Won <khwon@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44732
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2020-08-28 21:55:20 +00:00
Patrick Georgi 08d5be59be 3rdparty/vboot: Update to latest master
This also includes https://chromium-review.googlesource.com/2318026
which fixes an issue with duplicate symbols.

Change-Id: Icf450616b3bcd8b7c01261c913cd172625dbd6ba
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-08-20 21:06:27 +00:00
Marshall Dawson 3dc0294381 3rdparty/amd_blobs: Move the pointer for picasso update
Update PSP to 0.8.6.7B.

BUG=b:163857965
TEST=none

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I634dadccc51b36f9ac25c3238a794564ce580d5a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44427
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-13 20:28:41 +00:00
Angel Pons e4b22e7f19 3rdparty/intel-microcode: Update submodule to 20200616 release
Change-Id: Ia250765e2cb81d6a39ad00ebbab20e7b87fa42d1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43758
Reviewed-by: Michael Niewöhner
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-08 20:32:22 +00:00
Marshall Dawson a1e578cc15 3rdparty/amd_blobs: Move pointer to 0.8.5.7B
BUG=b:162057232

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Ifd4ac0655f7ada5ec10a266fdb2b930861959215
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44040
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-30 16:40:58 +00:00
Paul Menzel 12baa811f0 3rdparty/vboot: Update submodule pointer to upstream master
Building depthcharge master currently fails as depthcharge commit 74ca8ae5
(depthcharge: Hide dev mode timeout description) changed the function signature
according to vboot commit 59fd331b (vboot/ui: pass timer_disabled to
vb2ex_display_ui()), which is not yet present in the vboot checkout:

    $ make
    […]
        CC         drivers/ec/vboot_auxfw.depthcharge.o
    src/drivers/ec/vboot_auxfw.c: In function 'display_firmware_sync_screen':
    src/drivers/ec/vboot_auxfw.c:117:5: error: too many arguments to function 'vb2ex_display_ui'
         vb2ex_display_ui(VB2_SCREEN_FIRMWARE_SYNC,
         ^~~~~~~~~~~~~~~~
    In file included from /dev/shm/coreboot-1/3rdparty/vboot/firmware/include/vb2_api.h:18,
                     from src/drivers/ec/vboot_auxfw.c:17:
    /dev/shm/coreboot-1/3rdparty/vboot/firmware/include/../2lib/include/2api.h:1262:13: note: declared here
     vb2_error_t vb2ex_display_ui(enum vb2_screen screen,
                 ^~~~~~~~~~~~~~~~

So update the submodule pointer from commit 68de90c7 (Allow building for
non-CrOS environments) to commit ed23c084 (Reset EC when transitioning to dev
mode).

This brings in 7 new commits.

Change-Id: Icd5408fb824fc5da470774b7f493b916dff17832
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43517
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Joel Kitching <kitching@google.com>
2020-07-27 13:18:15 +00:00
Angel Pons 9b09093878 3rdparty/libgfxinit: Update submodule pointer
This brings in 4 new commits:
* c0db994 common/Makefile.inc: Factor out generation TLAs
* 3f86b0b Move `PSR_Off` out of `Power_And_Clocks_Haswell`
* 450c24c haswell: Make VGA on FDI work
* 3318bf2 Drop generation suffix from `Power_And_Clocks`

Change-Id: I023b0c2bb403b3a9c9fe575a78cd2cf2f20b112a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43559
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-07-20 12:09:47 +00:00
Angel Pons a92878152f 3rdparty/libhwbase: Update submodule pointer
This brings in 5 new commits:
* 69e9086 mutime: Make Sinfo an imported constant
* 9f87a10 time: Add T_First constant
* 4e22910 Makefile: Adapt $(space) definition
* d822df5 Makefile: Delay expansion of `$(ADAFLAGS)`
* a3edc6e Makefile: Add `-gnatw_R` to suppress spurious warning

Change-Id: I907e66fcf85da256a112a7069a3c551a6d8caaf0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43558
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-20 12:09:30 +00:00
Patrick Georgi 401671c7ab Update vboot submodule to upstream master
Updating from commit id c531000f:
2020-05-18 20:55:55 +0000 - (vboot: Add recovery reason code for CSE Lite SKU errors)

to commit id 68de90c7:
2020-07-02 11:31:05 +0000 - (Allow building for non-CrOS environments)

This brings in 59 new commits.

Change-Id: I7f3c30511ff4acc60e3581bdab89d685dc7beaa5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43008
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-03 21:03:19 +00:00
Marshall Dawson b389f3aa0b 3rdparty/amd_blobs: Update Picasso PSP files
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I752804919227c1522374b93e08abee13396b2679
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42893
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-07-01 05:21:31 +00:00
Julius Werner bc1cb38ce1 Add qc_blobs repository
This patch adds a separate blobs repository for Qualcomm blobs,
analogous to the existing AMD blobs. Qualcomm's binary licenses allow
files to be redistributed and used by anyone, but they explicitly
require the user to agree to the license terms when just *downloading*
the binary (even if they're not using them to build any firmware). Some
community members do not like to have to agree to licenses for files
they're not actually using, so we are keeping these files separate from
the main blobs repository and adding an extra Kconfig to make sure the
user is aware of and must explicitly agree to this before downloading
these files.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I247746c1b633343064c9f32ef1556000475d6c4a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-06-30 08:57:03 +00:00
Felix Held 277e11b390 3rdparty/blobs: advance submodule pointer
Changes in 3rdparty/blobs:
* Update of the OCP Tiogapass Flash descriptor binary
* Move binary policy as README.md
* Markdownify README.md
* Add APCB binary for AMD Mandolin

Change-Id: I0c45969626f30dca42bba1f137e85ec0999fc671
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42544
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-06-19 21:21:51 +00:00
Felix Held 4824d747fc 3rdparty/amd_blobs: advance submodule pointer
This pulls in a newer version of the PSP-related blobs.

Change-Id: I6ff39260e9697512f78eb68435bd17ea83af35d5
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42346
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-06-15 00:04:04 +00:00
Raul E Rangel 8288555ead 3rdparty/amd_blobs: Update to include APCB_magic.bin
BUG=b:157140753
TEST=Built zork/trembyle and boot to OS.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I30a27a149ee7f368f45fdf5d4a081127f15e7629
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-05-27 15:59:45 +00:00
Jan Dabros 0cbe320ac8 submodules: Add new submodule 3rdparty/cmocka
Cmocka unit testing framework is used for writing and building coreboot
unit tests. This repo will be checked-in only when building some test
targets.

Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: I3cdfd32f5bba795d5834ebeae1afff0f7006a0d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41652
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-05-26 16:20:49 +00:00
Furquan Shaikh a54bfd5e95 Update vboot submodule to upstream master (commit hash c531000)
This change updates vboot submodule from commit hash 3aab301:
vboot: Convert reboot-related errors to vboot2-style

to commit hash c531000:
vboot: Add recovery reason code for CSE Lite SKU errors

Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: Ifbf5a09e6602c3f6833e6e8fbbd3cee3f60f1b47
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41536
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-05-26 15:07:52 +00:00
Felix Held 8a4536dfb7 3rdparty/amd_blobs: update submodule pointer
Change-Id: I468f0d3ab018ee0044e8de7df829c64940c7df2b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-05-22 22:50:51 +00:00
Matt DeVillier bba5bfc7d2 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit submodule pointer to pull in handling for
presence straps bypass and some minor cleanup.

Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Change-Id: Id4a903383f32f352aa3595bd72bc5f6f0777171c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-05-20 23:37:31 +00:00
Bill XIE 02043c995b 3rdparty/libgfxinit: Update submodule pointer, again
6b95507ec5 has mistakenly reverted
the submodule pointer of 3rdparty/libgfxinit to cdbfce27, canceling
c844d14ca5.

This commit sets it back, recovering c844d14c.

Change-Id: Ib594e40a39ea83dd2238becb287f2516e7c54046
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41400
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-18 07:37:09 +00:00
Marshall Dawson 3e30c1284f 3rdparty/amd_blobs: Update with Picasso images
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Ie886815ed354762ea52fd6a76169cf25576f8852
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2020-05-17 21:06:52 +00:00
Bill XIE 6b95507ec5 mainboard/lenovo/x230: Add ThinkPad x230s as a variant
The code is based on autoport and that for X230. Major differences are:
    - Only one DDR3 slot
    - HM77 PCH
    - M.2 socket instead of mini pci-e
    - no docking
    - no tpm

Tested:
    - CPU i5-3337U
    - Slotted DIMM 8GiB
    - Camera
    - pci-e and usb2 on M.2 slot with A key for wlan
    - sata and usb2  (no superspeed components) on M.2 slot with B key for wwan
    - On board SDHCI connected to pci-e
    - USB3 ports
    - libgfxinit-based graphic init
    - NVRAM options for North and South bridges
    - Sound
    - Thinkpad EC
    - S3
    - Linux 4.9 within Debian GNU/Linux stable, loaded from
      Seabios.

Untested:
    - Touch screen, which is said to work under ubuntu but not debian.

Change-Id: Ie537645d5ffaee799e79af2f821f80c3ebd2dfec
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-05-13 12:10:38 +00:00
Matt DeVillier c844d14ca5 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit submodule pointer to pull in workaround for VT-d.

Change-Id: I09f811bdb917365f4e97b7ab385781337d4c9cf7
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41181
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11 09:27:41 +00:00
Yu-Ping Wu a4f8e40663 Update vboot submodule to upstream master
Updating from commit id 55154620:
  vboot: Add screens for recovery using disk

to commit id 3aab3014:
  vboot: Convert reboot-related errors to vboot2-style

This brings in 3 new commits.

Change-Id: I75be535e0b0f8080366b98e5ae2007452ad51738
Signed-off-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40845
Reviewed-by: Joel Kitching <kitching@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-01 06:27:49 +00:00
Felix Singer d1e0a466d3 3rdparty/intel-microcode: Update submodule pointer to 20191115 release
Update submodule pointer to 20191115 release to include the microcode
update for CML-U62, and others.

Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: I4765a70be0b1182acd340a3c31a5d71fd0ab500f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-28 14:39:27 +00:00
Daisuke Nojiri 16a29e53ff Update vboot submodule to upstream master
Updating from commit id 46ff62c3:
  vboot: stop reading from ACPI for wpsw_boot

to commit id 55154620:
  vboot: Add screens for recovery using disk

This brings in 37 new commits.

Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ie184cbe6cc18cea540966d5801472ae821ea3e86
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40503
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-23 01:20:49 +00:00
Duncan Laurie c68902c210 Update vboot submodule pointer
Update the pointer for vboot_reference so it can be used to compile
depthcharge payload on the master branch.

Change-Id: I5fc6e05896d7221a1e48ca86c6b15081488302b5
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2020-04-14 09:47:56 +00:00