Commit Graph

12 Commits

Author SHA1 Message Date
Stefan Reinauer 76c6c95c1e fix Config-abuild.lb for all targets that need a failover image and
don't have one (by fixing it for amd/serengeti_cheetah and copying the
same file to all other broken targets)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3763 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-20 20:07:38 +00:00
Myles Watson e3e4981813 Trivial payload location changes for buildrom.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-23 22:01:55 +00:00
Myles Watson e4c98d2899 These config files are so that buildrom can use these two boards.
Myles

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ward Vandewege <ward@gnu.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3257 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-23 21:06:08 +00:00
Stefan Reinauer f8ee1806ac Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18 15:08:58 +00:00
Yinghai Lu 6d74d76de4 get_bus_cong using sysconf instead
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 23:57:49 +00:00
Stefan Reinauer 42fb3164ed Uwe Hermann:
Here's a patch which makes all "option ROM_SIZE" lines use x*y format
which is a lot easier to read and modify, without having to use your
brain or a calculator ;-)

Tested with abuild, no errors.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:42:51 +00:00
Yinghai Lu 9a791dffea new cache_as_ram support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03 20:38:34 +00:00
Ronald G. Minnich 2bb216a880 adding preliminary, and almost certainly wrong, rumba support.
This is just a skeleton, basically, and will most likely not even 
compile yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-27 23:46:30 +00:00
Stefan Reinauer 12142ada40 1201_ht_bus0_dev0_fidvid_mb.diff - part 3
issue 41 - fix up motherboard compilation

target configuration files. Who wants to do some major cleanup here some
time? The fixed/relative paths in payloads are nasty.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2122 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-02 23:26:13 +00:00
Yinghai Lu 13f1c2af8b eric patch
1. x86_setup_mtrr take address bit.
        2. generic ht, pcix, pcie beidge...
        3. scan bus and reset_bus
        4. ht read ctrl to decide if the ht chain
           is ready
        5. Intel e7520 and e7525 support
        6. new ich5r support
        7. intel sb 6300 support.

yhlu patch
	1. split x86_setup_mtrrs to fixed and var
	2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
	3. in_conherent.c K8_SCAN_PCI_BUS


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08 02:49:49 +00:00
arch import user (historical) ef03afa405 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34
Creator:  Yinghai Lu <yhlu@tyan.com>

AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:15:30 +00:00
arch import user (historical) 98d0d30f6b Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-30
Creator:  Yinghai Lu <yhlu@tyan.com>

Nvidia Ck804 support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:13:46 +00:00