Commit Graph

3197 Commits

Author SHA1 Message Date
Rudolf Marek 9e9fa825fd To make use of HAVE_HIGH_TABLES following patch is needed. Also, it moves
coreboot to 1MB and tries to cache whole range for XIP. The UMA part colide a
bit with the HAVE_HIGH_TABLES region. I solved that by relocation of the region.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-21 11:50:20 +00:00
Myles Watson 2a63ea580a Kevin O'Connor said:
The bug is in src/arch/i386/boot/boot.c.  The inline assembly in
  jmp_to_elf_entry uses the "g" flag to pass in parameters.  However,
  "g" allows gcc to use stack relative addressing of parameters.

  Easiest fix would be to change "g" to "ri" - put the parameter either
  in a register or as an immediate value.

That's what this patch does.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-20 18:29:49 +00:00
Marc Jones 5dd4a20b96 Add Supermicro h8dm3 mainboard. This is mostly a copy from the h8dmr.
The one issues is the SPD address switch for the second CPU. That means that
the memory must be an exact match on each CPU.

Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-20 16:36:05 +00:00
Marc Jones 2f4979f347 Fix CPUID typo. This caused fid to memory speed calculations to be off.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4021 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-20 16:03:37 +00:00
Carl-Daniel Hailfinger 5182f67590 Move the Atmel AT45 comments about block and page sizes from the end of
the struct to the individual struct members to improve readability.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-19 12:18:13 +00:00
Stefan Reinauer d0db8f904d fix the following warning on all boards that don't have PIRQ_ROUTE enabled
In file included from coreboot-v2-4017//src/arch/i386/boot/pirq_routing.c:2:
coreboot-v2-4017/src/arch/i386/include/arch/pirq_routing.h:45:5: warning: "PIRQ_ROUTE" is not defined
coreboot-v2-4017//src/arch/i386/boot/pirq_routing.c:103:6: warning: "PIRQ_ROUTE" is not defined

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-19 01:30:16 +00:00
Stefan Reinauer c675955f05 fix totalimpact briq compilation. the target had a cpu specific and a mainboard
specific clock.c. Since no other target uses the same cpu, I commented out the
CPU's clock.c. 

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4018 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-19 01:13:01 +00:00
Pattrick Hueper 1233054fbe add YABEL flag to options to decide wether access to devices other than the one yabel is running for is possible
Signed-off-by: Pattrick Hueper <phueper@hueper.net>
Tested and Acked-by: Joseph Smith <joe@settoplinux.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-18 16:25:34 +00:00
Stefan Reinauer 5f7d506ae7 Add high coreboot table support to libpayload
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17 16:41:01 +00:00
Stefan Reinauer 927377febe Add support for high coreboot table to mkelfimage
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4015 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17 15:33:41 +00:00
Stefan Reinauer b743885b43 Don't know if this is the correct fix, but it fixes compilation of the PPC
targets.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17 15:15:15 +00:00
Stefan Reinauer 764fe40f09 This patch adds "high coreboot table support" to coreboot version 2.
Some bootloaders seem to overwrite memory starting at 0x600, thus destroying
the coreboot table integrity, rendering the table useless.

By moving the table to the high tables area (if it's activated), this problem
is fixed.

In order to move the table, a 40 bytes mini coreboot table with a single sub
table is placed at 0x500/0x530 that points to the real coreboot table. This is
comparable to the ACPI RSDT or the MP floating table.

This patch also adds "table forward" support to flashrom and nvramtool.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17 14:39:36 +00:00
Stefan Reinauer 3f72e32b06 This patch adds "high coreboot table support" to coreboot version 2.
Some bootloaders seem to overwrite memory starting at 0x600, thus destroying
the coreboot table integrity, rendering the table useless.

By moving the table to the high tables area (if it's activated), this problem
is fixed.

In order to move the table, a 40 bytes mini coreboot table with a single sub
table is placed at 0x500/0x530 that points to the real coreboot table. This is
comparable to the ACPI RSDT or the MP floating table.

This patch also adds "table forward" support to flashrom and nvramtool.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17 14:39:25 +00:00
Stefan Reinauer efab4ba3bb This patch adds "high coreboot table support" to coreboot version 2.
Some bootloaders seem to overwrite memory starting at 0x600, thus destroying
the coreboot table integrity, rendering the table useless.

By moving the table to the high tables area (if it's activated), this problem
is fixed.

In order to move the table, a 40 bytes mini coreboot table with a single sub
table is placed at 0x500/0x530 that points to the real coreboot table. This is
comparable to the ACPI RSDT or the MP floating table.

This patch also adds "table forward" support to flashrom and nvramtool.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17 14:38:48 +00:00
Carl-Daniel Hailfinger 5d6645ae44 - TOM2 is filled in by the dynamic ACPI code. Don't hardcode it in the
DSDT and use the dynamic TOM2 variable instead.
- The DSDT needs to be revision 2 or above to handle 64 bit variables.
  This will require a recent (not older than 2007) iasl (ACPI compiler).
- Fix an incorrect comment.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17 01:47:25 +00:00
stepan 4d01bd5809 drop empty directory. (trivial)
Signed-off-by: <stepan@coresystems.de>
Acked-by: <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-16 17:28:07 +00:00
Stefan Reinauer ec75a57e36 fix typo in pci_device.c (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-16 15:27:00 +00:00
Stefan Reinauer 6d07c932bb Fix all build problems on PPC except the _SDA_BASE issues caused by the
code expecting too old binutils(?).

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-15 10:04:41 +00:00
Stefan Reinauer 8f556be766 abuild: Don't forget CROSS_COMPILE anymore.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-15 09:55:17 +00:00
Stefan Reinauer 2f110a8006 trivial patch for abuild: allow powerpc-elf-gcc, too.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-14 16:33:22 +00:00
Pattrick Hueper 2075dbea45 add YABEL Debug Flags to Options
Signed-off-by: Pattrick Hueper <phueper@hueper.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-14 15:43:42 +00:00
Stefan Reinauer 84a1f4e261 this commit should fix Ticket #122 (proper log files for all builds)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4003 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-13 17:22:53 +00:00
Myles Watson cb2de6869c This patch reverts SuperIO changes that I was too hasty with. Even though the
address of the RTC is 0x70, you need to write 0x400 to it.  Now the dump from
superiotool matches the factory except 0xf0 of the keyboard.  When you boot with
the factory BIOS that is 0x04, but with coreboot it is not set.

It's trivial because it is reverts.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-13 17:20:59 +00:00
Stefan Reinauer 65e9bc13f0 This one is an example on how to drop vgabios.c from the mainboard or chipset
directories and use the global (v3) one in util/x86emu instead. It also fixes
the breakage introduced by 4000

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4001 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-13 17:00:46 +00:00
Stefan Reinauer be7f79867e This, ladies and gentlement, is commit #4000.
Use the (almost) same strict CFLAGS in v2 that we use on v3. And fix a few
include files and missing prototypes. Also, fix up the Config-abuild.lb files
to properly work for cross compiling.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-13 15:42:27 +00:00
Stefan Reinauer cc46e73a02 ACPI implementation for i945, ICH7, Kontron 986LCD-M
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-13 00:44:09 +00:00
Myles Watson 47e42e5ebb Fix HIGH_TABLES introduced error when compiling without MP table
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-12 17:42:20 +00:00
Stefan Reinauer 30140a59f7 i945 northbridge update
- lots of PCIe updates
- various bug fixes to early init
- some fixes for typos and warnings
- initial support for PCIe x16
- some minor fixes to memory init code
- some subsystem vendor id patches, to be consistent with ICH7

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 16:20:39 +00:00
Patrick Georgi d229677b61 20090310-3-scanbuild:
Add support for clang's scan-build utility to abuild. scan-build wraps
the compiler and runs its own compiler on the same sources to do some
static analysis on them. It adds an option "-sb" or "--scan-build" that
creates a coreboot-builds/$target-scanbuild directory for every $target,
containing the output of scan-build, which is a HTML documentation on
its results.
Be aware, that scanbuild significantly increases build time: A board
that takes 6-7 seconds normally requires 60 seconds with that option
enabled on my test system.
The patch also moves the stack-protector option down a bit, so it
applies to crosscompiled targets, too (which overwrote the compiler
settings before)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:43:02 +00:00
Patrick Georgi 118c1005ed 20090310-2-gcc-for-real:
Create a variable "GCC", which defaults to the content of CC, but allows
the user to provide a gcc to use in this instance, even when normally a
different tool is chosen. That helps with scan-build (see next patch),
and might help with distcc, ccache etc, too.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3995 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:36:39 +00:00
Patrick Georgi 25399346b3 20090310-1-paths:
The rules changed in this patch originally wanted to write c_start.o
into the source tree. That triggered a bug in my other work, and is
generally not what we want.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:35:22 +00:00
Stefan Reinauer e1025d0f7f Kontron 986LCD-M updates:
* ACPI updates: MCFG, HPET, FADT
* some mptable fixes for certain riser cards
* Use Channel XOR randomization
* Fix SuperIO HWM setup
* Enable all three network adapters

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:20:36 +00:00
Stefan Reinauer cc44b06d9d abuild:
- add configure only mode to easily and quickly check Config.lb and Option.lb
  files
- fix up cross compiler handling
- don't use in-place sed, not all sed versions can do it
- use perl instead of date to avoid non-gnu date trouble

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:00:50 +00:00
Stefan Reinauer a8e1168064 This patch contains some significant updates to the i82801gx component and will
be required for a series of later patches. Roughly it contains:

* fixed SMBus driver (was not compiled in before)
* fixed S-ATA/P-ATA combination
* Added warnings to drivers being called with a NULL dev->chip_info 
* Set subsystem ids for those boards that have none specified in Options.lb
* Fix license headers. The code was originally released under GPL v2 but
  some files sneaked in with a v2 or later header.
* some attempts to fix azalia/Intel HDA.. not working yet
* clean up and fix pci bridge handling code
* Add Config based GPI handling to LPC driver
* Add HPET enable function
* Enable clock gating where appropriate
* first attempt at USB debug console support (not working yet)
* Add required options to kontron board
* many other minor changes

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 14:54:18 +00:00
Stefan Reinauer 6df0c62b68 Add support for the LPC47M182 to superiotool
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 14:48:20 +00:00
Myles Watson 34b1d4ef37 This patch adds ACPI support for Tyan s2891, s2892, and s2895. There is still
a problem with IRQ 9, but besides that Linux is happy.  BSOD in Windows still.

changes by file:

src/mainboard/tyan/s289X/Options.lb:
	Add options and defaults for ACPI tables and resources.

src/mainboard/tyan/s289X/mainboard.c:
	Add high_tables resource ala Stefan's code for the Kontron.

src/mainboard/tyan/s289X/acpi_tables.c:
	Fill out the ACPI tables, using existing code where possible.
	Only the madt is different between the boards, to be combined later.

src/mainboard/tyan/s289X/Config.lb:
	Compile in acpi_tables.c and dsdt.dsl.
	Turn on the parallel port and the real-time-clock.

src/mainboard/tyan/s289x/dsdt.dsl:
	The board layout (thanks Rudolf) and interrupts from mptable.c

src/mainboard/tyan/s289x/mptable.c:
	Minor formatting changes to make them diff better.

src/superio/smsc/lpc47b397/superio.c:
	Correct the size of the real-time-clock so it can be where it belongs.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Rudolf Marek <r.marek@assembler.cz>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-10 20:56:54 +00:00
Myles Watson 283a494521 This patch adds common elements for ck804-based boards.
changes by file:
src/northbridge/amd/amdk8/northbridge.c:
	Add high tables code ala Stefan's code for the i945.

src/southbridge/nvidia/ck804/ck804_lpc.c:
	Enable High Precision Event Timers.
	Add pm_base for ACPI.

src/southbridge/nvidia/ck804/ck804_fadt.c:
	Since fadt is only dependent on the Southbridge, add it here.

src/southbridge/nvidia/ck804/Config.lb:
	Compile in ck804_fadt.c

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-10 20:39:27 +00:00
Myles Watson 210b83e764 This patch adds empty acpi_fill_slit functions so they build again.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-10 18:44:34 +00:00
Myles Watson 0b4c9f08c7 This patch makes the boards use a single amdk8_util.asl. There are only
whitespace differences between this file and the amdk8_util.asl from
asus/m2v_mxe.

It also enables SLIT filling if you have one, zeroes the unused fields in the
srat_lapic structure, and adds some declarations in acpi.h.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Rudolf Marek <r.marek@assembler.cz>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-10 18:06:47 +00:00
Marc Jones 8f210766d5 Add some basic K8 MSRs.
Fix bash script type.
Removed const return type on msraddrbyname() to fix gcc warning/error.

Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-08 04:37:39 +00:00
Carl-Daniel Hailfinger 3b1a955cce FreeBSD definitions of (read|write)[bwl] collide with our own. Before we
attempt trickery, we can simply rename the accessor functions.

Patch created with the help of Coccinelle.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 22:26:00 +00:00
Stefan Reinauer 45cc550c3a Some updates for core/core duo/core2/core2 duo cpus.
The microcode is from Intel's Linux microcode file, so it's unproblematic.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 19:54:15 +00:00
Stefan Reinauer 3b387458b5 * fix a minor power state issue in the ich7 smm handler
* move mainboard dependent code into a mainboard SMI handler.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 19:52:36 +00:00
Stefan Reinauer 43b29cf891 Fix mmconf (PCIe memory mapped config space access) support in v2. It was
horribly broken and thus never used by any platform. This needs to get
straightened out so current chipsets drivers can use the full feature set.

Create wrapper functions similar to the io pci config space ones.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3981 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 19:11:52 +00:00
Stefan Reinauer ae762b5d3b use include file for i8259 where appropriate (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 18:39:54 +00:00
Stefan Reinauer 1894463787 clean up qemu target config (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 18:38:28 +00:00
Stefan Reinauer 0d348f919c fix strstr. Seems the function never worked before, except the searched
substring is at the end.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3978 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 17:43:20 +00:00
Stefan Reinauer 8dcd50b155 fix a bunch of cast and type warnings and don't call the apic "nvram", that
doesn't make no sense. (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 17:24:29 +00:00
Stefan Reinauer 054c7235c3 use pointers instead of size_t when dealing with pointers. Also fix a few
warnings (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3976 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 17:22:35 +00:00
Stefan Reinauer f8c77e82c5 use inb instead of outb for delays in usb debug code (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 17:21:23 +00:00