Commit graph

452 commits

Author SHA1 Message Date
Vadim Bendebury
b1709bd0b2 Provide ability to integrate with QComm SBLs
Ipq8064 SBLs initialize the hardware to prepare it to run an arbitrary
user provided bootloader. The only bootloader requirements imposed by
the SBLs are that it is concatenated with the SBL chunks in the
bootprm AND it uses MBN encapsulation (mostly to specify the size and
load address).

This patch adds configuration options to specify the location of the
SBL blobs and to require MBN encapsulation of the bootblock.

BRANCH=none
BUG=chrome-os-partner:27784
TEST=manual

  - the below demonstrates added encapsulation, no code run attempts
    have been made yet:

    $ FEATURES=noclean emerge-storm coreboot
    $ cd /build/storm/tmp/portage/sys-boot/coreboot-9999/work/coreboot-9999
    $ \od -t x4 build/cbfs/fallback/bootblock.bin | head -3
    0000000 00000005 00000003 00000000 2a010000
    0000020 00000be0 00000be0 2a010be0 00000000
    0000040 2a010be0 00000000 e32bf0df e59f0030

Original-Change-Id: Iae30ad08059e2b35c434ac25a410ac2017752957
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/193511
(cherry picked from commit bf16ea915c723ab124d817e3b0d950282e3cf1c1)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I53c71d382ec1d826f530d7afb545f64ec4eaf96b
Reviewed-on: http://review.coreboot.org/7261
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-11-09 02:00:46 +01:00
Furquan Shaikh
7657057892 soc/qualcomm: Add generic support skeleton for ipq806x
Skeleton for soc ipq806x

Old-Change-Id: I92a8d592d762f59665e15d1a7fc6cc73dc74c296
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/190723
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit e71d45733d86e77717fd2f592ef06113246db911)

soc/ipq806x: Disable LPAE mode.

LPAE (large physical address extension) is not available on this SOC
core, do not enable it.

Old-Change-Id: I9e9ad1aeaf613f04987c0c306a574085042d0e7b
Signed-off-by: Deepa Dinamani <deepad@codeaurora.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198023
Reviewed-by: deepa dinamani <deepad@quicinc.com>
(cherry picked from commit e6e12c39efd54e4fcbd444134bf30e211948a71b)

Squashed 2 commits for the Qualcomm ipq806x SOC.

Change-Id: I14521d3b2844ddd68112882de81453ce8d19fc16
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6963
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
2014-09-25 19:05:46 +02:00