Commit Graph

528 Commits

Author SHA1 Message Date
Julius Werner cefe89ee79 lib/fmap: Add optional pre-RAM cache
This patch adds an optional pre-RAM cache for the FMAP which most
platforms should be able to use, complementing the recently added
post-RAM FMAP cache in CBMEM. vboot systems currently read the FMAP
about half a dozen times from flash in verstage, which will all be
coalesced into a single read with this patch. It will also help
future vboot improvements since when FMAP reads become "free" vboot
doesn't need to keep track of so much information separately.

In order to make sure we have a single, well-defined point where the new
cache is first initialized, eliminate the build-time hardcoding of the
CBFS section offsets, so that all CBFS accesses explicitly read the
FMAP.

Add FMAP_CACHEs to all platforms that can afford it (other than the
RISC-V things where I have no idea how they work), trying to take the
space from things that look like they were oversized anyway (pre-RAM
consoles and CBFS caches).

Change-Id: I2820436776ef620bdc4481b5cd4b6957764248ea
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36657
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Joel Kitching <kitching@google.com>
2019-11-14 03:30:11 +00:00
Philipp Deppenwiese 7ba58718de util/cbfstool: Add optional argument ibb
* Mark files in CBFS as IBB (Initial BootBlock)
* Will be used to identify the IBB by any TEE

Change-Id: Idb4857c894b9ee1edc464c0a1216cdda29937bbd
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29744
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-10-18 15:37:37 +00:00
Jacob Garber 5fa756cc97 util/cbfstool: Remove unused assignment
This variable is overwritten on one branch of the next if statement, and
the other branch returns, so this assignment does nothing.

Change-Id: I63737929d47c882bbcf637182bc8bf73c19daa9f
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: scan-build 8.0.0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-08-20 15:20:30 +00:00
Jacob Garber 3a82e9b8a3 util/cbfstool/flashmap: Fix memory leaks on failure
Fix several memory leaks on failed printing or tests. These don't matter
much, but it keeps Coverity happy.

Change-Id: Ie750acb50ae1590c3aea533338a8827c03459c1a
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 130245{1,2,3}
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34412
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-07-21 18:54:43 +00:00
Jacob Garber 2e31ea05bb util/cbfstool: Close file on error
Prevents a resource leak.

Change-Id: I032227228c8e37e989960ad6292ded39b81835a9
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1383919
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-10 18:21:00 +00:00
Jacob Garber 2d58bf6a03 util/cbfstool: Prevent overflow of 16 bit multiplications
Considering the following integer multiplication:

    u64 = u16 * u16

What on earth, one might wonder, is the problem with this? Well, due to
C's unfortunately abstruse integer semantics, both u16's are implicitly
converted to int before the multiplication, which cannot hold
all possible values of a u16 * u16. Even worse, after overflow the
intermediate result will be a negative number, which during the
conversion to a u64 will be sign-extended to a huge integer. Not good.

The solution is to manually cast one of the u16 to a u32 or u64, which
are large enough to not have any overflow and will prevent the implicit
conversion. The type of the u64 is preferred, though a u32 is used
instead of size_t, since that can change depending on the platform.

Change-Id: I5391221d46d620d0e5bd629e2f9680be7a53342e
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 12297{03,04,05,06,07,08,09,10}
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-07-07 20:59:04 +00:00
Marshall Dawson 30cf155168 util/cbfstool: Add AMD BIOS compression tool for PSP
Add a utility to generate a compressed BIOS image for AMD Family 17h.

If the input is an elf file, the utility extracts the program portion
for compression.  Otherwise the file is compressed as-is.

In modern AMD systems, the PSP brings up DRAM then uncompresses the
BIOS image into memory prior to x86 beginning execution.  The PSP
supports a zlib engine, and interprets the first 256 bytes as a
header, where offset 0x14 containing the uncompressed size.  For
further details, see AMD Platform Security Processor BIOS Architecture
Design Guide for AMD Family 17h Processors (NDA only, #55758).

BUG=b:127766506
TEST=Use with WIP Picasso

Change-Id: Id1c54e0a6dae9e4a0362c6635fe8b8aa48a369d8
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2019-07-03 21:28:43 +00:00
Patrick Georgi 848e30daa1 cbfstool: show "preserved" flag in cbfstool layout output
The flag is useful for updaters to determine which areas to leave
alone, such as VPD (vital product data) regions that are set in
factory and might contain unique (MAC addresses) or hard to obtain
(calibration output) data.

It's also useful to see which regions are marked as such.

Change-Id: Ic0a229d474b32ac156cfabc917714ce9d339bac6
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-02 18:48:02 +00:00
Pandya, Varshit B 36cc664bc7 util/cbfstool/ifittool: use strtol function instead of atoi
Fix error "Invalid option -A" by adding "A" to options list.

Also, atoi does not parse hex string, for instance 0x200 is interpreted as 0,
and this causes a failure when updating second FIT table using -j option.
Use strtol instead of atoi

BUG=none
BRANCH=none
TEST=Build and boot hatch after enabling dual bootblock feature.

Change-Id: Ib227437f88ffcccda1ce2f20a9ab098e5aa091c7
Signed-off-by: Pandya, Varshit B <varshit.b.pandya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33937
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2019-07-01 13:44:48 +00:00
Joel Kitching b4a1981289 cbfstool/fit: need inttypes.h for PRIx64
This is causing coreboot build in Chromium OS to fail.

BUG=None
TEST=emerge-eve coreboot
BRANCH=none

Change-Id: I4faa140b3046651b4ed0a9aeefe437048c6ef0da
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33780
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-06-26 09:19:00 +00:00
Elyes HAOUAS 741000d31b util/cbfstool/flashmap: Correct local includes
Change-Id: I78ba7afd2085c7e9c93e892470111bfee154bb04
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33733
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-06-24 10:52:53 +00:00
Patrick Rudolph 9ab80a33a5 cbfstool: Drop update-fit option
The ifittool is used instead. Drop old code.

Change-Id: I70fec5fef9ffd1ba3049badb398783f31aefb02f
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-06-24 09:45:00 +00:00
Philipp Deppenwiese 5ada0023d1 cbfstool: Add ifittool
Add the IntelFirmwareInterfaceTable-tool to modify the FIT.
As cbfstool is overloaded with arguments, introduce a new tool
to only modify FIT, which brings it's own command line syntax.

Provide clean interface to:
* Clear FIT
* Add entry to CBFS file
* Add entry to REGION
* Delete entries
* Add support for types other than 1
* Add support to dump current table
* Add support for top-swap
* Sort entries by type

Most code is reused from existing cbfstool and functionality of cbfstool
is kept. It will be removed once the make system uses only ifittool.

Based on "Intel Trusted Execution Technology (Intel TXT) LAB Handout"
and https://github.com/slimbootloader/slimbootloader .

Change-Id: I0fe8cd70611d58823aca1147d5b830722ed72bd5
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31493
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-06-24 09:42:31 +00:00
Joel Kitching 2eb89c8b14 vboot: include vb2_sha.h when required
Should include vb2_sha.h header when SHA library functions or
constants are required.  This replaces NEED_VB2_SHA_LIBRARY.

BUG=b:124141368, chromium:956474
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: I9f32174dbf3de05fbe5279cb8017888757abf368
Signed-off-by: Joel Kitching <kitching@google.com>
Cq-Depend: chromium:1583820
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32454
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-05-09 06:32:44 +00:00
Patrick Rudolph e28fa4049d cbfstool: Fix cbfs_file_next_attr
The last attribute was never returned.
Fix size compare to retrieve all attributes.

Manually tested and seen all attributes, including the last one.

Change-Id: I08df073158a0f285f96048c92aa8066fa4f57e6f
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-04-23 10:23:56 +00:00
Thejaswani Putta 6f5225c7e0 Klocwork: Fix the Null pointer derefernce found by klocwork
Signed-off-by: Thejaswani Putta <thejaswani.putta@intel.com>
Change-Id: I15973ac28e9645826986cf63d2160eedb83024e4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32290
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-04-23 09:56:37 +00:00
Hung-Te Lin 0043a3db20 Documentation: Explain FMAP and FMD
The Flashmap (FMAP) was not clearly documented. The new flashmap.md
explains where to find more details about that and how / why it was used
in coreboot. Also explained what is FMD and how to use it (based on
original README.fmaptool).

BUG=None
TEST=None (only documentation)

Change-Id: Ia389e56c632096d7c905ed221fd4f140dec382e6
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31766
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-04-11 11:24:32 +00:00
Hung-Te Lin 49a4450563 cbfstool: Support new FMD flag "PRESERVE"
When updating firmware, it is very often that we may want to preserve
few sections, for example vital product data (VPD) including serial
number, calibration data and cache. A firmware updater has to hard-code
the section names that need to be preserved and is hard to maintain.

A better approach is to specify that in FMAP area flags (the `area_flag`
field) using FMAP_AREA_PRESERVE. With this patchset, a FMD parser flag
"PRESERVE" is introduced and will be converted to FMAP_AREA_PRESERVE
when generating FMAP data (by fmap_from_fmd.c).

For example, The FMD statement:

  RO_VPD(PRESERVE)@0x0 16k

will generate an FMAP firmware section that:

  area_name = "RO_VPD"
  area_offset = 0
  area_size = 16384
  area_flags = FMAP_AREA_PRESERVE

BUG=chromium:936768
TEST=make; boots on x86 "google/eve" and arm "google/kukui" devices
     Manually added 'PRESERVE' to some FMD files, and verify (by running
     fmap.py) the output coreboot.rom has FMAP_AREA_PRESERVE set

Change-Id: I51e7d31029b98868a1cab0d26bf04a14db01b1c0
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31707
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-03-05 20:51:39 +00:00
Patrick Rudolph 44b4ec740d rmodule: Add support for R_X86_64_PLT32
The recent toolchain update also updated binutils, which has a new
relocation type, introduced with commit bd7ab16b
(x86-64: Generate branch with PLT32 relocation).

Add support for R_X86_64_PLT32, which is handled as R_X86_64_PC32.
Add comment explaining the situation.
Fixes build error on x86_64.

Change-Id: I81350d2728c20ac72cc865e7ba92319858352632
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31468
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-05 19:36:52 +00:00
Hung-Te Lin 9497fcb742 cbfstool: Change FMD annotation to flags
The idea of "annotation" for firmware sections was pretty flexible, but
in future we will want multiple attributes applied to same area. For
example, indicate the section must be preserved when updating firmware
so serial number or MAC address can be preserved.

The solution here is to extend annotation so it can take multiple
identifiers (flags) in a row. For example, to declare a 64KB COREBOOT
section as CBFS using annotation:

 COREBOOT(CBFS)@0x0 64k

If there's a new flag "PRESERVE" indicating the section must be
preserved before update, we can declare it following CBFS flag:

 COREBOOT(CBFS PRESERVE)@0x0 64k

The flags are directly parsed in fmd_parser, and stored in an union
flashmap_flags. Output modules can choose to ignore or process the
flags.

Currently the only supported flag is "CBFS" (for backward compatible
with annotation). There will be more new flags in follow up patches.

BUG=chromium:936768
TEST=make; boots on x86 "google/eve" and arm "google/kukui" devices

Change-Id: Ie2d99f570e6faff6ed3a4344d6af7526a4515fae
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31706
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-05 19:31:43 +00:00
Hung-Te Lin 4708612061 fmap: Add FMAP_AREA_PRESERVE
When updating firmware, we may need to preserve some sections like VPD,
calibration data, ... etc. The logic can be hard-coded in updater as a
list of known names, but a better solution is to have that directly
declared inside FMAP area flags.

To do that, the first step is to apply the changes in flash map
(http://crosreview.com/1493767). A new FMAP_AREA_PRESERVE is now
defined and will be set in future with new syntax in FMD parser.

BUG=chromium:936768
TEST=make; boots an x86 image.

Change-Id: Idba5c8d4a4c5d272f22be85d2054c6c0ce020b1b
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/31676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-03-04 13:25:01 +00:00
Patrick Rudolph 62b4b44961 rmodule: Don't emit reloc for R_X86_64_PC64
Relocations for PC relative instructions must not emitted.
As PC64 are unlikely with current code, it never was an issue.

Change-Id: Ife472a287ff15b1c04a516e25ff13221441fd122
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/31469
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-03 16:46:30 +00:00
Arthur Heymans 12431d6eef Makefile.inc: Create a default SMMSTORE region
Change-Id: I7b7b75050e0139ea9a0a4f2ad3c0d69a482fb38b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30421
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-02-06 18:15:59 +00:00
Arthur Heymans 0b75679cbb Makefile.inc: Optimize generating the default x86 fmap
Put the FMAP FMAP region right above the coreboot CBFS region.
The other regions like RW_MRC_CACHE and CONSOLE often have alignment
requirements so it makes sense to put those on top. This also
simplifies the code the generate the default fmap a little.

Change-Id: I24fa6c89ecf85fb9002c0357f14aa970ee51b1df
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30419
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-06 18:15:27 +00:00
Frans Hendriks e1700fc832 util/cbfstool/cbfstool.c: Fix typo
Fix typo of 'top-aligned'

BUG=N/A
TEST=Intel CherryHill CRB

Change-Id: I6dc2f150d8ec245070257384b406a570498400b2
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/30337
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-24 08:13:48 +00:00
Patrick Rudolph 21046a33ef util/cbfstool/cbfs-mkstage: Support x86_64
Add support for relocations on x86_64.
Required for 64bit romstage.

Change-Id: I1ff223d3476776297b501813a953356dd6fa9d67
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/30115
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-12-19 06:06:49 +00:00
Patrick Rudolph 565bebe0b3 util/cbfstool: Support AMD64 rmodules
Add support for 64bit rmodule, as required for relocatable
ramstage on x86_64.

Change-Id: I7fbb3b4c0f76ce82c090b5f16f67a728b6bf94a5
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/29874
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-19 06:05:52 +00:00
Werner Zeh bbf1df76a6 util/cbfstool: Fix GCC error due to a shadowed declaration
There is already a function with the name buffer_size(). Adding a local
variable with the same name will lead to the following error on older
GCC versions (e.g. version 4.4.7):

declaration of 'buffer_size' shadows a global declaration

To fix this rename the local variable to buffer_len.

Change-Id: Ifae3a17152f2f9852d29a4ac038f7e5a75a41614
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/29776
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Joel Kitching <kitching@google.com>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2018-11-23 05:08:30 +00:00
Frans Hendriks 166cbdec5b util/cbfstool/rmodule.{c,h}: Fix typo and correct header
Header contains ':' in copyright line. rmdoule is a typo
Remove the ';' and correct typo to rmodule.

BUG=N/A
TEST=N/A

Change-Id: I05b1fb80a81682646c9fba3d234de235b6bc9e8c
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/29794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2018-11-22 14:58:38 +00:00
Yegor Timoshenko c2e4941367 treewide: use /usr/bin/env where appropriate
Some Unix systems (GuixSD, NixOS) do not install programs like
Bash and Python to /usr/bin, and /usr/bin/env has to be used to
locate these instead.

Change-Id: I7546bcb881c532adc984577ecb0ee2ec4f2efe00
Signed-off-by: Yegor Timoshenko <yegortimoshenko@riseup.net>
Reviewed-on: https://review.coreboot.org/28953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-17 07:32:03 +00:00
Vadim Bendebury 98485de881 util/cbsftool: allow enabling verbose make output
Sometimes it is necessary to be able to see exact command lines used
when compiling and linking. Use the same scheme as some other
Makefile's - enable verbose output when variable V is set to 1.

TEST=tried building cbfstool with V=1, observed verbose output.

Change-Id: Iff25439aabff79e69d1d94a2c51c60bb0e0d7b80
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/29431
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-16 12:59:09 +00:00
Joel Kitching 21fdd89b0c cbfstool: add unprocessed flag for file exporting
Add an unprocessed flag (-U) which modifies how files are exported.
In the case of a compressed raw file, extract without decompressing.
In the case of a stage or payload, extract without decompressing or
converting to an ELF.

This can be useful for verifying the integrity of a stage or payload,
since converting to an ELF may not be a deterministic process on
different platforms or coreboot versions.

BUG=b:111577108
TEST=USE=cb_legacy_tianocore emerge-eve edk2 coreboot-utils chromeos-bootimage
     cd /build/eve/firmware
     /build/eve/usr/bin/cbfstool image.bin extract -r RW_LEGACY \
       -n payload -f /tmp/payload_1 -U
     START=$((16#`xxd -s 20 -l 4 -p tianocore.cbfs`))
     SIZE=$((16#`xxd -s 8 -l 4 -p tianocore.cbfs`))
     dd if=tianocore.cbfs skip=$START count=$SIZE bs=1 > /tmp/payload_2
     diff /tmp/payload_1 /tmp/payload_2
     rm /tmp/payload_1 /tmp/payload_2

Change-Id: I351d471d699daedd51adf4a860661877f25607e6
Signed-off-by: Joel Kitching <kitching@chromium.org>
Reviewed-on: https://review.coreboot.org/29616
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-11-16 09:47:35 +00:00
Richard Spiegel b59c1f4345 util/cbfstool/cbfs_image.c: Get rid of void pointer math
Pointer math with void pointers is illegal in many compilers, though it
works with GCC because it assumes size of void to be 1. Change the pointers
or add parenthesis to force a proper order that will not cause compile
errors if compiled with a different compiler, and more importantly, don't
have unsuspected side effects.

BUG=b:118484178
TEST=Build CBFS with original code, run objdump and saved output. Added
modifications, build cbfs again, run objdump again, compared objdump outputs.

Change-Id: I30187de8ea24adba41083f3bfbd24c0e363ee4b8
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/29440
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2018-11-16 09:42:00 +00:00
Joel Kitching 672d5ad20b cbfstool: make comments more consistent
Fix a typo and make comments more consistent (start with
capital letter).

BUG=None
TEST=None

Change-Id: I97bff5e05596fc6973f0729e276a2e45b291120d
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/29025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2018-10-14 19:13:14 +00:00
Nico Huber d44221f9c8 Move compiler.h to commonlib
Its spreading copies got out of sync. And as it is not a standard header
but used in commonlib code, it belongs into commonlib. While we are at
it, always include it via GCC's `-include` switch.

Some Windows and BSD quirk handling went into the util copies. We always
guard from redefinitions now to prevent further issues.

Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/28927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-10-08 16:57:27 +00:00
Daisuke Nojiri 2b59c610d0 cbfstool: Clear entry being removed in all cases
Currently, an entry being removed is cleared only if the next entry
is also null or deleted.

This patch ensures the entry being removed is cleared regardless of
the next entry type.

BUG=chromium:889716
BRANCH=none
TEST=Run cbfstool bios.bin remove -n ecrw.
Verify bios.bin has 0xFF in the space of the removed entry.
TEST=Run cbfstool bios.bin remove -n fallback/payload (located at the end).
Verify fallback/payload is removed.
TEST=Run sign_official_build.sh on recovery_image.bin. Extract
firmware contents from chromeos-firmwareupdate in the resigned image.
Run 'futility vbutil_firmware --verify' for vblock_A's and FW_MAIN_A
extracted from bios.bin. See the bug for details.

Change-Id: I62540483da6cc35d0a604ec49b2f2b7b11ba9ce5
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/28886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-10-04 17:16:41 +00:00
Elyes HAOUAS 3db0198358 util/cbfstool: Fix typos
Change-Id: I6967a106ce1286d633ddeeb041f582e65f9ea78c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28208
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-08-28 14:20:15 +00:00
Felix Held e830513def cbfstool: fix implicit declaration of strcasecmp
Change-Id: Iefeb47bca3676a1f807b7a66b74a07491e351362
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27632
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-27 10:48:17 +00:00
Tom Hiller 8ba9e8cf63 util: Add description.md to each util
Descriptions are taken from the files themselves or READMEs. Description
followed by a space with the language in marked up as code.

Change-Id: I5f91e85d1034736289aedf27de00df00db3ff19c
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/27563
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-07-26 13:26:50 +00:00
Joel Kitching 72d77a9a0c cbfstool/extract: ignore compression field for some payload segments
When extracting a payload from CBFS, ignore compression fields for
these types of payload segments:
  - PAYLOAD_SEGMENT_ENTRY
  - PAYLOAD_SEGMENT_BSS
  - PAYLOAD_SEGMENT_PARAMS

These types of payload segments cannot be compressed, and in certain
cases are being erroneously labeled as compressed, causing errors
when extracting the payload.

For an example of this problem, see creation of PAYLOAD_SEGMENT_ENTRY
segments in cbfs-mkpayload.c, where the only field that is written to
is |load_addr|.

Also, add a linebreak to an ERROR line.

BUG=https://ticket.coreboot.org/issues/170
TEST=cbfstool tianocore.cbfs extract -m x86 -n payload -f /tmp/payload -v -v

Change-Id: I8c5c40205d648799ea577ad0c5bee6ec2dd7d05f
Signed-off-by: kitching@google.com
Reviewed-on: https://review.coreboot.org/27520
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-24 20:42:37 +00:00
Patrick Georgi 71955a5b3f util/cbfstool: fix build with clang
Without the second set of braces it fails (due to -Werror) with
"suggest braces around initialization of subobject"

Change-Id: I63cb01dd26412599551ee921c3215a4aa69f4e17
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/27551
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-20 16:06:29 +00:00
Joel Kitching a302e7f46b cbfstool/add-payload: initialize segment headers to 0
Some types of payload segment headers do not use all fields.
If these unused fields are not initialized to 0, they can
cause problems in other software which consumes payloads.

For example, PAYLOAD_SEGMENT_ENTRY does not use the compression
field.  If it happens to be a non-existent compression type,
the 'cbfstool extract' command fails.

BUG=https://ticket.coreboot.org/issues/170
TEST=cbfstool tianocore.cbfs create -s 2097152 -m x86
     cbfstool tianocore.cbfs add-payload -f UEFIPAYLOAD.fd -n payload -c lzma -v
     xxd tianocore.cbfs | head  # visually inspect compression field for 0

Change-Id: I359ed117ab4154438bac7172aebf608f7a022552
Signed-off-by: kitching@google.com
Reviewed-on: https://review.coreboot.org/27540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-19 07:25:37 +00:00
Ronald G. Minnich eeb83b6b53 linux_trampoline: use trampoline RAM for the GDT
The linux trampoline was modifying the existing GDT
to add the 0x10 and 0x18 descriptors for Linux.
This will not work when the existing GDT is in ROM.

Change the code to set up a new GDT in what we know to be
RAM.

Tested by booting a linux payload. The main reason this works
is that Linux almost immediately loads its own GDT and then
segment registers. This GDT is a very temporary bridge.

Note that none of this change used to be necessary; the coreboot
GDT was originally compatible with Linux (ca 2000);
then Linux changed.

Change-Id: I13990052fbfd6a500adab8a2db8f7aead1d24fa6
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/27529
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-18 21:32:26 +00:00
Patrick Rudolph fb87e413bd cbfstool: Show current FMAP region in print
In case multiple FMAP regions are specified, print the FMAP name.
Useful if VBOOT is enabled and multiple CBFS are printed.

Change-Id: Id6f29ebeda8a9bde6dfe39362e0f2a5e33c86b26
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26862
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-13 14:34:00 +00:00
Frans Hendriks 69a835d311 util/cbfstool/compiler: __attribute redefinition
In Windows Cygwin enviroment, compiler reports
redefinition error at cbfstool/ifwitool.c
on _packed and __aligned.

Skip new defines when vales are already defined.

Change-Id: I3af3c6b8fc57eee345afcef2f871b897138f78ce
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/27357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-06 13:10:27 +00:00
Matt DeVillier 0a36c2ce15 cbfstool: fix FIT entry checksum type value for ucode entries
commit c1072f2 [cbfstool: Update FIT entries in the second bootblock]
incorrectly changed the value of type_checksum_valid for microcode
entries from FIT_TYPE_MICROCODE to 0, breaking microcode loading on
Skylake/FSP1.1 devices (and others?).  Correct this by reverting to the
previous value.

Test: build/boot google/chell, observe FspTempRamInit no longer fails,
device boots as expected.

Change-Id: Ib2a90137c7d4acf6ecd9f06cb6f856bd7e783676
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27266
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-30 15:11:25 +00:00
Rizwan Qureshi c1072f2fc7 cbfstool: Update FIT entries in the second bootblock
Once a second bootblock has been added using topswap (-j)
option, Update the entries in second FIT using -j option with
update-fit command.

Additionally add a -q option which allows to insert the address of
a FMAP region (which should hold a microcode) as the first entry in
the second FIT.

BUG=None
BRANCH=None
TEST= Create ROM images with -j options and update FIT using -q option.
example:
./build/util/cbfstool/cbfstool coreboot.tmp create \
	-M build/fmap.fmap -r COREBOOT,FW_MAIN_A,FW_MAIN_B,RW_LEGACY
build/util/cbfstool/cbfstool coreboot.tmp add \
	-f build/cbfs/fallback/bootblock.bin -n bootblock -t \
	bootblock -b -49152 -j 0x10000
build/util/cbfstool/cbfstool coreboot.tmp add-master-header -j 0x10000
build/util/cbfstool/cbfstool coreboot.tmp add -f build/cpu_microcode_blob.bin \
	-n cpu_microcode_blob.bin -t microcode -r COREBOOT -a 16
build/util/cbfstool/cbfstool coreboot.tmp. update-fit \
	-n cpu_microcode_blob.bin -x 4 -j 0x10000 -q FW_MAIN_A

Also try the failure scenarion by providing invalid topswap size.

Change-Id: I9a417031c279038903cdf1761a791f2da0fe8644
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/26836
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-26 05:59:52 +00:00
Rizwan Qureshi 1dc188fad0 cbfstool: add an option for creating a topswap bootblock
Add an option '-j' which takes the size of topswap boundary.
This option serves both as a bool and a size for creating
a second bootblock to be used with topswap feature in Intel CPUs.
'-j' is also used in conjunction with add-master-header to
update the location of cbfs master header in the second bootblock.

BUG=None
BRANHC=None
TEST=add bootblock entry to the image with -j option specifying different
topswap sizes and also use the -j option for add-master-header.

Change-Id: I3e455dc8b7f54e55f2229491695cf4218d9cfef8
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/22537
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-26 05:51:33 +00:00
Arthur Heymans 9700e91b10 cbfstool/fit.c: Fix for older CPUs without total_size in mcu_header
Some older CPUs have a fixed size of 2048 bytes for microcode total size.

Change-Id: Ia50c087af41b0df14b607ce3c3b4eabc602e8738
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27090
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-22 09:20:22 +00:00
Werner Zeh a7835c462e cbfstool: Use endian.h and functions from commonlib
The endian conversion function be32toh() is defined in
src/include/endian.h, however this file is not used for cbfstool
compilation. Currently the one provided by the host is used and if the
host does not provide this endian.h file, the build will fail.
However, we do have endian conversion functions in commonlib/endian.h
which is available for cbfstool compilation.

Switch from be32toh() to read_be32() in order to avoid relying on a
host provided include file.
We use functions from commonlib/endian.h already in cbfstool.

Change-Id: I106274cf9c69e1849f848920d96a61188f895b36
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/27116
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-18 04:25:28 +00:00