Commit Graph

3520 Commits

Author SHA1 Message Date
Paul Menzel b7b085dc65 board-status: Only store CBMEM console from last boot
Since CBMEM console became a ring buffer, logs from several boots can be
stored. We are only interested in the current boot.

>    -c | --console:                   print cbmem console
>    -1 | --oneboot:                   print cbmem console for last boot only

For CBMEM time stamps only the time stamps of the current boot are
stored, so only the commands for the CBMEM console need to be adapted.

Change-Id: I18caa4aeebbd5576b9e218d176a7db5a8e868b74
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/28531
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-17 13:53:02 +00:00
Hung-Te Lin 936dbe1d06 sconfig: Allow setting device status in device tree
For devices supporting both Linux and Windows, we may find some ACPI
devices that only need drivers in Linux and should not even be shown in
Windows Device Manager UI.

The new 'hidden' keyword in device tree 'device' statement allows
devices sharing same driver to call acpi_gen_writeSTA with different
values.

BUG=b:72200466
BRANCH=eve
TEST=Builds and boots properly on device eve

Change-Id: Iae881a294b122d3a581b456285d2992ab637fb8e
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/28566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2018-09-16 08:37:36 +00:00
Philipp Hug 2326a284ac riscv: add trampoline in MBR block to support boot mode 1
Add "j pc + 0x0800" at the beginning of the MBR to jump to bootblock.

Tested on hardware:
boot mode 15: works as before
boot mode 1: jump to bootblock works, but bootblock needs to be modified to
move the stack to L2LIM. This will be in a separate commit.

Further changes are needed in the bootblock

Change-Id: I16e762d9f027346b124412f1f7ee6ff37f431d86
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/27397
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-09-14 14:33:09 +00:00
Ronald G. Minnich 688eec1b97 lint-000-license-headers: add SPDX-License-Identifier: GPL-2.0-or-later
Change-Id: Icbf21b02d3092815bbe876eceea72ebba8dd54da
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/28599
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-09-14 08:54:28 +00:00
Angel Pons 392e886552 util/superiotool: Add Winbond W83667HG register dump
This SuperIO is supported by coreboot and used in two Asus boards. However,
superiotool was lacking a register dump for this chip. Add the corresponding
data from datasheet W83667HG-B revision 1.3 into superiotool.

The SuperIO's datasheet was obtained by requesting it to Nuvoton.

Change-Id: Ie51dc492c761d9c3d4b6100017bb730b1ae6d1e0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28099
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-13 13:30:46 +00:00
Patrick Georgi dce4d465a6 util/crossgcc: Tell gcc that it'll use gnu as and ld
Otherwise it reduces its expectations on what as and ld take in terms
of arguments, which breaks some edk2 related builds because tons of
-I$path_to_stuff arguments aren't passed along.

Change-Id: I53f87442de03d5ead8a6632d3102d5502065b828
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/28534
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-09-07 19:17:15 +00:00
Martin Roth ee0f225e3a util/lint: update whitespace checking rules
- Check payloads, the root Makefiles and toolchain.inc
- 3rdparty is already not checked, so remove
- The marks around COPYING, LICENSE, and README were not needed
- Skip checking .ico files

Change-Id: Ic4a1709224604b36362d82e249c2916fca0336a2
Signed-off-by: Martin Roth <martinr@coreboot.org>
Reviewed-on: https://review.coreboot.org/28431
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-09-04 12:38:56 +00:00
Martin Roth 8600893017 util/lint: Update whitespace linter for FreeBSD
On FreeBSD, this test was failing with the error:
"grep: Argument list too long"

I found that changing this to other forms takes MUCH longer, so I left
the original method mostly unchanged except for moving the include &
exclude lists into variables.

Currently, I'm setting all non-linux operating systems to use the second
version. I'll update that if I find other that other OSes support the
first.

Change-Id: I1c9281440d051dea8a8b3a3ddc04676ccea77c7a
Signed-off-by: Martin Roth <martinr@coreboot.org>
Reviewed-on: https://review.coreboot.org/28429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-09-04 12:38:18 +00:00
Martin Roth b7c0b8c8ee util/crossgcc: Add GCC 8.1 patch for missing backslash
When building the toolchain under BSDs, this missing backslash is
needed.

Change-Id: I40b0adaa73b241713493fd74f24c93f85e7aabbe
Signed-off-by: Martin Roth <martinr@coreboot.org>
Reviewed-on: https://review.coreboot.org/28362
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-02 03:09:46 +00:00
Evgeny Zinoviev 672f56166d util/pmh7tool: Add option to read specific bit
Change-Id: I045383eedbcf438270e9c64329a8d910bb941ab8
Signed-off-by: Evgeny Zinoviev <me@ch1p.com>
Reviewed-on: https://review.coreboot.org/28388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-08-31 19:54:43 +00:00
Martin Roth b69ae97ada util/abuild: Use env to find bash
FreeBSD doesn't have bash in /bin, so use env to find it.  This is
already done in many other scripts that are used in the actual build
path.

Change-Id: If6fb6bc3c55835e2144599fea1cdb2f7abefb0fc
Signed-off-by: Martin Roth <martinr@coreboot.org>
Reviewed-on: https://review.coreboot.org/28364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
2018-08-30 14:48:09 +00:00
Elyes HAOUAS 446e4d73cb util/ipqheader: Fix typo
Change-Id: Ibfcb870bb6e7ed747f8875520ab094def49e53cb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28329
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-08-28 14:23:09 +00:00
Elyes HAOUAS 8fda8f4ac3 util/romcc: Fix typos
Change-Id: Ia9f0f1f527476900e6c54c60508600e16bea786f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28293
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-08-28 14:22:24 +00:00
Elyes HAOUAS 3db0198358 util/cbfstool: Fix typos
Change-Id: I6967a106ce1286d633ddeeb041f582e65f9ea78c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28208
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-08-28 14:20:15 +00:00
Elyes HAOUAS 7bb53aa386 util/scripts: Fix typo
Change-Id: If906e230c0cb71fc3cd283aeb85f8d1338c303c6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28291
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-08-28 14:19:33 +00:00
Elyes HAOUAS 75db596654 util/msrtool: Fix typos
Change-Id: I36ed2c33f9bed3e640871283c2cb163d6800d1d5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-08-28 14:19:13 +00:00
Elyes HAOUAS fcd70085c2 util/nvramtool: Fix typos & remove unneeded whitespace
Change-Id: I0a704cba80d0439ae95db34a6b73df7be5b3b862
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28290
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-27 22:41:57 +00:00
Elyes HAOUAS a1ccaed126 util/ifdtool: Fix typo
Change-Id: I53ddff302681737006f40ca8b79ec0735f1e6e45
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28287
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-08-26 16:13:46 +00:00
Elyes HAOUAS 073d22b8ab util/superiotool: Fix typo
Change-Id: I62fed1084efc3224c9563619d57fbdc5040ddbbc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-08-26 16:09:58 +00:00
Evgeny Zinoviev d54f825ed1 util/pmh7tool: Add tool to dump PMH7 registers
Change-Id: I05ccb5a9a861fe44efec794aafe1805062543d53
Signed-off-by: Evgeny Zinoviev <me@ch1p.com>
Reviewed-on: https://review.coreboot.org/27776
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-08-26 14:59:15 +00:00
Stefan Tauner 289e6ce252 superiotool: fix wpcd376i
According to the datasheet (rev. 1.6) there is no SP2 (apart from
some typos) and the IR is actually implemented as SP3 in LDN 0x16.
Additionally, there is LDN 0x15 to set up CIR-specific options of the
IR serial port, which was missing as well.

Change-Id: I34d90d8c44f11a4f62ccc4b836409cc443fb7952
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/27856
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-08-26 14:58:54 +00:00
Angel Pons 58a7e397a1 util/ifdfake: Remove deprecated utility
Since ifdfake has been deprecated in favor of better alternatives, there
is no need to support it any further. Remove it from "util/", as well as
any leftover references in other files.

Change-Id: I45fe3d9fd606a61d5c3b9d0e6489a1df6d6510f0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-08-23 18:06:31 +00:00
Tom Hiller fcca617eaf util/docker/doc.coreboot.org/Dockerfile: Use alpine:3.8, Sphinx 1.7
With Alpine base, use pip to install Sphinx 1.7 and Sphinx-autobuild
Alpine, a 4.5MB base, is used over Debian Stable, 101MB, to cut down the
total size of the docker image.

Change-Id: I53f246206458b1de34cd7f3a42481b91ca285ff0
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/28211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-23 15:56:31 +00:00
Martin Roth 8f560d9b9c util/crossgcc: update IASL to v20180810
Change-Id: Idce2587a87c5e0677a4571b59ef40e5486c22da9
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-08-22 15:29:53 +00:00
Nico Huber bfae9a861a util/lint: Exclude util/superiotool from checkpatch
`superiotool` follows its own style (e.g. lot's of missing spaces
and odd placement of braces in the register descriptions).

Change-Id: Ifa33938a0fbac10577cbda10537f856f6f100233
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/28214
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-20 15:21:50 +00:00
Nico Huber 885d963391 coreboot-sdk: Add libjaylink-dev for future flashrom builds
Change-Id: I13c5464cd0b5bc9c21d7b4831a0b7fdd9fbc85c6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/28165
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-17 08:34:17 +00:00
Patrick Georgi a5ac91c256 docker/coreboot.org-status: provide html/head/body frame
This allows us to add encoding information.

Change-Id: Ic9a12a13f11fd22eeec96fbcca6b706312876b07
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/27874
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-14 21:39:48 +00:00
Bill XIE b3e15a2895 ifdtool: port the feature to set AltMeDisable/HAP bit here
Port the newest feature of me_cleaner to ifdtool
(https://github.com/corna/me_cleaner/ , Discussed in
https://github.com/corna/me_cleaner/issues/53 ) to
set AltMeDisable (or HAP for skylake/ME11) bit to the
IFD to disable ME.

In this commit I use (ifd_version >= IFD_VERSION_2) to
judge whether HAP instead AltMeDisable should be set,
since this condition is only fulfilled on skylake
or newer platforms.

This feature needs to guess ich revision, which needs
guess_ich_chipset() from flashrom to be ported here.

Routines to dump those bits are also added.

Change-Id: I9a2ecc60cfbb9ee9d96f15be3d53226cb428729a
Signed-off-by: Bill XIE <persmule@gmail.com>
Reviewed-on: https://review.coreboot.org/21437
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-14 16:05:25 +00:00
Arthur Heymans 8bd25abc05 util/autoport: Adapt logmaker for newer ACPI versions
acpidump now creates dumps with 4 spaces instead of 2 in front of the hex dump,
so be a bit smarter about the input with regexp.

Tested with X220 autoport logs: Still creates the same coreboot code.

Change-Id: I8d48c09cdff9432f394b350540ea9765fc942781
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28054
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-08-14 09:52:19 +00:00
Stefan Tauner b75a08b199 xgcc: fix grouping of conditions in buildgcc for Ada
No idea where the escaped parentheses come from but they
are no good. Without this patch I see errors with bash and dash:
  ./buildgcc: line 1198: (: command not found
  ./buildgcc: line 1199: (: command not found

The patch uses curly brackets for grouping since they don't
launch a subshell - unlike using unescaped parentheses which
would work too.
shellcheck is happy with either variant (and the original one(!)).

Change-Id: I44fbc659f5b54515e43e85680b1ab0a824b781a7
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/27771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-08-14 07:51:36 +00:00
Elyes HAOUAS eceba31c7f util/lint: Set "acknowledgement" correct
"acknowledgement" is not commonly used but correct.

Change-Id: I0aa469d77904d65288f5b7133bec10be3688a596
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-13 15:52:57 +00:00
Martin Roth 60915b3157 util/lint: update checkpatch.pl to latest linux version
Taken from Linux upstream commit ffe075132af8b7967089c361e506d4fa747efd14

Change-Id: I43d09a912fafe896c045df080c0f75fe6d908087
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/28046
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-13 12:32:15 +00:00
Martin Roth afa5ec8d5f util/lint: Update spelling.txt to latest linux version
Comment out 'sepc' and add a comment about it at the top so that it
doesn't get added back in accidentally in a future update.

Change-Id: Iaa909d97d0d97d7bf0799e48fc237a9673d549aa
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/28045
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-13 12:26:52 +00:00
Denis 'GNUtoo' Carikli 217ecd112b utils: spkmodem: suggest to use parec instead of parecord
Using recent versions of parecord produces the following:
Failed to open audio file.

According to the manual:
  -r | --record
         Capture audio data and write it to the specified file or to STDOUT if none is specified. If the
         tool is called under the name parec this is the default.

so we suggest parec instead.

Change-Id: I8b821df67b10e9d6533c4cbe19c646c84d436c27
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23863
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
2018-08-13 12:19:33 +00:00
Denis 'GNUtoo' Carikli 0005aabe2f utils: spkmodem: Add Makefile and gitignore
Change-Id: Ie3a6a777f5b667e881a4462bdd44a34dbace5520
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23862
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-13 12:19:12 +00:00
Xiang Wang c1433f77f3 util/lint: Remove register name identified as a misspelled word
RISC-V has a register named 'sepc' but checkpatch identifies it as a
misspelling of 'spec'. Remove it from the list.

Change-Id: I7b092d6f04e28fba36095c607bc59346fb5c605d
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/28005
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-08-11 15:14:43 +00:00
Stefan Tauner 27bb066b9e ifdtool: reorder output of JID dumps
Change-Id: I109f620bb644c3979ae297bdf544d295cdbac57f
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/27859
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-08-07 07:11:01 +00:00
Stefan Tauner 0d22614f46 ifdtool: fix flumap handling in chipsets prior ibex peak/5 series
The Upper Map section in the descriptor contains a database of flash
chips (VSCC Table). Its offset is located at a fixed offset from
the beginning of the image. ifdtool falsely calculates the offset
from the descriptor signature which has moved by 16 bytes with
step b of the Ibex Peak (5 series) chipset. This produces bogus
output for all chipsets older than that.

This patch corrects the behavior by calculating the offset of
flumap by adding 4096 - 256 - 4 to the start of the image.

Change-Id: I14f029fe702c129dfd8069a58fbd41113700f7ef
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/27858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-08-07 07:10:41 +00:00
Angel Pons cea8493285 southbridge/intel/bd82x6x/Kconfig: Do not include any IFD by default
Since only a handful of boards have descriptor blobs in the tree, it makes no
sense to have `HAVE_IFD_BIN` enabled by default then disabled on each mainboard.
This patch flips the default value of said variable, rendering all current
overrides unnecessary. The few boards which have an IFD in the blobs repo use
`select HAVE_IFD_BIN` to enable adding the IFD by default.

Since `HAVE_ME_BIN` depends on `HAVE_IFD_BIN`, the former has been removed
alongside the latter, and has been added to the boards with a ME blob as
`select HAVE_ME_BIN`.

Both `HAVE_IFD_BIN` and `HAVE_ME_BIN` have been removed from autoport as well.

Change-Id: I330c4886f8bea4b1a8ecad6505a0e5cc381654d1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/27218
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-08-05 19:57:56 +00:00
Arthur Heymans cc7a411fc5 util/ectool: Handle arguments more carefully
Check if an argument is given and if not print the usage.
Check if all arguments are handled by getopt and if not print the usage.

Change-Id: I40dbd2a51d018eb549e9b2fa4365b3e4f9355bff
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27778
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Evgeny Zinoviev <me@ch1p.com>
2018-08-02 21:55:27 +00:00
Arthur Heymans 8cd17eae2f util/cbmem: Handle arguments more carefully
Check if all arguments are handled by getopt and if not print the usage.

Change-Id: Iccbb65ca768a62791af54afd9b7903495bc690af
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27777
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-08-02 21:55:20 +00:00
Ronald G. Minnich ff22b6aca6 make: add clang-format prepare-commit-msg hook
To install this hook, run
make install-git-commit-clangfmt

This will install a pre-commit-msg hook that runs clang-format
on all .c and .h files that are staged.

It will add a clang-formatted-by: <git username>
line to the commit message to indicate that clang-format
was run on the files and that further processing of them
is not needed.

Change-Id: I1773f55b5b4677dad8f4bea017b6328fd93df20c
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/27779
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-01 18:03:26 +00:00
Tom Hiller 785dee005b Documentation: Add util.md summary
Add short explanation of Utility list

Change-Id: I5fc45ebe29cd42c1aa18c59dabc3ac3db3107bd7
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/27656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-07-31 13:10:51 +00:00
Martin Roth 5b7c6f52e6 abuild: Fix shellcheck errors
Fix 6 new errors found by shellcheck 0.4.6
SC2155: Declare and assign separately to avoid masking return values.
4 x SC2086: Double quote to prevent globbing and word splitting.
SC2196: egrep is non-standard and deprecated. Use grep -E instead.

One of the SC2086 errors is masked because it needs word splitting.

Change-Id: I7f869e6d208f7247f739619c538be6075b802719
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
2018-07-31 10:07:32 +00:00
Martin Roth 7a98591a1d abuild: Update failed boards handling
- Use TARGET variable for location of passing/failing boards files.
This should better handle the directory, wherever it is.
- Don't save make.log location if make.log is being deleted.

Change-Id: I28e55feef85c9b642ac5ff70ecef113cf7978707
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-31 10:07:26 +00:00
Philipp Deppenwiese fa1f6ff09e util/cbmem: Add cbmem TCPA log support
* Read and print the TCPA ACPI log.

Change-Id: Ie2253d86cfc675d45b0a728794cc784215401f4a
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/26244
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-07-28 16:58:30 +00:00
Felix Held e830513def cbfstool: fix implicit declaration of strcasecmp
Change-Id: Iefeb47bca3676a1f807b7a66b74a07491e351362
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27632
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-27 10:48:17 +00:00
Tom Hiller 8ba9e8cf63 util: Add description.md to each util
Descriptions are taken from the files themselves or READMEs. Description
followed by a space with the language in marked up as code.

Change-Id: I5f91e85d1034736289aedf27de00df00db3ff19c
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/27563
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-07-26 13:26:50 +00:00
Tom Hiller ed6d1e6dcc util: Add util_readme script
Bash script to concatenate description.md files into ./util/README.md
and Documention/Util.md

Change-Id: I015ae6816ea74cacb7f0332fda2c3ebef205c1e2
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/27564
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-26 13:26:29 +00:00
Joel Kitching 72d77a9a0c cbfstool/extract: ignore compression field for some payload segments
When extracting a payload from CBFS, ignore compression fields for
these types of payload segments:
  - PAYLOAD_SEGMENT_ENTRY
  - PAYLOAD_SEGMENT_BSS
  - PAYLOAD_SEGMENT_PARAMS

These types of payload segments cannot be compressed, and in certain
cases are being erroneously labeled as compressed, causing errors
when extracting the payload.

For an example of this problem, see creation of PAYLOAD_SEGMENT_ENTRY
segments in cbfs-mkpayload.c, where the only field that is written to
is |load_addr|.

Also, add a linebreak to an ERROR line.

BUG=https://ticket.coreboot.org/issues/170
TEST=cbfstool tianocore.cbfs extract -m x86 -n payload -f /tmp/payload -v -v

Change-Id: I8c5c40205d648799ea577ad0c5bee6ec2dd7d05f
Signed-off-by: kitching@google.com
Reviewed-on: https://review.coreboot.org/27520
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-24 20:42:37 +00:00
Martin Roth 987d42da1d util/crosgcc: Fix most shellcheck errors in buildgcc
This fixes most of the simpler shellcheck errors in shellcheck 0.4.6.

There are still a few warnings left that weren't simple to fix or
would have required more testing before I was confident in them.

Change-Id: I79ab3614cc1d69d3dfe1e0374e930313f2011cbf
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27598
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-24 09:11:48 +00:00
Martin Roth 234eabaa8d util/crosgcc/patches: update make-4.2.1 patches
- Add the Do-not-assume-glibc-glob-internals patch to fix segfaults.
- Update glob_interface_v2 patch to the patch directly from the
make git repository instead of translating it. This gives better
attributution to the original author.

Change-Id: Ibc936fc00925a4ca2170a6f5dca7c2b8d8d62f02
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-24 09:09:42 +00:00
Martin Roth 21e09b1c15 Build system: Add fixes for scanbuild
- Exclude build flags that generate warnings when scanbuild is running
- Add the SCANBUILD_ARGS variable to abuild so we can pass in arguments
to scanbuild.
- Set the default scanbuild argument to -k (--keep-going) so that even
if an error occurs it continues with the scan.  This is similar to what
we do with coverity runs.

Change-Id: I82e7c13d7fd7432b43c17a31834ec82fca158a07
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27595
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-24 09:08:55 +00:00
Martin Roth fbc87b638a util/docker: Update Makefile to improve shell access
- Create a new target, docker-jenkins-attach, to access the running
jenkins server
- Update docker-shell target to set term & size.

Change-Id: Ifa67afb62d4a216281ebece405e9b26fd4d14622
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27494
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-24 09:07:00 +00:00
Patrick Georgi 71955a5b3f util/cbfstool: fix build with clang
Without the second set of braces it fails (due to -Werror) with
"suggest braces around initialization of subobject"

Change-Id: I63cb01dd26412599551ee921c3215a4aa69f4e17
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/27551
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-20 16:06:29 +00:00
Martin Roth 4a6477ed64 util/gitconfig: Make checkpatch non fatal in pre-commit hook
We don't block commits for failing checkpatch in gerrit, and we
shouldn't block them here.  This allows checkpatch to still run, so
users can see the issues, but won't prevent the commit.

Adds a delay if checkpatch fails so that the issues can be seen.

Change-Id: Ibd4e8bb74e0b02825dcdf16e233a061c4bb43f50
Signed-off-by: Martin Roth <martin@coreboot.org>
Reviewed-on: https://review.coreboot.org/27534
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-07-19 17:46:49 +00:00
Joel Kitching a302e7f46b cbfstool/add-payload: initialize segment headers to 0
Some types of payload segment headers do not use all fields.
If these unused fields are not initialized to 0, they can
cause problems in other software which consumes payloads.

For example, PAYLOAD_SEGMENT_ENTRY does not use the compression
field.  If it happens to be a non-existent compression type,
the 'cbfstool extract' command fails.

BUG=https://ticket.coreboot.org/issues/170
TEST=cbfstool tianocore.cbfs create -s 2097152 -m x86
     cbfstool tianocore.cbfs add-payload -f UEFIPAYLOAD.fd -n payload -c lzma -v
     xxd tianocore.cbfs | head  # visually inspect compression field for 0

Change-Id: I359ed117ab4154438bac7172aebf608f7a022552
Signed-off-by: kitching@google.com
Reviewed-on: https://review.coreboot.org/27540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-19 07:25:37 +00:00
Ronald G. Minnich eeb83b6b53 linux_trampoline: use trampoline RAM for the GDT
The linux trampoline was modifying the existing GDT
to add the 0x10 and 0x18 descriptors for Linux.
This will not work when the existing GDT is in ROM.

Change the code to set up a new GDT in what we know to be
RAM.

Tested by booting a linux payload. The main reason this works
is that Linux almost immediately loads its own GDT and then
segment registers. This GDT is a very temporary bridge.

Note that none of this change used to be necessary; the coreboot
GDT was originally compatible with Linux (ca 2000);
then Linux changed.

Change-Id: I13990052fbfd6a500adab8a2db8f7aead1d24fa6
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/27529
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-18 21:32:26 +00:00
Martin Roth 6d4a060bba what-jenkins-does: Pass V=1 through to abuild
Even though we were setting V=1 in the build, this wasn't getting passed
to abuild, so the builds there didn't have additional debug information.
That made it difficult to debug issues on the builder. This sets the
verbose flag for abuild if V=1 is set.

Change-Id: Id9ec50add9693a6c36ffdb5c78d148d0fc012549
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27492
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-18 12:19:46 +00:00
Martin Roth 30b7c31547 util/docker: Update coreboot-jenkins-node dockerfile
Because earlier versions of debian set /dev as a standard tmpfs
filesystem, that was a simple place to build.  Now, this has been
changed and /dev isn't a standard tmpfs that will grow to 50% of
memory.  It's a fixed, very small size, and can no longer even be
resized.
Because of this, create a new directory to build in and add it to
/etc/fstab.  Mount it when the container is started.

As long as we're at it, make the other build directories (ccache
and slave-root/workspace) tmpfs as well. The builders we're using now
have plenty of memory, so don't write any of the files to disk.

Update the Makefile to get rid of all references to ccache directory.

Change-Id: I21fd2c4395d7ffb9428172f035991338658cd907
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27470
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-17 11:38:55 +00:00
Patrick Rudolph fb87e413bd cbfstool: Show current FMAP region in print
In case multiple FMAP regions are specified, print the FMAP name.
Useful if VBOOT is enabled and multiple CBFS are printed.

Change-Id: Id6f29ebeda8a9bde6dfe39362e0f2a5e33c86b26
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26862
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-13 14:34:00 +00:00
Patrick Rudolph 03d3142733 util/cavium: Add tool to convert devicetree blobs
Convert Cavium's BDK devicetree blob to a static C file.

The resulting file must be included in mainboard folder to provide
board specific configuration values to BDK functions.

Example call:
python devicetree_convert.py --in sff8104.dtb --out bdk_devicetree.c

Change-Id: I76a5588aefe4f680228eca46a0e4dba7e695931c
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26228
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-09 09:54:22 +00:00
Martin Roth 18c4e26ede util/lint: Update lint-stable-000-license-headers linter
- Update stable directories
- Remove duplicated directories

There are currently 220 files that still need to have headers added or
be excluded from the lint-000-license-headers test.

Change-Id: I40046a2fb7359262b130f6813eda1f2c30916b46
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26573
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-07-06 15:31:51 +00:00
Frans Hendriks 69a835d311 util/cbfstool/compiler: __attribute redefinition
In Windows Cygwin enviroment, compiler reports
redefinition error at cbfstool/ifwitool.c
on _packed and __aligned.

Skip new defines when vales are already defined.

Change-Id: I3af3c6b8fc57eee345afcef2f871b897138f78ce
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/27357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-06 13:10:27 +00:00
Matt DeVillier 0a36c2ce15 cbfstool: fix FIT entry checksum type value for ucode entries
commit c1072f2 [cbfstool: Update FIT entries in the second bootblock]
incorrectly changed the value of type_checksum_valid for microcode
entries from FIT_TYPE_MICROCODE to 0, breaking microcode loading on
Skylake/FSP1.1 devices (and others?).  Correct this by reverting to the
previous value.

Test: build/boot google/chell, observe FspTempRamInit no longer fails,
device boots as expected.

Change-Id: Ib2a90137c7d4acf6ecd9f06cb6f856bd7e783676
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27266
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-30 15:11:25 +00:00
Patrick Georgi b1d26f0e92 util/crossgcc: update to gcc 8.1.0 and binutils 2.30
Also update patches as necessary.

Change-Id: I1e8074954d5d7a4eff590abb7439e9be7d3762aa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/25997
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-28 13:38:13 +00:00
Martin Roth 11f8c9d9be crosgcc/patches: Add make patch for GLIBC glob interface v2
Copied from the GNU make repository
author	Paul Smith <psmith@gnu.org>
commit 48c8a116
configure.ac: Support GLIBC glob interface version 2

Change-Id: Id70a2b98dad6349ee56985d8dd6d4f0d87b470e6
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/26939
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-28 09:33:58 +00:00
Patrick Georgi 095db339f7 util/crossgcc: Allow building a new gcc against new binutils with -D
With -D, the newly built toolchain isn't installed into $prefix/...
but into $DESTDIR/$prefix/... while being built for $prefix alone.

This is useful for distributions, but it breaks down when the build
host already has the toolchain installed in $prefix without proper
build isolation (cf. gentoo):

In such cases libgcc etc are built using the new compiler (as gcc's
build system is smart enough to state the path explicitly), but that
compiler then uses its regular algorithm to determine the path to as,
ld, ...
That makes it use the tools from $prefix, which might differ in formats
(assembly, certain object file flags, ...): nds32le-elf in particular
has rather unstable formats still, and so new compilers can't work
with old binutils.

The approach to deal with this is to take an unused path that's
specified by gcc's build system ($out/gcc/$arch/$version) and symlink
it to the new toolchain - these explicitly given directories take
precedence over the default search path, and so the new binutils
are used.

Change-Id: Ia9a262e73f56cd486a2ae07422b598c205a03aed
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/27241
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-26 20:58:01 +00:00
Rizwan Qureshi c1072f2fc7 cbfstool: Update FIT entries in the second bootblock
Once a second bootblock has been added using topswap (-j)
option, Update the entries in second FIT using -j option with
update-fit command.

Additionally add a -q option which allows to insert the address of
a FMAP region (which should hold a microcode) as the first entry in
the second FIT.

BUG=None
BRANCH=None
TEST= Create ROM images with -j options and update FIT using -q option.
example:
./build/util/cbfstool/cbfstool coreboot.tmp create \
	-M build/fmap.fmap -r COREBOOT,FW_MAIN_A,FW_MAIN_B,RW_LEGACY
build/util/cbfstool/cbfstool coreboot.tmp add \
	-f build/cbfs/fallback/bootblock.bin -n bootblock -t \
	bootblock -b -49152 -j 0x10000
build/util/cbfstool/cbfstool coreboot.tmp add-master-header -j 0x10000
build/util/cbfstool/cbfstool coreboot.tmp add -f build/cpu_microcode_blob.bin \
	-n cpu_microcode_blob.bin -t microcode -r COREBOOT -a 16
build/util/cbfstool/cbfstool coreboot.tmp. update-fit \
	-n cpu_microcode_blob.bin -x 4 -j 0x10000 -q FW_MAIN_A

Also try the failure scenarion by providing invalid topswap size.

Change-Id: I9a417031c279038903cdf1761a791f2da0fe8644
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/26836
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-26 05:59:52 +00:00
Rizwan Qureshi 1dc188fad0 cbfstool: add an option for creating a topswap bootblock
Add an option '-j' which takes the size of topswap boundary.
This option serves both as a bool and a size for creating
a second bootblock to be used with topswap feature in Intel CPUs.
'-j' is also used in conjunction with add-master-header to
update the location of cbfs master header in the second bootblock.

BUG=None
BRANHC=None
TEST=add bootblock entry to the image with -j option specifying different
topswap sizes and also use the -j option for add-master-header.

Change-Id: I3e455dc8b7f54e55f2229491695cf4218d9cfef8
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/22537
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-26 05:51:33 +00:00
Furquan Shaikh 57ccb9c5e8 util/abuild: Enable abuild to compile a single variant
There are many boards in coreboot which support multiple
variants. When abuild is used to compile a single target, it builds
all its variants. If a target has 5 variants, then abuild takes nearly
10x the time to compile all variants of the target. This change adds
an option -b/--board-variant to enable abuild to compile only a single
variant of the target.

TEST=Verified:
1. abuild builds all variants of the target if -b option is not
provided.
2. abuild builds a single variant if -b option is provided.
3. abuild prints appropriate error message if invalid variant name is
provided.

Change-Id: I3781568c6409c5ec2610a8386a21d86037428e7f
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27215
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-25 17:41:26 +00:00
Furquan Shaikh 50ddc0bb28 util/sconfig: Get rid of ops from struct device
"ops" field was used in device structure only to add
default_dev_ops_root for root device. It was always set to NULL for
all other devices. This change gets rid of ops field from struct
device and instead hardcodes default_dev_ops_root in pass1 for root
device.

BUG=b:80081934
TEST=Verified that static.c generated with and without this change is
exactly the same.

Change-Id: I0848788610c2ed27274daf4920de3068a9784d4c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27209
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-25 17:40:46 +00:00
Furquan Shaikh 27efc501d1 util/sconfig: Add support for overriding base tree properties/node
This change adds support to allow variants to override the devices and
properties in base device tree by providing an override device
tree. It works as follows:
1. Both base and override device trees are parsed from provided input
files.
2. Walk through the trees in lockstep fashion using depth-first
traversal checking if a node in override tree has a matching node in
base tree.
 - If matching node is found, then update the properties of base node
 using the override node. Continue walking the children of the nodes.
 - If matching node is not found, then copy the entire override
 subtree of the node under the current base parent. In addition to
 that, chip instance pointers of the nodes in override tree need to be
 updated if they were pointing to the override parents chip instance.

Since chip always expects a device to be present, it leads to a
side-effect that overriding chip registers requires that a device is
always provided for the chip in the override tree as well.

BUG=b:80081934

Change-Id: I6604e4f8abe3fc48240e942fea32da96031e1e46
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27206
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-25 17:40:36 +00:00
Furquan Shaikh 39ac797eda util/sconfig: Enable parsing of override device tree
This change allows sconfig utility to accept an extra optional
parameter to specify override device tree that can be used to override
the properties or add new devices in addition to that provided by base
device tree. This is helpful for variants that share most of the
devicetree but have to override certain registers or add some devices
which might not be applicable to base devicetree.

In order to support the override devicetree, following changes are
made in this CL:
1. override_root_dev and override_root_bus are provided.
2. main() function is updated to accept an optional argument.
3. If override device file is provided, then parse_devicetree is
called for override_devtree as well.

This change in itself does not provide the override feature. It is
only a small step towards the final goal. The override devicetree
parsed by sconfig is currently unused.

BUG=b:80081934

Change-Id: I477e038c8922ae1a9ed5d8bf22a5f927a19a69c7
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26689
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-25 08:55:39 +00:00
Naresh G Solanki fb7eaa5beb util/lint/checkpatch_json: Fix checkpatch output keyword match string
From checkpatch output, look for keywords starting with 'ERROR:' &
'WARNING:' .

Also check for keywork ': FILE:'  instead of the same without the
colon (:).


BUG=None
BRANCH=None
TEST=Check if patch https://review.coreboot.org/#/c/coreboot/+/22537/21
is processed & json output is generated properly.

Change-Id: Ib690ab34a1ffabc4f83642634fd34beea16a64dc
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/27170
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-25 08:19:37 +00:00
Nicola Corna 04d2601426 sb/intel/common/firmware: Enable me_cleaner for Nehalem
Recent patches in coreboot have fixed the freeze issues related to the
use of me_cleaner on Nehalem.

However, at least on the Lenovo X201, with me_cleaner some PCIe devices
(like the SATA and USB controllers) disappear. In particular, setting
the AltMeDisable bit ("-S" or "-s" flag) makes them disappear
completely, while unsetting it makes them disappear only during cold
boots.

This kind of behaviour was already observed by Youness Alaoui on the
Purism Librem laptops ([1]), and it seems related to some required
board-specific PCIe configuration in the ME's MFS partition.

For this reason, on the Lenovo X201, "-w EFFS" has been added to the
me_cleaner arguments, which whitelists the MFS-equivalent partition for
ME generation 2. This fixes all the issues, and the PCIe devices work as
expected.

[1] https://puri.sm/posts/deep-dive-into-intel-me-disablement/

Change-Id: Ie77a80d2cb4945cf1c984bdb0fb1cc2f18e82ebc
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/27178
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-06-25 08:19:16 +00:00
Arthur Heymans 9700e91b10 cbfstool/fit.c: Fix for older CPUs without total_size in mcu_header
Some older CPUs have a fixed size of 2048 bytes for microcode total size.

Change-Id: Ia50c087af41b0df14b607ce3c3b4eabc602e8738
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27090
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-22 09:20:22 +00:00
qeed b775a62bb9 inteltool: Add PCI IDs for the C220 PCH series
Adds missing PCI IDs to allow tool to dump the
C220 PCH (8 series) southbridge.

Intel Document 328904 is the datasheet for this PCH.

Change-Id: I07a8f2e9cb0ee8677c8fe2c51881147ed81c1a35
Signed-off-by: Quan Tran <qeed.quan@gmail.com>
Reviewed-on: https://review.coreboot.org/27168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-06-21 17:39:48 +00:00
Arthur Heymans 4dfb5f1055 util/abuild: Fix building when not in coreboot root dir
Change-Id: Ibe54096f275a05bda745ae2cc76c0109281c0c4b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-06-21 15:47:44 +00:00
Philipp Deppenwiese 0f0e4e6c66 payloads: Add LinuxBoot payload in u-root mode
* Add LinuxBoot support
* Add u-root mode
* Download kernel and u-root from upstream sources.
* Add customization options
* Clean kernel only if directory exists

Change-Id: I3a25ff6812e046acc688cbbb203cf262ad751659
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/23071
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-19 18:37:37 +00:00
Werner Zeh a7835c462e cbfstool: Use endian.h and functions from commonlib
The endian conversion function be32toh() is defined in
src/include/endian.h, however this file is not used for cbfstool
compilation. Currently the one provided by the host is used and if the
host does not provide this endian.h file, the build will fail.
However, we do have endian conversion functions in commonlib/endian.h
which is available for cbfstool compilation.

Switch from be32toh() to read_be32() in order to avoid relying on a
host provided include file.
We use functions from commonlib/endian.h already in cbfstool.

Change-Id: I106274cf9c69e1849f848920d96a61188f895b36
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/27116
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-18 04:25:28 +00:00
Patrick Rudolph 7ee05eddf1 util/cbfstool: Support FIT payloads
In order to support booting a GNU/Linux payload on non x86, the FIT format
should be used, as it is the defacto standard on ARM.
Due to greater complexity of FIT it is not converted to simple ELF format.

Add support for autodecting FIT payloads and add them as new CBFS_TYPE 'fit'.
The payload is included as is, with no special header.
The code can determine the type at runtime using the CBFS_TYPE field.
Support for parsing FIT payloads in coreboot is added in a follow on
commit.
Compression of FIT payloads is not supported, as the FIT sections might be
compressed itself.

Starting at this point a CBFS payload/ can be either of type FIT or SELF.

Tested on Cavium SoC.

Change-Id: Ic5fc30cd5419eb76c4eb50cca3449caea60270de
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25860
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-06-15 09:13:24 +00:00
Elyes HAOUAS b0f1988f89 src: Get rid of unneeded whitespace
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-14 09:32:34 +00:00
Elyes HAOUAS 68c851bcd7 src: Get rid of device_t
Use of device_t is deprecated.

Change-Id: I6adc0429ae9ecc8f726d6167a6458d9333dc515f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-14 09:30:24 +00:00
Patrick Georgi 79d26c7a83 util/docker/coreboot.org-status: collect report generators
Move generators for the board status report and the kconfig options
report into a common directory and wrap them in a docker container.

Also rework to emit HTML not wiki syntax.

Change-Id: If42e1dd312c5fa4e32f519865e3b551bc471bc72
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/26977
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-06-14 08:45:24 +00:00
Martin Roth 31e0d42a1d util/lint: Run lint-extended-007-final-newlines checks in parallel
Instead of checking each directory in series, kick off the checks
in parallel and then wait for them to finish.  Failures print out with
file information, so mixing output isn't a problem.  This reduces
the time it takes to run on lumberingbuilder by 60%.

This could probably be sped up even more by splitting up src/mainboard
into smaller sections.

This method does skip a few control files at the top level - .gitignore,
.checkpatch.conf, gnat.adc, etc.  These could be added to the list of
files to check, but I didn't think it was needed.

Change-Id: I171977e713a9956cf4142cfc0a199e10040abb35
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/27011
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-14 08:42:30 +00:00
Furquan Shaikh de39fc7160 util/sconfig: Prepare sconfig to allow parsing multiple trees
In preparation to allow devicetree overrides, it will be necessary to
use the same parsing functions to prepare two separate parse
trees. This change does the following things:
1. Updates root device and bus names to add base_ prefix.
2. Adds a function parse_devicetree that sets the root_parent and
linenum before calling yyparse().
3. Updates all uses of root_dev to refer to the next base_root_dev.

BUG=b:80081934
TEST=Verified that static.c generated for all boards built using
abuild is the same with and without this change.

Change-Id: I403a90c1ebf07ac66115ddfe137daf0980dc1a18
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27017
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-06-13 14:48:12 +00:00
Martin Roth f1eff68ef5 util/lint: Run lint-extended-007-checkpatch checks in parallel
Instead of checking each directory in series, kick off all the checks
in parallel and then wait for them to finish.  Failures print out with
file information, so mixing output isn't a problem.  This reduces
the time it takes to run on lumberingbuilder from 31 seconds to 6.

Change-Id: I1252a68a723370389d399f3d1a2aff3fad64c365
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/26995
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-12 11:11:54 +00:00
Paul Menzel 43fc1aee4d kconfig: add script to manipulate .config files on the command line
Copy the script `scripts/config` from Linux (commit 427fbe89 (Merge
branch 'next' of
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux)) into the
newly created directory `scripts`. Here is the original commit message
from 2009.

> commit 8e54701ea85b0ab0971637825a628f5aa2b678a4
> Author: Andi Kleen <andi@firstfloor.org>
> Date:   Sat Jan 3 03:21:41 2009 +0100
>
> kconfig: add script to manipulate .config files on the command line
>
> I often change single options in .config files. Instead of using
> an editor or one of the frontends it's convenient to do this from
> the command line. It's also useful to do from automated build scripts
> when building different variants from a base config file.
>
> I extracted most of the CONFIG manipulation code from one of my
> build scripts into a new shell script scripts/config
>
> The script is not integrated with the normal Kconfig machinery
> and doesn't do any checking against Kconfig files, but just manipulates
> that text format. This is always done at make time anyways.
>
> I believe this script would be a useful standard addition for scripts/*
>
> Sample usage:
>
> ./scripts/config --disable smp
> Disable SMP in .config file
>
> ./scripts/config --file otherdir/.config --module e1000e
> Enable E1000E as module in otherdir/.config
>
> ./scripts/config --state smp
> y
> Check state of config option CONFIG_SMP
>
> After merging into git please make scripts/config executable
>
> Signed-off-by: Andi Kleen <ak@linux.intel.com>
> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>

Change-Id: Ie32a4459398df8694956dd644f38692017a26388
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/26243
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-12 07:43:15 +00:00
Patrick Georgi db693b44aa util/optionlist: show location of a comment
Change-Id: Ib417f435011f0331a1b0228734874ef0a62fb587
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/26945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-06-11 21:18:24 +00:00
Patrick Georgi 446f77daad util/optionlist: move kconfig2wiki to kconfig2html and adapt to html
This also removes a "chapters mode" that we never used.

Change-Id: Ib301e2f4db0b9678081fa987a5dcc7108bb103a4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/26944
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-06-11 21:18:09 +00:00
Youness Alaoui d8214d7e0e inteltool: Add dumping of full PCR ports
SoCs from Skylake on have many settings as so called private con-
figuration registers (PCRs). These are organized as 256 ports with
a 64KiB space each. We use the Primary to Sideband (P2SB) bridge's
BAR to access them.

Change-Id: Iede4ac601355e2be377bc986d62d20098980ec35
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19593
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-11 20:55:06 +00:00
Tristan Shieh 3ddf57e24e mediatek/mt8183: Add a stub implementation of the MT8183 SOC
Most things still need to be filled in, but this will allow us to build
boards which use this SOC.

BUG=b:80501386
BRANCH=none
TEST=timer and uart work fine

Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/26659
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-11 10:30:59 +00:00
Elyes HAOUAS 1d3fde4693 {src,util}: Use NULL instead of 0 for pointer
Change-Id: I75fa4577055f25dde0a8b1044c005bba72cabd92
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26857
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-11 08:52:08 +00:00
Martin Roth 575f1d7784 crossgcc: Update to clang 6.0 & cmake 3.11.3
Change-Id: I1a0db60b527c2f7ffe77743c0d75b78a7c8bc4cc
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/26877
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-11 08:28:55 +00:00
Furquan Shaikh 4ca3a8abfa util/sconfig: Get rid of rescnt in struct device
This change gets rid of rescnt member in struct device since it is
redundant. "res" member can be used to determine if resource list is
present or not.

BUG=b:80081934
TEST=Verified that static.c generated with and without this CL is
exactly the same for all boards built using abuild.

Change-Id: I73a2361686ad1130716a7d29576f2d02b9ed33c1
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08 23:36:47 +00:00
Furquan Shaikh 931982600d util/sconfig: Re-factor device structure in parse tree
This change re-factors the device structure in parse tree to be able
to support multidev devices just like non-multidev devices.

With this change, every device has a bus under it which is the parent
of all devices that fall on the bus. If there are duplicate entries in
the devicetree, then there will be multiple buses under the device and
each bus will have its own set of children.

The tree starts out with a root device which has a root bus under
it. This is a special device which is created statically and its
parent is its own root bus. When parsing the device tree file, devices
get added under the root bus as children.

Since this change re-organizes the way devicetree is represented, it
gets rid of latestchild and next_sibling pointers from struct
device. Also, the tree traversal to generate static.c is changed to
breadth-first walk instead of using the next_sibling.

BUG=b:80081934
TEST=Verified using abuild that all boards compile successfully.

Change-Id: Ic8c8a73a247e8e992ab6b1b2cc3131e06fa2e5a1
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26800
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08 23:36:02 +00:00
Furquan Shaikh 7398deda2b util/sconfig: Make queue handling more generic within main.c
This change updates queue handling routines to be more generic so that
it can be used by more than just chip queue. Additionally, it provides
functions to dequeue element from head and peek head of a queue which
will be used in a follow-up commit.

BUG=b:80081934
TEST=Verified that abuild compiles successfully for all boards.

Change-Id: Ibd2de85b48c5d4e2790bf974ea3bb1bd387f66ee
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26802
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08 23:35:54 +00:00
Maulik V Vaghela 82e8c69a56 sconfig/main.c: Fix number of arguments in fprintf
During compilation sconfig/main.c gives an error regarding number of
arguments passed in fprintf.

BUG=none
BRANCH=none
TEST=check if compilation warning has been fixed

Change-Id: Ia769cc606a1e3f7e1188cd82235442493d37f664
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/26972
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-08 06:17:53 +00:00
Furquan Shaikh 5ad79cdf2f util/sconfig: Get rid of unused parameter to walk_device_tree
This change gets rid of unused 3rd parameter chips to the function
walk_device_tree.

BUG=b:80081934
TEST=Verified that abuild compiles successfully for all boards.

Change-Id: I255ff030562073b16310fc22a0981808bf2c062f
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26801
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08 03:29:37 +00:00
Patrick Georgi c57eeb9c8c util/docker/doc.coreboot.org: Add git to the image
Required to get a current version string onto doc.coreboot.org

Change-Id: Iac54c4be2d4e783b7bf9ed529a431e72c67abab7
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/26896
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-07 15:10:25 +00:00
Patrick Georgi 9101608e85 util/docker: rename docs.c.o to doc.c.o
Make the directory name match the name of the subdomain.

Change-Id: I2dcf2385e6d953b7fe02caef72413149a332ec24
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/26887
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-07 15:10:17 +00:00
Patrick Georgi aefbc46a05 util/docker/docs.coreboot.org: reduce container size
We don't need the .deb files in the image forever

Change-Id: I67a56faf8f9466e5162f7662708a5abb2971d2f9
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/26895
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-07 15:08:58 +00:00
Patrick Georgi 6e25feff70 util/docker/docs.coreboot.org: Downgrade sphinx
Sphinx >= 1.6 can't use recommonmark. debian/stable is ancient enough to
have an older version.

Change-Id: I287deab9168ab6124b05d0c6d6e8cdbd7fdc2eec
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/26699
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-07 11:33:15 +00:00
Martin Roth e99a718e83 util/lint: Add filename checker
Check that filenames have only alphanumeric characters plus underscore,
dash, and period.

Change-Id: I7bf0be15d588aa1a5ece628b56e871662d6af44b
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/26938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-07 06:27:08 +00:00
Furquan Shaikh b72ab9e4d7 util/sconfig: Get rid of nextdev member in struct device
Now that chips and devices are treated differently and the device tree
actually contains only devices, next and nextdev are exactly the same
for all devices in the tree. This change gets rid of nextdev pointer
and updates all uses of nextdev to next.

BUG=b:80081934
TEST=Verified that static.c generated for all boards built by abuild
is same with and without this change.

Change-Id: Ie50b3d769a78fe0beddba2e5551441b43cb212a2
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26741
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05 20:58:16 +00:00
Furquan Shaikh c56ae2ffa1 util/sconfig: Get rid of struct header
Now that chips and devices are treated differently in sconfig, this
change gets rid of struct header and add_header function which were
responsible for maintaining list of headers that need to be added to
static.c.

Instead, struct chip is re-factored into struct chip and
struct chip_instance, where chip is a list of unique chips required by
the mainboard whereas chip_instance is an instance of the chip. One
chip can have multiple instances dependending upon the devices in the
system. Also, struct device is updated to hold a pointer to chip
instance instead of the chip structure. This unique list of chips is
then used to add appropriate headers to static.c

BUG=b:80081934
TEST=Verified using abuild that all boards compile successfully.

Change-Id: I6fccdf7c361b4f55a831195adcda9b21932755aa
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26739
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-05 20:58:03 +00:00
Furquan Shaikh 369e1f074f util/sconfig: Add helper function for allocating memory
Add a helper function s_alloc (sconfig alloc) that allocates memory
using calloc to get 0 initialized memory and checks to ensure it is
not NULL.

BUG=b:80081934

Change-Id: I56a70cf4865c50ed238226ace86e867bb1ec53db
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26738
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05 20:57:51 +00:00
Furquan Shaikh a9b642999b util/sconfig: Get rid of bus pointer in device structure
The only reason bus pointer existed in device structure in sconfig was
to allow a node to point to the parent which could be a chip and bus
which is the true parent in device tree hierarchy. Now that chip is no
longer a device, there is no need for separate bus and parent
pointers. This change gets rid of the redundant bus pointer in struct
device in sconfig.

BUG=b:80081934
TEST=Verified that static.c generated for all boards built by abuild
is same with and without this change.

Change-Id: I21f8fe1545a9ed53d66d6d4462df4a5d63023844
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05 20:57:39 +00:00
Furquan Shaikh a0cc5a697c util/sconfig: Re-factor emitting of headers to static.c
This change removes call to add_header from parsing functions and
moves it to a local function within main.c. It also adds a new
function emit_headers that is responsible for creating the linked list
for chip headers and emitting those to static.c

BUG=b:80081934
TEST=Verified that static.c for all files compiled using abuild is the
same with and without this change.

Change-Id: I24d526e81323115d3cc927242a4b9e49414afbe0
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26726
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05 20:57:26 +00:00
Furquan Shaikh 79e8412665 util/sconfig: Re-factor sconfig to not assume chip as device
This change adds a new structure "struct chip" to identify elements of
type chip rather than re-using the structure for device. Until now
chip was treated as a device while generating the parse tree and then
device tree postprocessing skipped over all the chip entries in
children and sibling pointers of device nodes.

With this change, the device tree will only contain struct device in
the parsed tree. It helps by avoiding unnecessary pointers to chip
structure as children or next_sibling and then skipping those elements
in post processing. Every device can then hold a pointer to its chip.

When generating static.c, chip structure is emitted before device
structure to ensure that the device structure has chip within its
scope. Externally, the only visible change in static.c should be the
order in which chip/device elements are emitted i.e. previously all
chips under a particular device were emitted to static.c and then the
devices using those chips. Now, all chips are emitted before all the
devices in static.c

BUG=b:80081934
TEST=Verified that abuild is successful for all boards. Also, verified
that static.c generated for eve, kahlee, scarlet, asrock imb_a180 is
unchanged from before in node definitions.

Change-Id: I255092f527c8eecb144385eb681df20e54caf8f5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26720
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05 20:57:16 +00:00
Werner Zeh d5f91e41c3 util/ifdtool: Remove .dependencies on make clean
The generated file .dependencies shall be removed on invocation of
'make clean' as the clean target aims to delete all generated files.

Change-Id: I4ec291fe84136bbdf1c2563cc10195846652a36d
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/26600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-04 09:38:25 +00:00
Paul Menzel c724ac1f3c board_status: Abort if repository is in a dirty state
Run `git status` to let the user spot what is going on.

Change-Id: I154d964354872f922cd22b05a5d2231ca2504f25
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/22016
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-04 09:25:17 +00:00
Elyes HAOUAS b9585c5cc8 util/superiotool: Remove whitespace before tab
Change-Id: Ie79cfb92cfb8b8f628aa4b12bba946b0479fc466
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26668
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-04 09:10:32 +00:00
Elyes HAOUAS 5bc61dafd1 util/cbfstool: Remove whitespace before tab
Change-Id: I122acaf9129afaa7b3ae8fd50d8717138809132e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-04 09:10:05 +00:00
Elyes HAOUAS dfe8d64459 util/inteltool: Add Pentium 4 model f6x
Tested on Pentium 4, CPUID = 0F65 board: NEC 945G-M4.

Change-Id: I27c4bb0aed3259aa332581384077e000c9fb4b4c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/23521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-06-04 02:31:51 +00:00
Elyes HAOUAS 6e6b36ac68 util/msrtool: Add Pentium D support
CPUID F6x will not support all MSRs on intel_pentium4_later.
Removed from pentium4_later and added as Pentium D.

Change-Id: Ic6ac0593607b6f87fe921ac52738dad5ee3457dc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-06-04 02:30:03 +00:00
Iru Cai 46fb8b6f05 buildgcc: Update IASL to 20180531
Change-Id: I6c14f3aad59749896816bb8789788fc513e7176f
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/21156
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-06-03 23:08:49 +00:00
Martin Roth bdad9a8e72 util/lint: Update lint-000-license-headers linter
- Add some directories and files to the ignore list
- Add the LGPL as a recognized header.  It's used in some files that
were pulled into coreboot from other sources.

Change-Id: I53423205f1cbf142a294ee5d24e885741a44dfcd
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26572
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-06-02 21:00:22 +00:00
Patrick Georgi 4f41336fd8 util/lint: use a more compact output format
It now looks like this:

Check that files have license headers (lint-stable-000-license-headers): success
Check for superfluous whitespace in the tree (lint-stable-003-whitespace): success
Check that C labels begin at start-of-line (lint-stable-004-style-labels): success

Change-Id: I9d1f6adebae5b68a51e89c2833f8713f0ffcb616
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/26703
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-06-01 16:25:54 +00:00
Patrick Georgi f743728e9f util/lint: Add check that changes conform to clang-format style
It's a white list (configured through $(top)/.clang-format-scope) with
the expectation that the list will grow over time.
Once everything is covered, we can turn off the white-listing and keep
everything enforced.

To not drive people crazy, only check the files their commit touched.

Change-Id: I52c7ea73fd36aaa46c0bfce928158e1cd6304540
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/26514
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-05-31 15:33:59 +00:00
Martin Roth f8307c3bb4 util/docker: Fix file ownership when building with coreboot-sdk
Instead of requiring the user to enter their root password to set the
created files to their user, create a new user inside the docker
container with the correct UID & GID and build with that.

Change-Id: Ibbeff00211e8cf653f48204d285e06bca39b5fd2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26594
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-30 17:15:25 +00:00
Patrick Georgi 5486786495 checkpatch: exclude util/crossgcc/patches
These files are supposed to contain trailing whitespace due to the patch
format. Also use the exclusion list in the pre-commit hook.

Change-Id: I8816c05ea703964a332915a0675096836957b242
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/26695
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-30 17:12:00 +00:00
Patrick Georgi 9110c17668 util/gitconfig: improve robustness of checkpatch in pre-commit
Users can have non-default configurations as to how git diff et al are
presenting file names in diffs (default: a/ and b/ prefixes). checkpatch
expects that and trims the first element, so enforce that configuration
for the diff that's sent into it.

Change-Id: I099795119456a73c900b31ce191c2d9e898a5c7e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/26694
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-30 17:11:51 +00:00
Nico Huber 659f40bb34 buildgcc: Do not try to install GCC if build failed
We didn't bail out if configuring or building of GCC failed but run
`make install` and later steps instead. This resulted in very confusing
logs that concealed the actual error.

Change-Id: Ia064e0bfd96f0cbad391da3bb19e4dc304d988ff
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26496
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-24 19:02:43 +00:00
Matthias Gazzari d88cd70877 util/intelmetool: Add Makefile target for OLDARC definition
This allows one to compile intelmetool with support for older ME
versions by setting the OLDARC preprocessor definition.

For example, compiling with OLDARC enabled avoids the "ME: GET FW
VERSION message failed:" error on the Lenovo X201i (ME version 6.0).

Change-Id: I5eb0da7663e795f790e2723bb334447380724b56
Signed-off-by: Matthias Gazzari <mail@qtux.eu>
Reviewed-on: https://review.coreboot.org/26450
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-23 08:31:45 +00:00
Martin Roth 1613e25be1 util/testing: Convert tegra124 and tegra210 builds to junit
Because the tegra124 & tegra201 lp0 builds weren't junit tests, the
builds weren't actually picked up by jenkins, so any failures were
not previously reported.

Change-Id: Ie443ca713912d01ccf6921ce49f846d7297163ef
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/26422
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22 07:25:54 +00:00
Matthias Gazzari 04864c7fd0 util/intelmetool: Fix missing comma
Change-Id: I4cb70c2aa466ac71dc8fcd25a7c1824696f32909
Signed-off-by: Matthias Gazzari <mail@qtux.eu>
Reviewed-on: https://review.coreboot.org/26449
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22 07:15:47 +00:00
Martin Roth 3a314658af util/lint: Make the non-ascii character check stable
Change-Id: I967f67a19a96cac8b7e0e98356e87d7d0610d4b2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26435
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-22 03:10:31 +00:00
Julius Werner 88f4e08acf cbfs-compression-tool: Add raw compression support
This patch adds a new "rawcompress" command to cbfs-compression-tool,
that works exactly the same as "compress" except that it doesn't add the
custom 8-byte header to the file. This can be useful if you need to
compress something into a format that coreboot's decompression routines
can work with, but it's not supposed to go into CBFS.

Change-Id: I18a97a35bb0b0f71f3226f97114936dc81d379eb
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-22 02:38:35 +00:00
Julius Werner ee87885343 cbfs-compression-tool: Fix minor edge cases in algorithm type parsing
This patch adds two minor improvements to the way cbfs-compression-tool
parses the compression algorithm type that is passed through the -t
option of the 'compress' subcommand. These improvements are intended
to prevent accidents and unexpected behavior when using the
cbfs-compression-tool, in particular in automated contexts such as a
Makefile rule.

In the first part of this patch, a return statement is inserted after
the 'if (algo->name == NULL)' check of the compress() function. This
causes the function to exit immediately and subsequently abort the
program when the algorithm type was not detected correctly. Previously,
execution would continue with the 'algo' pointer pointing to the zeroed
out stopper entry of the types_cbfs_compression[] array. The ultimate
effect of this would be to pass 0 as 'algo->type' to the
compression_function() function, which happens to be the same
enumeration value as is used for CBFS_COMPRESS_NONE, leading to a valid
compression function result that matches the behavior of no compression.
Thus, if a script calling cbfs-compression-tool compress contained a
typo in the -t parameter, it would continue running with an unintended
compression result rather than immediately exiting cleanly.

In the second part of this patch, the strcmp() function is replaced with
strcasecmp() when comparing 'algo->name' with the 'algoname' parameter
that was passed to the compress() function. strcasecmp() uses an
identical function signature as strcmp() and is thus suitable as a
drop-in replacement, but it differs in behavior: rather than only
returning a result of 0 when the two NULL-terminated input strings are
character by character identical, the strcasecmp() function applies a
weaker concept of identity where characters of the latin alphabet
(hexadecimal ranges 0x41 through 0x5a and 0x61 through 0x7a) are also
considered identical to other characters that differ from them only in
their case. This causes the -t parameter of cbfs-compression-tool
compress to also accept lowercase spellings of the available compression
algorithms, such as "lz4" instead of "LZ4" and "lzma" instead of "LZMA".
As an unintended but harmless side-effect, mixed-case spellings such as
"lZ4" or "LZmA" will also be recognized as valid compression algorithms.
(Note that since the character "4" (hexadecimal 0x34) of the "LZ4"
compression type name is not part of the above-mentioned ranges of latin
alphabet characters, no new substitutions become valid for that part of
the "LZ4" string with this patch.)

Change-Id: I375dbaeefaa0d4b0c5be81bf7668f8f330f1cf61
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26389
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-05-21 13:25:49 +00:00
Martin Roth 67403ed6e4 util/docker: Update coreboot-sdk dockerfile dependencies list
- Remove archive utilities no longer needed by EM100 build
- Remove duplicate libgmp-dev entry
- Add graphviz needed for doxygen builds

Tested building to verify dependencies:
coreboot(what-jenkins-does), em100, chromeec, flashrom, SeaBIOS, TINT,
memtest86+, tianocore, doxygen, ipxe, FILO, GRUB, libpayload,
depthcharge

Tested ROM in QEMU

Change-Id: Idb5cf43807706b3298ee08f6707f495d3a79abb6
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/26393
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-21 13:21:39 +00:00
Martin Roth c32c054cc4 util/testing: Update junit.xml to support coreboot builds
Up to this point, junit.xml has only been used to build tools, as abuild
has handled the coreboot builds.  To add additional tests not covered
by abuild, we need junit.xml to work with bare directories.

This also requires updating the build directory (BLD_DIR) for existing
builds using the junit.xml target.

Change-Id: If6e27e02e25e20f48e5a9372373de6058ca378dd
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/26421
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-05-21 13:17:38 +00:00
Furquan Shaikh 8f567320ba util/cbmem: Fix compare function for qsort
compare_timestamp_entries will fail for entries that are different by
at least 2^32 since entry_stamp is 64-bit and the return for compare
is 32-bit. This change fixes compare_timestamps by actually comparing
the entries to return 1, -1 or 0 instead of doing math on them.

TEST=Verified that "cbmem -t" sorts entries correctly on previously
failing entries.

Change-Id: I67c3c4d1761715ecbf259935fabb22ce37c3966e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-18 20:13:47 +00:00
Nico Huber 93323b303f cbfstool: Drop `-t` parsing for `add-payload` command
It seems this was never used and the usage doesn't mention it either.

Change-Id: I9240c0ed5453beff6ae46fae3748c68a0da30477
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26324
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18 12:16:57 +00:00
Martin Roth 735b9a0d1c util/abuild: Disable unspecified payload options
We have two payload options in abuild:
"None" or a pointer to an elf file.

This disables all other options in abuild, and makes disabling the other
options common to both valid options.

Change-Id: Icbd6fde4343ac1cff05778131f9e54370baf4224
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-05-17 12:06:33 +00:00
Ronald G. Minnich c6d134988c Revert "cbfs/payload type: Fix build warning and whitespace in name"
This reverts commit 717ba74836.

This breaks seabios and a few other payloads. This is not
ready for use.

Change-Id: I48ebe2e2628c11e935357b900d01953882cd20dd
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/26310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-16 04:50:55 +00:00
Paul Menzel 717ba74836 cbfs/payload type: Fix build warning and whitespace in name
Currently, adding a payload to CBFS using the build system, the warning
below is shown.

    W: Unknown type 'payload' ignored

Update payload type from "simple elf" to "simple_elf" and rename the
word "payload" to "simple_elf" in all Makefiles.

Fixes: 4f5bed52 (cbfs: Rename CBFS_TYPE_PAYLOAD to CBFS_TYPE_SELF)
Change-Id: Iccf6cc889b7ddd0c6ae04bda194fe5f9c00e495d
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26240
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 11:20:45 +00:00
Lubomir Rintel 6cc4dea9f1 msrtool: add VIA C7
Change-Id: I67c4f579f898a709dde3fab6bab1474a721da770
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/18258
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 11:14:10 +00:00
Kyösti Mälkki 1edd66c1ef util/msrtool: Check for VENDOR_AMD for K8 probe
Change-Id: Icc3973dfc7217ca649fb4151ccdea5461a550bb8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-15 03:57:13 +00:00
Kyösti Mälkki 15a971b89f util/msrtool: Fix swapped IA32_MC3_x and IA32_MC4_x
Registers IA32_MCi_xx are defined as architectural MSRs
since "P6 Family Processors" and should have model-agnostic
indexing.

Note that in IA32 architecture manual, names of these MSRs are
similarly swapped in the table of Intel Core Microarchitecture.
I take this is an error in the documentation only, and it got
copy-pasted across different CPU family files in the utility.

Change-Id: I227102875b5c3d6ac144ed23a3085f3c37dabd4a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26269
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 03:56:51 +00:00
Kyösti Mälkki 8b72aaf3f7 util/msrtool: Fix names from IA32_MCO_xx to IA32_MC0_xx
Change-Id: I46cd986f4914b214156da49db37ecfa749386ce8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26268
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-15 03:56:20 +00:00
Lubomir Rintel fbf57596bb msrtool: use a bit more clever cpuid vendor match
Not everything non-intel is AMD.

Change-Id: I06d6fbaa0b4f2c9e61d9b3b4aeeb349a91aa090e
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/18255
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 03:55:19 +00:00
Raul E Rangel d4fec689fd cbmem: Sort timestamp entries
If the timestamp entries are added out of order, the duration
calculation will be wrong.

AGESA collects timestamp data through all the stages. Then in AmdInitPost
it asks for a buffer to write TP_Perf_STRUCT into. agesawrapper will then
take the data and call timestamp_add on each entry. This results in
the entries being out of order.

TEST=Built firmware for grunt that manually added entries and then ran
cbmem -t/-T to verify the entries were in the correct order.

Change-Id: I6946a844b71d714141b3372e4c43807cfe3528ad
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/26168
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-13 10:14:35 +00:00
Lubomir Rintel 38686f15dd msrtool: add support for printing string values
The VIA CPUs allow setting the CPUID vendor, which is best read as
a character string.

Change-Id: I67f77ca75f7d77e47b3ba09bad904df5805e373a
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/18257
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-13 10:07:23 +00:00
Lubomir Rintel 199a23cd8a mstrool: only use intel targets for actual intel CPUs
VIA c3 & C7 use the the family of 0x6 and model 10, but are not quite
Pentium III.

Change-Id: I85e9853b42cfd20db46db0bd244620d6813bc826
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/18256
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-13 10:07:12 +00:00
Duncan Laurie bae9f85ddb devicetree: Add USB device type
This commit adds support for describing USB ports in devicetree.cb.
It allows a USB port location to be described in the tree with
configuration information, and ACPI code to be generated that
provides this information to the OS.

A new scan_usb_bus() is added that will scan bridges for devices so
a tree of ports and hubs can be created.

The device address is computed with a 'port type' and a 'port id'
which is flexible for SOC to handle depending on their specific USB
setup and allows USB2 and USB3 ports to be described separately.

For example a board may have devices on two ports, one with a USB2
device and one with a USB3 device, both of which are connected to an
xHCI controller with a root hub:

     xHCI
       |
    RootHub
    |     |
USB2[0]  USB3[2]

device pci 14.0 on
  chip drivers/usb/acpi
    register "name" = ""Root Hub""
    device usb 0.0 on
      chip drivers/usb/acpi
        register "name" = ""USB 2.0 Port 0""
        device usb 2.0 on end
      end
      chip drivers/usb/acpi
        register "name" = ""USB 3.0 Port 2""
        device usb 3.2 on end
      end
    end
  end
end

Change-Id: I64e6eba503cdab49be393465b535e139a8c90ef4
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/26169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-11 08:59:51 +00:00
Martin Roth dea13331a1 util/lint: Ignore whitespace, newlines, and licenses in vbt files
Change-Id: I84f612db058d83936ddd5a6baa32c993e5b0f594
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-09 16:19:36 +00:00
Patrick Georgi 3b755c20f8 util/xcompile: prefer riscv64 over riscv
gcc 8.1 insists.

Change-Id: I8cb00fafdfff7679e38f357c6e8968da656c351d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/25995
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-09 10:00:32 +00:00
Jonathan Neuschäfer f7c64f9428 util/release/genrelnotes: Add "sifive" search pattern
Make sure that SiFive-related code is counted under RISC-V in the
release notes.

Change-Id: I3a74bb25ea66c98bc194adafd8267afeb42d7993
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25987
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-05 15:24:45 +00:00
Patrick Rudolph 4f5bed5210 cbfs: Rename CBFS_TYPE_PAYLOAD to CBFS_TYPE_SELF
In preparation of having FIT payloads, which aren't converted to simple ELF,
rename the CBFS type payload to actually show the format the payload is
encoded in.

Another type CBFS_TYPE_FIT will be added to have two different payload
formats. For now this is only a cosmetic change.

Change-Id: I39ee590d063b3e90f6153fe655aa50e58d45e8b0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-05-04 10:30:24 +00:00
Furquan Shaikh c0257dd7ae ifdtool: Add a list of known platforms that support IFD_VERSION_2
ifdtool has relied on one of the fields within FCBA(read_freq) to
determine whether a platform supports IFD_VERSION_1 or
IFD_VERSION_2. However, newer platforms like GLK and CNL do not have
read_freq field in FCBA and so the value of these bits cannot be used
as an indicator to distinguish IFD versions. In the long run, we need
to re-write ifdtool to have a better mapping of SoC to IFD fields. But
until that is done, this change adds a list of platforms that we know
do not support read_freq field but still use IFD_VERSION_2. This
change also updates GLK and CNL to pass in platform parameter to
ifdtool.

BUG=b:79109029, b:69270831

Change-Id: I36c49f4dcb480ad53b0538ad12292fb94b0e3934
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26023
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-04 01:15:52 +00:00
Matthias Gazzari 25c7e322e8 board_status: Remove sudo when checking for cbmem with command
I get the error below when using the following command in combination
with sudo:

sudo command -v $SOME_COMMAND
sudo: command: command not found

Detection of the cbmem path is working fine without sudo.

Change-Id: I8788c190ffebde117e2abd3df924c48d8f6fd05d
Signed-off-by: Matthias Gazzari <mail@qtux.eu>
Reviewed-on: https://review.coreboot.org/25989
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-03 15:07:34 +00:00
Werner Zeh 7850b5836b cbfstool: Add region offset information to layout command
The layout command prints all FMAP regions in the final image among with
the region size. Extend this command to show the offset of each region
in the image.

Change-Id: I5f945ba046bd2f1cb50a93e90eb887f60c6fde8a
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/25851
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-04-30 06:24:12 +00:00
Paul Menzel 6c48618597 util/autoport: Improve `readme.me`
Correct spelling mistakes and punctuation, and improve some wording.

Change-Id: I2c976bd62d8fa508373747b3fb3cf31490d5f631
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/25338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-04-29 16:46:04 +00:00
Jonathan Neuschäfer 5be7bb3fa6 util/intelmetool: Be explicit about *kernel* cmdline arguments
Reduce the potential for confusion.

Change-Id: I1d5df9acb30948f786f4ced895bbaeed80153fdb
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25699
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-04-28 15:28:52 +00:00
Vivia Nikolaidou 81084368d0 buildgcc: Add missing '\'
That caused the CFLAGS, CXXFLAGS, and '|| touch .failed' to not be taken
into account when building binutils.

Change-Id: I94521eb73cefdc5ed01fbf10122966a54cc28166
Signed-off-by: Vivia Nikolaidou <vivia.nikolaidou@puri.sm>
Reviewed-on: https://review.coreboot.org/25901
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-28 07:16:58 +00:00
Patrick Georgi a2faac2168 util/docker: Add docker container that builds the sphinx documentation
It's what we use on coreboot.org to update
www.coreboot.org/Documentation

Change-Id: I6e5457d2e39a10f14fabd68bbb231a05e2f66f1d
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/25869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-04-27 20:01:54 +00:00
T Michael Turney 5c49d18537 util/qualcomm: Add T32 debug scripts
T32 scripts that allow debug of any coreboot stage on sdm845

Change-Id: Ia1bcbe687ca7bba10dc04cb6689640b13a8453f5
Signed-off-by: T Michael Turney <mturney@codeaurora.org>
Reviewed-on: https://review.coreboot.org/25542
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-04-27 09:21:11 +00:00
Aaron Durbin 94984a8461 util/x86/x86_page_tables: add command line to generated files
In order to help the reader understand where things are generated
from add a comment string that is composed of the command line
used to generate the files.

BUG=b:72728953

Change-Id: I1b93923f8b08192448ab19226fd27661cc09e853
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25834
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-04-27 03:25:28 +00:00
Patrick Georgi e74ba1984d util/hugo: Drop support for hugo based documentation
We shouldn't have two of everything

Change-Id: I9879b40e26ba5a98626bc14c3d273fb525c070f7
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/25870
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-26 13:59:08 +00:00
Jonathan Neuschäfer 55b46454bc src/sifive: Add the SiFive Freedom Unleashed 540 SoC
The FU540 is the first RISC-V SoC with the necessary resources to run
Linux (an external memory interface, MMU, etc).

More information is available on SiFive's website:
https://www.sifive.com/products/hifive-unleashed/

Change-Id: Ic2a3c7b1dfa56b67cc0571969cc9cf67a770ae43
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-04-26 11:52:37 +00:00
Jonathan Neuschäfer f2b4993b1d util/riscvtools: Rename to util/riscv/
There's no good reason to use the more complicated name.

Change-Id: I515e2df3b87580ddd31d18fe63451a98e92ead61
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25700
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-25 11:43:20 +00:00
Aaron Durbin b5eee682dc util/x86/x86_page_tables: add license header to generated code
If one wants to check in generated page tables in C then coreboot
complains about there not being a license. Therefore, add the BSD
license to the generated page tables.

BUG=b:72728953

Change-Id: I980d7a7c0c14c1ed5aa8ce37a1484943a6a100f2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25737
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
2018-04-23 09:16:48 +00:00
Aaron Durbin 2b72e6bdfd util/x86/x86_page_tables: update PAT mapping to match linux
The linux kernel uses the following mapping for PAT entries:
  PTE encoding:
      PAT
      |PCD
      ||PWT  PAT
      |||    slot
      000    0    WB : _PAGE_CACHE_MODE_WB
      001    1    WC : _PAGE_CACHE_MODE_WC
      010    2    UC-: _PAGE_CACHE_MODE_UC_MINUS
      011    3    UC : _PAGE_CACHE_MODE_UC
      100    4    WB : Reserved
      101    5    WP : _PAGE_CACHE_MODE_WP
      110    6    UC-: Reserved
      111    7    WT : _PAGE_CACHE_MODE_WT

Update the page table generator to match what the linux kernel is
using. This just makes things consistent with linux.

BUG=b:72728953

Change-Id: Ie5ddab5c86d4e03688d7e808fcae34ce954b64f9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25711
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
2018-04-23 09:16:31 +00:00
Iru Cai 2e8f4ccfe6 ectool: Add an option to get and use EC ports from /proc/ioports
There are boards that don't use ports 0x62 and 0x66 for EC, e.g. Dell
Latitude E6230 uses 0x930 and 0x934.

Change-Id: Ie3005f5cd6e37206ef187267b0542efdeb26b3af
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/23430
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-04-19 16:30:23 +00:00
Paul Menzel 0cdaad36eb Use git HTTP URLs without `/p` in it
Change-Id: I9972b138c6dd2a289880c4ec8b3fe64fc3baa66b
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/25545
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-17 10:38:06 +00:00
Patrick Rudolph ad4ddfcfdb util/intelmetool: Add additional helpful error messages
Add more verbose error message for common problems on modern
operating systems, like Secure Boot and CONFIG_STRICT_DEVMEM.

Change-Id: Ie3361910d48271bcc2cd3b4b74937fbc5df0a176
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:27:26 +00:00
Patrick Rudolph 405d2eabe0 util/intelmetool: Fix bootguard dump
* Fix broken bootguard report on Intel ME 9.5+
* Fix broken debug statement
* Add additional rehide_me()
* Move last rehide_me()

Tested on Lenovo T470p. It shows correct BootGuard state:
Verified & Measured Boot.

Tested on Lenovo T430. It shows correct BootGuard state: Disabled.

Change-Id: Ib6c49ee39dd9962a4981e7de19b1c98c753f2944
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:27:14 +00:00
Patrick Rudolph 0391d0b023 util/intelmetool: Add support for platforms without RCBA
Only try to unhide MEI if the PCI device wasn't found and
probe for RCBA before trying to use it.

Allows to run the utility on Skylake and newer hardware that
do not have RCBA any more.

TODO: Use sideband interface to unhide MEI.

Change-Id: I7926aa80b132d5be9fece0724516701d74dd4d3d
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25399
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:27:02 +00:00
Patrick Rudolph aac3b31dbb util/intelmetool: Fix crash on strict devmem kernels
Don't crash if mapping MEI PCI memory fails.
This can happen if CONFIG_STRICT_DEVMEM is enabled.

Change-Id: I33c75a7cccb4cefaa26f70aed4bdc4bd620cdad0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:26:46 +00:00
Paul Menzel 44ad86a723 util/scripts: Add script to alphabetize MAINTAINERS file
Copy script from Linux added in commit 7683e9e5 (Properly alphabetize
MAINTAINERS file) by Linus Torvalds.

> This adds a perl script to actually parse the MAINTAINERS file, clean
> up some whitespace in it, warn about errors in it, and then properly
> sort the end result.
>
> My perl-fu is atrocious, so the script has basically been created by
> randomly putting various characters in a pile, mixing them around, and
> then looking it the end result does anything interesting when used as
> a perl script.

Change-Id: I2eb4e3f9863d0fe242fb690f1121842c80d72d6a
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/20742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:25:31 +00:00
Piotr Kubaj f3bd97cb89 util/lint: Fix execution on OpenBSD
util/lint/lint creates a file using mktemp.
mktemp on OpenBSD requires at least 6 X's, while only 5 are in the template.

Change-Id: I0b80214dd83d21e12e16a5002c68127a7ca2e41b
Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl>
Reviewed-on: https://review.coreboot.org/19745
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:19:07 +00:00
Piotr Kubaj 1b36c9de66 nvramtool: Fix build with OpenBSD
OpenBSD needs the same includes as NetBSD. It also doesn't have x86_64_iopl
function, but amd64_iopl.

Change-Id: I28273d4d87a3a77cf35412a0695325c0535e42e5
Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl>
Reviewed-on: https://review.coreboot.org/19741
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:18:26 +00:00
Dan Elkouby 3781e1fda9 autoport: add missing PCI IDs
As seen on ASUS P8Z77-V Pro

Change-Id: I9fce9a35174b5120f67c2345a0807db1b843eb48
Signed-off-by: Dan Elkouby <streetwalkermc@gmail.com>
Reviewed-on: https://review.coreboot.org/25661
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-04-16 08:33:43 +00:00
Jonathan Neuschäfer fbc66b9dc0 util/cbfstool: Print all supported architectures
The list of supported architectures in the usage output of cbfstool is
currently hardcoded and outdated.

Use the arch_names array in common.c to provide and up-to-date list.

Change-Id: I3e7ed67c3bfd928b304c314fcc8e1bea35561662
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25590
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-11 14:12:00 +00:00
Jonathan Neuschäfer e32cea15c8 util/cbfstool: Print types on stdout
Currently, "cbfstool -h | less" doesn't show any file types under
"TYPEs:". That's because the file types are printed with
print_supported_filetypes, which uses LOG, which prints to stderr.  Use
printf print_supported_filetypes, and thus print to stdout, to make the
usage output more normal.

Change-Id: I800c9205c59383b63a640bc0798a1bd9117b0f99
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-11 14:11:17 +00:00
Jonathan Neuschäfer f059f96c38 util/board_status/to-wiki: Remove link to xivo's git tree
coreboot doesn't support any Xivo boards, and their tree has been only
available as a tarball for a while. Let's remove this link from the
Supported Motherboards page's preamble.

It's still listed on https://www.coreboot.org/Supported_Motherboards/old.

Change-Id: I50e7bec02e803b62563f21384d857f1b37904dd1
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-10 10:48:30 +00:00
Jonathan Neuschäfer 60e8f1dbd9 util/board_status/to-wiki: s/corebootv4/coreboot/
corebootv4 vs. just coreboot has lost its significance. Version 4.0 has
been released in February 2010.

Change-Id: Ic2a35739e53fea411efc8691f1ba7db85ba0c764
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-10 10:48:18 +00:00
Alexander Couzens f126b4b8f8 crossgcc/Makefile: don't allow to call buildgcc in parallel
Change-Id: If296414f8cb3bc87862cdc20f3d3acc1a3f78556
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/21229
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-04-09 09:40:34 +00:00
Naresh G Solanki a6464b7ffd util/lint: Generate json output from checkpatch output
checkpatch_json.py processes the output of checkpatch.pl &
generates json format output of comments.

This json format output can be used to post comment on particular
CL using gerrit.

BUG=None
BRANCH=None
TEST= Run following commands:
1. Capture output of checkpatch.pl to file say checkpatch.txt
nice -n 20 git diff HEAD~ | util/lint/checkpatch.pl --no-signoff -q - |
tee checkpatch.txt
2. Generate json format file for the output.
util/lint/checkpatch_json.py checkpatch.txt comment.json
3. Post the comment.json using gerrit
ssh  coreboot.org gerrit review  -j  "<CL number>,<patchset number>"  < comment.json

Change-Id: I2471792796ab8e7d9855a6559fc731345ebd1525
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/23429
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-09 08:18:43 +00:00
Patrick Rudolph b90c0d90cf docker/coreboot-sdk: Add device-tree-compiler
Add dtc to Dockerimage for Jenkins.

Change-Id: Ifa3608f0a83431e75fbd402385863cce06e249fb
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25525
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-06 10:29:01 +00:00
Nicola Corna 8882ac55ef util/me_cleaner: Update to v1.2
Changelog:
 * Add support for the HAP/AltMeDisable bit
 * Add support for selective partition removal
 * Fix the ME permission removal on gen. 3
 * Add public key match
 * Print the compressed size of the Huffman modules on gen. 2
 * Wipe the ME6 Ignition firmware images
 * Fix the removal of the last partition on ME6
 * Various region size fixes
 * Add manpage
 * Add setup.py
 * Print the value of the HAP/AltMeDisable bit

The output image should be identical, except for the platforms affected
by bugs (ME 6.x, but it's not supported by coreboot and ME 11.x with the
-d option, but it's not being used in our build process).
Overall, nothing should change when it's used with the
CONFIG_USE_ME_CLEANER option.

Tested on a Lenovo X220 and Sapphire Pure Platinum H61.

Change-Id: I3d5e0d9af0a36cc7476a964cf753914c2f3df9d2
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/25506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-06 06:54:14 +00:00
Ivan J 85c76c9bc0 intelmetool: Include <sys/io.h> for musl-libc
This allows compiling the program using musl-libc, since otherwise
iopl(2) is undeclared.

Change-Id: Ia27203cf47b9be3f7bf1ad422c8f490caeae8f56
Signed-off-by: Ivan J. <parazyd@dyne.org>
Reviewed-on: https://review.coreboot.org/23834
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-05 14:01:39 +00:00
Nico Huber 54fe32f677 inteltool: Add some Skylake desktop ids
Change-Id: I1738a2544eb2435cb4b8718bcce5170d1ef04f72
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/25144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-03-27 15:42:14 +00:00
Furquan Shaikh 088b6e8f8b util/ifdtool: Fix region access control for SKL/KBL
The default values used by ifdtool for setting region access control
do not match the expected values for SKL/KBL as per the SPI
programming guide. This change adds platform "sklkbl" that sets region
access control bits differently for SKL/KBL images.

BUG=b:76098647
BRANCH=poppy
TEST=Verified that the access control bits on KBL images is set
correctly.

Change-Id: I1328d8006c25be282b3223268d8f1fd0a64e2ed3
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/25306
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-03-22 05:03:58 +00:00
Nico Huber d91c932517 util/inteltool: Add missing #include <string.h>
Change-Id: I7bb142d9f936b73e84d301028069d85cc15d596a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/25143
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-03-15 08:49:49 +00:00
Aaron Durbin e5372ded41 util/x86: add page page table generator
Certain platforms need paging enabled during cache-as-ram because
dirty lines are being evicted by a heavy speculative frontend. Paging
needs to be enabled in order to utilize the NX (no execute) bit for
the regions that are strictly data (such as the stack). This utility
creates 32-bit PAE page tables using a static address space, and
the resulting tables have entries for all the PDPTEs such that it makes
it easy to enable 2MiB naturally aligned DRAM mappings once memory is
trained. Either binary files can be generated or C files. The pages that
are linked use a default base address of 0xaa000000 that can be changed at
runtime to reflect where the page tables are actually loaded. Or
specify a physical address on the command line that is known a priori.

iomap.txt:
0xd0000000, 0x100000000, UC, NX # All of MMIO
0xff000000, 0x100000000, WP, # memory-mapped SPI
0xffff8000, 0x100000000, WP, # XIP bootblock
0xfef00000, 0xfefc0000, WB, NX # CAR
0xfef40000, 0xfefc0000, WB, # verstage
0xfef20000, 0xfefc0000, WB, # romstage
0xfef40000, 0xfefc0000, WB, # fsp-m

$ go run util/x86/x86_page_tables.go --iomap_file=iomap.txt
Merged address space:
00000000d0000000 -- 00000000fef00000 UC NX : 375 big 256 small
00000000fef00000 -- 00000000fef20000 WB NX : 0 big 32 small
00000000fef20000 -- 00000000fefc0000 WB    : 0 big 160 small
00000000fefc0000 -- 00000000ff000000 UC NX : 0 big 64 small
00000000ff000000 -- 0000000100000000 WP    : 8 big 0 small

Total Pages of page tables: 5

Pages linked using base address of 0xaa000000.

BUG=b:72728953

Change-Id: I47625a24979b196011e2293712a8cdbdbb880d79
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/24919
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-03-07 21:15:43 +00:00
Denis 'GNUtoo' Carikli 3ef241f0c8 cbfstool: Add install target to Makefile
Change-Id: I5df7033e1e52c78e97cdbd26aef2d7824ea67f8b
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/12403
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-03-06 22:19:47 +00:00
Richard Spiegel 7b89a28149 util/amdfwtool/amdfwtool.c: Check fstat return
Funtion fstat will return -1 if there's any error, 0 if successful.
Check that fstat return is equal to 0, print error message and exit if
not 0.

This fixes CIDs 1353018 and 1353020

BUG=b:72062481
TEST=Build no errors

Change-Id: I83284d9125c75a29471f213f88b9181d5edba2e6
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/23827
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-02-22 09:59:40 +00:00
Jonathan Neuschäfer 3af80a9377 util: make-spike-elf.sh: Fix busybox mktemp compatibility
Busybox mktemp does not support patterns with any characters after the XXXXXX
part. Drop the .o extension to make make-spike-elf.sh work on Alpine Linux.

Change-Id: I2e37ceef115c6d4d31eb617558481b2284dada83
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/23174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-20 23:14:06 +00:00
Furquan Shaikh 35972def1d util/cbmem: Re-order regex for "cbmem -1"
In case of console dump for only the last boot, cbmem utility checks
for a list of regex in provided order. When pre-cbmem console
overflows, "Pre-CBMEM <stage> console overflowed.. " message is added
before "... <stage> starting" message. This change fixes the order of
regex in cbmem utility to match this.

Test=Verified on soraka that "cbmem -1" correctly dumps the data
starting from Pre-CBMEM romstage overflowed.

Change-Id: I9c5667bbd02ed3e93ac77a4f42e87d754a062919
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/23800
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-02-19 22:00:16 +00:00
David Hendricks bb90fb55d0 board_status: Make board_status more friendly for local usage
board_status.sh was originally written for use cases where the DUT
is remote, i.e. accessed via serial port or SSH. This lead to some
issues when attempting to run the script on the DUT itself.

This patch attempts to handle the local use case more gracefully.
sudo is used when running the cbmem command, and the '-c' option
can be used to set cbmem path in case it's not in the default path
used by sudo.

Change-Id: I62957678ccae65fc46fd6ddf5ae92983d36cffad
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/21566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-02-16 22:40:20 +00:00
David Hendricks 0dcfb59220 board_status: Don't fetch dmesg via SSH when run over serial
It doesn't make much sense to try and obtain dmesg via SSH if we're
using the serial port. Serial should only be used to obtain dmesg if
SSH is unavailable.

Change-Id: Iec70e64666f9446cf7e98a0fbcaa1cd5cefd8898
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/21567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-02-16 22:40:10 +00:00
Martin Roth 681bf41087 util/broadcom/secimage: Add distclean target
When running 'make distclean' on coreboot, the build cleans the tools
as well. Since secimage didn't have a distclean target, it gave an error
that the distclean target didn't exist.  This didn't actually affect
anything more than the secimage clean, but it was impossible to tell
that from the warning:

% make distclean
make[1]: *** No rule to make target 'distclean'.  Stop.

Change-Id: I4b4bcc1ab48e767218d31e455d23527acedf4953
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-10 23:49:58 +00:00
Alex Thiessen 457d1c8fa2 util/broadcom/secimage: Add HMAC test
One of responsibilities of the `secimage` tool is signing the image
using the HMAC-SHA256 algorithm. The test being added verifies that
secimage's internal call yields same result as the according openssl
tool does.

Change-Id: I8de4328f435af56901a861e3d5e733657c3c7f78
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23474
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-06 16:14:33 +00:00
Arthur Heymans 485c0ad078 inteltool: Add Cougar- and Pantherpoint PCH PCI IDs for SPI
Tested to display the register content correctly on a Lenovo Thinkpad
X220.

Change-Id: I8b65302ed52d4ef1a31bf0cdd9208b368eb7ad67
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-02-06 16:11:45 +00:00
Arthur Heymans 921fa84f9e inteltool: Fix displaying 64bit spi registers
The registers were taken from the wrong addess since the spibar offset
was not added to it.

This also fixes the endianness.

Change-Id: I8bb91517770359599fe5f579c4686434da8d1c27
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23478
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-02-06 16:09:03 +00:00
Arthur Heymans 179a9048dd nvramtool: Fix message when option table is not found
Having an option table pertains to CONFIG_USE_OPTION_TABLE.

Change-Id: Ia8a84e3e59ee50444c7f7d17b34bea86ee475909
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-06 15:29:30 +00:00
Martin Roth 215bc53117 util/docker/coreboot-sdk: Add libftdi1-dev
chromeec uses libftdi1-dev, so add it to the image.

Change-Id: I517e3f073062dcc6b0b8e3adaf7b0123290a1698
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-01-31 16:44:25 +00:00
Arthur Heymans c32e6cb34a autoport: Don't do writes to FD in romstage
ff4025c5f "sb/intel/bd82x6x: Reduce function-disable mess"
Removed most of the writes to RCBA(FD) and renamed the function to
mainboard_rcba_config.

Writes to FD are properly handled in ramstage, so no need to do it in
romstage.

Change-Id: I4edb75569ceec2d2f1308755a66d286202ca0ae6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23486
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-30 23:17:58 +00:00
Martin Roth a9868b2dfc util/lint/checkpatch.pl: Untaint filename
This fixes the warning that is seen on the jenkins server:
Insecure dependency in piped open while running setgid at
util/lint/checkpatch.pl line 958.

Change-Id: I476efa76ef6a275584a47ec0ecf2315948d53e9d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23473
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-01-29 15:34:59 +00:00
Alex Thiessen 0e329816bd util/lint: Apply `final newlines` check to scripts
The `lint-extended-015-final-newlines` script skips over executable
files and thus leaves script files unchecked.

Use `file` to find scripts and include them in the `final newlines`
checks. Whitelisting is used including bash, perl, python and sh
scripts.

Change-Id: I8649b261b7e2cbbac7f9b90a9ace3f1c7b0eedeb
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23325
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-26 17:28:16 +00:00
Justin TerAvest ca2ed9f450 sconfig: Add a new mmio resource type
Add support for a mmio resource in the devicetree to allow
memory-mapped IO addresses to be assigned to given values.

AMD platforms perform a significant amount of configuration through
these MMIO addresses, including I2C bus configuration.

BUG=b:72121803

Change-Id: I5608721c22c1b229f527815b5f17fff3a080c3c8
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://review.coreboot.org/23319
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-01-25 16:50:17 +00:00
Martin Roth bf78d07feb util/docker/coreboot-sdk: Add msitools & rsync
- The em100 project needs msitools.
- Flashrom uses rsync.

Change-Id: Ie01064adede25471a860bc22c0a59b31202b56c2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23369
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-24 17:42:47 +00:00
Richard Spiegel 137484dee7 util/amdfwtool/amdfwtool.c: Verify it actually read bytes
The function read() returns the number of bytes actually read. Program is
assuming it actually read the required number of bytes without checking.
This is wrong.

This fixes CIDs 1353019 and 1353021

BUG=b:72062481
TEST=Build no errors

Change-Id: I22d41b3de4eac5369f512f78b1b31cc1a250f787
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/23304
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-01-24 16:24:29 +00:00
Richard Spiegel bff4545ccf util/amdfwtool/amdfwtool.c: Check for negative return
File open function <open()> will return -1 if there's any error. Check that
the return is greater or equal to 0 before using fstat(). Print error message
and exit if there's an error.

This fixes CIDs 1353018, 1353020, 1353027 and 1353028

BUG=b:72062481
TEST=Build no errors

Change-Id: I77d6973d1ad1eadb93922866e618038045be5937
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/23303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-01-23 20:10:52 +00:00
Alex Thiessen 73f19dca38 util/lint: Unify checks for git worktree
Linters try to determine whether they are running in a git worktree so
that `git grep` can be used instead of `grep`. These checks are done in
different not truly correct ways and thus the linters don't use `git
grep` when running from a worktree subdirectory, e.g. in a git subtree
environment.

Unify checks using `git rev-parse --is-inside-work-tree`.

Change-Id: I3f54afc99ad0f0e3052cffdd32bdd9649cf3d720
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23297
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:42:51 +00:00
Alex Thiessen 1758fd2a32 util/genbuild_h: Add gitfile support
`genbuild_h.sh` checks whether it is running from a coreboot's own git
worktree to decide whether to use git as the time source. This check
fails when `${top}/.git` is a gitfile, e.g. when coreboot is a
submodule.

Add a proper `git rev-parse` call to check the condition, remove `$top`
which is not used anymore.

Change-Id: I8bb13d607a01f4f28fa8b165769e0a1f702da362
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23256
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:33:02 +00:00
Alex Thiessen 101485c73d util/gitconfig: Replace printf with heredoc
The `gitconfig.sh` script contains a call to `printf` with a lengthy
argument where no format string is used at all. Replace it with a
heredoc for better readability.

Change-Id: I42dbaa570ab9661991fa5d9b4577c9aed05c2981
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23251
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:22:40 +00:00
Denis 'GNUtoo' Carikli d5dee1e8a0 util/bincfg: don't use fp shared variable
Change-Id: Ie710f8c6c06332830c3edb9e5490d1e4877ee33b
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23241
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:21:48 +00:00
Denis 'GNUtoo' Carikli fa0bdfc120 util/blobtool: move declaration to their own header
Change-Id: I556a122753e8a35c4ed32df460a5e12fa85de7f7
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23244
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:21:28 +00:00
Denis 'GNUtoo' Carikli 3cb25bbbc3 util/bincfg: cleanups: use static whenever possible
Some non-static declaration remains. If they were made
static, the compiler would output some warnings:
  bincfg.y:30:1: warning: useless storage class specifier in empty declaration
   };
   ^
  bincfg.y:47:1: warning: useless storage class specifier in empty declaration
   };
   ^
  bincfg.y:22:12: warning: ‘yylex’ used but never defined
   static int yylex (void);
              ^~~~~
  bincfg.y:456:13: warning: ‘set_input_string’ used but never defined
   static void set_input_string(char* in);
               ^~~~~~~~~~~~~~~~

Change-Id: I753e99c4a8290f9edd9abcda9af8e33b6ccfe406
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23243
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-01-23 05:20:45 +00:00
Christoph Pomaska 36e809ffd6 autoport: Add missing command to readme
The readme.md file was missing the instruction to also compile superiotool,
because autoport errors out without a working version of it.

Change-Id: Ic426b7312f68d59e2e0503d61da694adc9d4fb3f
Signed-off-by: Christoph Pomaska <cp_public@gmx.de>
Reviewed-on: https://review.coreboot.org/23282
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-01-23 05:18:35 +00:00
Alex Thiessen 7bcd6ecea6 util/gitconfig: Use `make` in git hooks
As the code was moved from the Makefile.inc to a separate file in
commit 9ab8ae6a (util/gitconfig: Make gitconfig a bash script),`$(MAKE)`
was replaced by `remake`, introducing dependency on this tool which is
basically a `make` with debugging capabilities. Many developers don't
have `remake` installed, leading to pre-commit hooks being not executed
properly. Apparently this was an unintentional change.

Furthermore, special treatment of `make` tool via the `%MAKE%`
substitution performed during hooks' deployment is still desired. Use
case is calling `remake gitconfig` to set `remake` as the `make` tool in
the hooks. To accomplish this, add a parameter that is passed from the
Makefile.inc to gitconfig.sh.

Change-Id: Ia78e06567b904b342dc9b7778569201fe02e6897
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23096
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-23 05:18:14 +00:00
Alex Thiessen 687b96155c util/*: Fix final newlines in scripts
Some script files under the `util` directory have no final newline or
multiple final newlines. This is fixed so that an adapted
`util/lint/lint-extended-015-final-newlines` does not bark at them
anymore.

Change-Id: Icec08f1fc7ea837906653475b7f821aa1a143169
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-23 05:17:44 +00:00
Alex Thiessen 7c7181fc96 util/gitconfig: Replace subshells with braces
The check for `user.name` and `user.email` being set is done in
`gitconfig.sh` and it uses two subshells where none is actually needed.
Stream redirection can be consolidated.

Change-Id: Ia1d19eb3c11f9d11f030dcc179bc175956cd7116
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-22 12:34:02 +00:00
Alex Thiessen 7459eeb18a util/gitconfig: Update `sup-destroy` git alias
The `git sup-destroy` alias uses a subshell in order to make `git
submodule deinit` deinitialize all submodules. This isn't necessary as
the `--all` switch does the same.

Furthermore, `git submodule init && git submodule update` equals to `git
submodule --init`.

Change-Id: Ib690d66795da4049bb0bb350a0609cf2e6b5c4c4
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-22 12:33:41 +00:00
Arthur Heymans 82aa8338c7 drivers/mrc_cache: Always generate an FMAP region
This automatically generates an FMAP region for the MRC_CACHE driver
which is easier to handle than a cbfsfile.

Adds some spaces and more comments to Makefile.inc to improve
readability.

Tested on Thinkpad x200 with some proof of concept patches.

Change-Id: Iaaca36b1123b094ec1bbe5df4fb25660919173ca
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23150
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-20 16:11:44 +00:00
Arthur Heymans 1e931f3e47 autoport: Don't include default_irq_route.asl
This file is no longer there since ACPI pirq routing is now done in an
automated fashion in SSDT.

Change-Id: I8bafafbf670fe0fc2f20b46b5d8abee722931c6d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christoph Pomaska <cp_public@posteo.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-01-20 14:35:31 +00:00
Arthur Heymans c8c3aca818 autoport: Remove '-' from Kconfig options
This won't compile since '-' is an operator in C.

Change-Id: Icf900c959cbcbd0b07cd83a1f6866bf255fdcf01
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23321
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christoph Pomaska <cp_public@posteo.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-01-20 14:35:26 +00:00
Alex Thiessen 2ca4ca3f21 util/gitconfig: Fix too long lines in gitconfig.sh
Change-Id: Iaff0852259f0a91fb4c906e1a01d77b92f8a49f1
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18 22:05:03 +00:00
Alex Thiessen fda071ca7a util/gitconfig: Make gitconfig.sh support gitfile
The `gitconfig.sh` script installs hooks to the according directories
(for coreboot and its submodules). It has the `hooks` directory
hard-coded to be `.git/hooks`, which makes the installation fail when
coreboot itself is a submodule because then `.git` becomes a gitfile.

Replace hard-coded path handling using the according `git rev-parse`
calls.

Change-Id: I778e20be24bb27d0081c9e1c12883117d6d50347
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18 19:29:10 +00:00
Denis 'GNUtoo' Carikli f73914d1aa util/bincfg: Fix some whitespaces
Change-Id: I674a3f58a576948dc3c0cd32ef06b42ef13353ee
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23240
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18 13:49:12 +00:00
Denis 'GNUtoo' Carikli 780e931eed util/blobtool: rename to bincfg
The name blobtool is confusing as 'blob' is also used to
describe nonfree software in binary form.

Since this utility deals with binary configurations it
makes more sense to call it bincfg.

Change-Id: I3339274f1c42df4bb4a6b30b9538d91c3c03d7d0
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23239
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18 13:47:20 +00:00
Alex Thiessen da384dd7a4 util/release: Improve git worktree checks
The bash script `genrelnotes` checks for `.git` to be present to
determine whether the current directory is the top directory of a git
worktree. This check is rather weak and doesn't handle many edge cases
like that of a broken gitfile.

Add a proper `git rev-parse` call to check the condition.

Change-Id: I32b06ca982d55fd8e88e55651b6bc53014905823
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-17 16:54:22 +00:00
Nico Huber 1898023fb1 inteltool: Dump Sunrise Point PCH-H GPIO groups
Change-Id: Ib6b083c31617e19cbbb0929e2fc8ab39d54533bf
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 01:18:36 +00:00
Nico Huber 99b02a1d7c inteltool: Support for nasty Primary to Sideband Bridge (P2SB)
The Primary to Sideband Bridge (P2SB) is the interface to Private Con-
figuration Registers (PCR) including GPIO configuration. Of course,
access is restricted to Intel partners and criminals, so the PCI device
is hidden from the OS. Probably we only need to fetch the SBREG_BAR
address and can hide the PCI device again after that.

Change-Id: Ic121a09f021708aab82ae4b9d76d6c3c6fb884fa
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19588
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 01:18:05 +00:00
Nico Huber 76a4f71e89 buildgcc: Add patch to work around Musl libc issue
GCC includes `sched.h` after poisoning calloc(). This results in a
build failure with Musl libc. We work around the issue by including
`sched.h` earlier and throw around some void pointers so we only
have to do it in one place.

Change-Id: I1d5462eb9a448147a95dd4ec50361b3f5a28910c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-01-15 01:15:27 +00:00
Nico Huber afda56e1ad buildgcc: Drop libelf/elfutils
Looks like we were unnecessarily dragging this around for some time now.
GCC's installation manual doesn't mention libelf as a requirement and a
build of crossgcc-i386 doesn't show any sign of it being used.

This also fixes a lot issues on non-GNU distributions that were intro-
duced by switching to the elfutils version of libelf.

Change-Id: Iff308a9bed9ae3842557d251b75d1faadfafe0da
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22773
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 01:14:37 +00:00
Alex Thiessen 72d1089fac util/crossgcc: Output apt-get commands on debian
In the buildgcc script, there is a check that the tools required are
installed. When a tool is missing, a message is output suggesting an
installation method, e.g. `sudo apt-get install foo` on debian-based
systems.

When run on a true, vanilla debian system, the error message provides
only a generic hint because the `please_install()` function fails to
detect the OS kind. Detection is based on definition of `ID_LIKE` in
`/etc/os-release` yet such systems only define `ID` to `debian`.

This commit closes the detection gap. Tested on debian 9 (stretch).

Change-Id: I3c867837e9157bee13010bd0a005028c369ce55f
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23231
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 01:08:42 +00:00
Lubomir Rintel c1633045be util/superiotool: dump VT1211 registers
Change-Id: Id01b72a2194ebf3359a11c3ff382efaedf28f9e1
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22255
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 00:42:43 +00:00
Lubomir Rintel 4d1bbe9908 util/superiotool: distinguish between VT82C686 and VT1211
They both have a device id of 0x3c. The former is part of the PCI chip set
accessible via port 0x3f0 while the latter is a standalone LPC chip accessible
via 0x2e/0x4e depending on strapping.

They're not register compatible: the VT82C686 only provides a FDC, LPT and part
of UARTs.

The VT82C686 documentation suggests it has revision 0x00 while the VT1211
datasheet indicates 0x01. Nevertheless, the VT1211 I happen to have hs a
revision of 0x02. Thus the revision is probably not good enough to tell one
from the another.

Change-Id: Ic7529c84724c8d6b9eb75b863f1bceef5e4b52b5
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22254
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 00:42:26 +00:00
Lubomir Rintel 2f6a29e2e6 util/superiotool: recognize a VT1211 LPC superio
Change-Id: I2c24c347c3e044397944ca2abbceb36f83483daf
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 00:41:59 +00:00
Alex Thiessen 00a455c8a7 util/broadcom/secimage: Add OpenSSL 1.1 support
The `secimage` utility uses OpenSSL to calculate HMAC, which it does in
a rather unorthodox way, using deprecated `HMAC_CTX_init` API and
repeated calling of `HMAC_Init_ex` without a clear reason. The former
causes build errors with OpenSSL 1.1 while the rest of the
`HmacSha256Hash` function is confusing and overly complex.

Make `HmacSha256Hash` use a single OpenSSL API call. Test passed:
resulting signed binary remains identical.

Change-Id: Ib23c0ad96f9d8cc30ad357de8c0b0ba967c7d724
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-14 23:11:40 +00:00
Gergely Kiss 64e0799d3b util/superiotool: add support for chip ITE IT8623E
Due to the lack of a datasheet, defaults are shown as
"not available (NA)" in the register dump.

Change-Id: I6baaf5dd95453fb1265425f357ea16c710c006ba
Signed-off-by: Gergely Kiss <mail.gery@gmail.com>
Reviewed-on: https://review.coreboot.org/23084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-01-14 07:24:05 +00:00
Alex Thiessen 6719862de8 util/gitconfig: Refuse to commit on lint failure
After running `lint-stable` in the pre-commit hook, its result is
ignored. This behavior was introduced in commit b18f522b
(lint/gitconfig: Enable checkpatch.pl checking of commits) and it
doesn't seem intentional. This issue was also mentioned in the revert
discussion (https://review.coreboot.org/c/coreboot/+/17440).

Enable `errexit` mode of the shell so that the hook fails when an error
occurs in any of the tests. Also, enable `nounset` mode to catch typos
easier.

Change-Id: I749963167660ea6a1a04d40a14ad1113e82f0f86
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23130
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-11 22:09:33 +00:00
Christoph Pomaska 48ac29ee4c util/inteltool: Add Skylake Desktop Northbridge
Add the 8086:191f North/Host Bridge to the list of definitions.
Adding the definiton makes the Northbridge get recognized by inteltool.

It is found in the Intel i5-6600K CPU:
https://ark.intel.com/products/88191/Intel-Core-i5-6600K-Processor-6M-Cache-up-to-3_90-GHz

Change-Id: Id746d1e8b3bb90b3b68a2f6c372890671dd61b5f
Signed-off-by: Christoph Pomaska <cp_public@gmx.de>
Reviewed-on: https://review.coreboot.org/23055
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-10 22:04:33 +00:00
Alex Thiessen f4ceff37c8 util/lint: Check license headers of git hooks
Now that all the files under util/gitconfig have their license headers,
enable lint-000-license-headers to check the directory too.

Change-Id: I242256f72ac70553535509f83166c6d1ddb16fdc
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-01-10 09:50:37 +00:00
Alex Thiessen d4a3d01932 util/gitconfig: Add missing license headers
License header for the `gitconfig.sh` was copied from the Makefile it
was extracted from in commit 9ab8ae6a (util/gitconfig: Make gitconfig
a bash script).

License header for the pre-commit hook names Patrick Georgi as the
copyright holder as he is the original author.

Change-Id: Ie051e5e6ae7571050ece383e6be8236ed7d1ddd9
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-01-10 09:50:16 +00:00
Jean Lucas a241d6c76b autoport: Add Intel PCIe Root Port and Bridges
- 0x0151: Xeon E3-1200 PCIe Root Port
- 0x1e25: 7/C216 Series Chipset Family DMI to PCI Bridge
- 0x2448: 82801 Mobile PCI Bridge
- 0x244e: 82801 Desktop PCI Bridge

Change-Id: I4111b73adc0f08d643c940cd43ab7fd4c0af7668
Signed-off-by: Jean Lucas <jean@4ray.co>
Reviewed-on: https://review.coreboot.org/22794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-01-07 18:46:24 +00:00
Alex Thiessen a71c66a52e util/gitconfig: Do not wait for user input
When running `make gitconfig` on a freshly cloned repository, the script
will wait for user input without a prompt in a call to `sed`, caused by
a spurious newline introduced in commit 9ab8ae6a (util/gitconfig: Make
gitconfig a bash script).

Change-Id: I2aa722c052d24dcffa9688df09bcf8dc767bd0b6
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-04 14:07:20 +00:00
Alex Thiessen ceb7788c80 util/gitconfig: Support dash in pre-commit hook
On debian systems, /bin/sh is `dash` which has built-in `echo` always
interpreting escape sequences such as '\n'. The pre-commit hook uses
the built-in for piping diff to checkpatch, interpreting the diff's
escape sequences in the process and leading to false negatives
and preventing commits despite conformance.

Use `printf` instead of `echo` when handling diff content. The bug was
introduced in commit ef869305 (util/gitconfig: update pre-commit
script).

Change-Id: I37edfe7b32721cb63d99299563cb11f26082c9a9
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23070
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-01-04 13:53:03 +00:00
Paul Menzel ceac787a4f inteltool: Add hint for compiler to avoid fall-through warning
Falling through is intended here, so add a comment that GCC will notice
and stop warning about this.

Change-Id: I12637b6bc18844a3bc47f06208df7fee7a4feb3b
Found-by: gcc-7 (Debian 7-20170316-1) 7.0.1 20170316 (experimental) [trunk revision 246203]
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/18906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Omar Pakker
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-12-22 16:54:16 +00:00
Patrick Rudolph 2d26a36910 util/inteltool: Add GPU device IDs
Add PCI device IDs for several Intel GPUs.

Change-Id: I7d6ba16b2b115187fd57a31716f23a610b520d3e
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/22431
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-12-20 16:41:46 +00:00
Martin Roth f183a85932 util/cbfstool: Check for NULL before dereference
Fixed coverity issue: 1302455 - Dereference null return value

Change-Id: I59b908adc4d35f08fda8e4ad3f806714f2caeb65
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/22900
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-12-20 16:35:13 +00:00
Aaron Durbin facf14996c util/cbfstool: calculate cbfs file size for xip stages
The initial lookup for cbfs location for xip stages is implicitly
using the ELF size assuming it's relatively equivalent. However,
if the ELF that is being converted contains debug information or
other metadata then the location lookup can fail because the ELF is
considerably bigger than the real footprint.

BUG=b:70801221

Change-Id: I47024dcd8205a09885d3a3f76e255eb5e3c55d9e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/22936
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-12-19 22:28:20 +00:00
Marc Jones 9ab8ae6a55 util/gitconfig: Make gitconfig a bash script
The gitconfig target has a few bashisms and would fail
silently on systems that use a POSIX standard sh (like Ubuntu dash).

Remove the code from the makefile and put it in a bash script that
is called by the gitconfig target.

Change-Id: I3bc8cf688a3ad211b57c8ca0e6b1e86c82dc6a37
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22857
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-12-15 23:02:11 +00:00
Martin Roth ac9d6b8c73 util/cbmem: Print timestamp frequency in verbose mode
The code flow is changed slightly to print the timestamp frequency from
either method of determining it.

BUG=b:70432544
TEST=Build and test cbmem -t -V

Change-Id: I02286fa67919e70a3592cdbcc1c9ca2991b7f385
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/22821
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-12-12 22:27:05 +00:00
Paul Kocialkowski 826713ff61 nvramtool: Add dummy cmos-hw-unix accessor implementation for non-x86
The default implementation uses inb/outb, that is not available on ARM
platforms and others. A dummy implementation allows building nvramtool
on these platforms.

Change-Id: I75e4a1a0cbd35ca40f7b108658686839ccf9784a
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/22562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-12-09 16:56:09 +00:00