Commit Graph

930 Commits

Author SHA1 Message Date
Stefan Reinauer 5d866213f4 libpayload: Have make install save .xcompile file
Useful information, record it in the destination directory,
together with .config.

Change-Id: Icf3282f61f502b37f9f06d7d5a0a630f49c96ed2
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10864
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-09 08:47:41 +02:00
Stefan Reinauer f53dbfaa8c libpayload: Use top level xcompile
Instead of having a second copy that already within 2-3 days
becamer quite outdated, use the same xcompile copy for coreboot
and libpayload, as we do with Kconfig already.

This requires a simple change to the top level xcompile to understand
both CONFIG_COMPILER_GCC and CONFIG_LP_COMPILER_GCC (only one of
them will occur at the same time)

libpayload's .xcompile target was moved later so that it can make use
of $(top)

Change-Id: I44001067f551cd0776dd303cbaeaa40eb3d5c1db
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10863
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-09 08:47:16 +02:00
Julius Werner bf27391da5 libpayload: Add LZ4 decompression algorithm
This patch adds support for the LZ4 decompression algorithm to
libpayload. It's what all the cool kids are using for decompression
these days and has many interesting advantages over LZMA (and everything
else I know of): blazing fast decompression (20(!) times faster than
LZMA, twice as fast as LZO on my Cortex-A72), no memory requirements on
decompression, and possibly in-place decompression support. It pays for
that with a lower compression ratio (about 50% larger compressed size
than LZMA, 10% larger than LZO for an ARM64 Linux kernel binary), but
the boot time math still works in its favor for our IO speeds.

This patch only adds the raw decompression functions for use by external
payloads, we can later try integrating them in CBFS. It copies the
decompression code itself unmodified from the upstream LZ4 library at
github.com/Cyan4973/lz4 which will hopefully make it easy to update. The
frame format parsing is reimplemented since the upstream version looks
unnecessarily complex and unreadable for our needs.

BRANCH=smaug
BUG=chrome-os-partner:32184
TEST=With other patches, booted ARM64 kernel that got compressed from
15M to 5.1M and decompresses in 44ms.

Change-Id: I65bdc4b2b19bd51c7b7e17a4e4b79da301a2a014
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f8a1fc996d5b0234d07f567fa8163d0f802d5144
Original-Change-Id: I15c0620da05561ade2552b15ffdf6bb3afd7eb26
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282743
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10845
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-09 00:10:16 +02:00
Patrick Georgi 838c88f1b7 libpayload: update defconfigs
That way they don't need an initial 'make oldconfig' pass to
be useful again.

Change-Id: I3724fffab24b69478b8077f34e9d787555fd157b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10805
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-08 10:25:11 +02:00
Stefan Reinauer 0fa5d8f219 payloads: Reorganize Makefile.incs for external payloads
This is not going as far as I would like it to go, but
some of the external payloads have to be fixed up first.
Long term, I would like to  directly add payloads/external/*
to subdirs-y and remove one layer of indirection from the
build process.

For now, moving the payload Makefile targets into payloads/
is already a small improvement.

Change-Id: Ie4eb492eb804e0aaaf1a4d90af2f876f27a32a75
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10829
Reviewed-by: Martin Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-07 22:50:15 +02:00
Stefan Reinauer 1a8b7bfe50 payloads: Reorganize Kconfig for external payloads
The integration of external payloads in coreboot
is a bit messy. You have to change the to level Kconfig
file for every payload (something that we recently fixed
for mainboards and chipsets). This means that updating
e.g. the SeaBIOS version requires a change outside of the
SeaBIOS directory.

With this patch you can create a new directory under
payloads/external and place a Kconfig and Kconfig.name
file in there, and the payload will automatically show
up when you do "make menuconfig".

Change-Id: I293abcb8eae581d4b3934e64897c0d339a27e7c1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10828
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-07 22:49:47 +02:00
Patrick Georgi 9b8c738942 libpayload: don't overwrite CFLAGS
Makefile already sets it to contain the architecture specific flags,
don't drop them, but add to that instead.

Change-Id: I147e6480ab2b3c1ee4f4ace511197b4ba94280b8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10804
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:27:17 +02:00
Patrick Georgi 21fc58b660 libpayload: architecture mapping is now done in xcompile
This helps the build system find i386 and mips compilers.

Change-Id: I17d18019b556190f860d288e66f368f8d29ca24d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10803
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:27:01 +02:00
Patrick Georgi 46eeb339e9 libpayload: drop LIBGCC_FILE_NAME variable
It's unused. If we need something like that, .xcompile provides it,
and in a cross-platform and clang-aware way.

Change-Id: Ic1bdc2e3e252d612a5b99ad4e8caebc5158a485f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10802
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:26:42 +02:00
Patrick Georgi db0325591d libpayload: defer including .xcompile
It needs to come after DOTCONFIG so that the compiler decision can
be made.

Change-Id: I5c6730ac58ab8731f07bb7c5161b2d0a59588e28
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10801
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:26:12 +02:00
Patrick Georgi b7d8f26eec libpayload: Add compiler switch
clang is totally untested, but it mirrors coreboot now.

Change-Id: I0e13ff8bba2007159a4a795ca07d187504b606b2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10800
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:25:52 +02:00
Patrick Georgi 3f02466b00 libpayload: mark util/xcompile/xcompile executable
Change-Id: I97088df1550f580d4648c7cccbd81c696fcfe2dc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10799
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 18:25:05 +02:00
Daisuke Nojiri 9150e5e0f2 cbfs: define libpayload_init_default_cbfs_media weakly
To allow a payload to define its own libpayload_init_default_cbfs_media,
default implementation needs to be defined weakly.

BUG=none
BRANCH=tot
TEST=dumped a cbfs file from depthcharge cli on jerry

Change-Id: Ice73ae5a63dfd49e79c0eeb92d4eade016d61c39
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1f308177fffb0d525fdb50f8d024568bb9025352
Original-Change-Id: I4721139aea3169c62c10a2a26582bd9277e4cb83
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/283061
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10783
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:42:12 +02:00
Daisuke Nojiri 3740546bd8 sysinfo: remove unused tag for struct spi_flash
This will conflict with struct spi_flash defined in spi_flash.h

BUG=none
BRANCH=tot
TEST=built libpayload for veyron jerry

Change-Id: I7e1be28cf430021944fc96890082a0704d093e9f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0f0b8a7ec114046335fb1a51b6a92e10e5a16520
Original-Change-Id: I6d4f8a8e93aeb055f7dd6e5e8fd5e6c6153ab837
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282588
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: http://review.coreboot.org/10782
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:41:54 +02:00
Daisuke Nojiri e0a8a88912 update common base header files
IS_ENABLED is defined in kconfig.h, thus, should be included in
libpayload.h.

BUG=none
BRANCH=tot
TEST=built coreboot/libpayload for veyron_jerry

Change-Id: I9c5879b6125ac66a75a507ab07a6816ab54ed0ba
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 51dcd58a841009081fdefcadf9aa74286152dde6
Original-Change-Id: I30e6d87c9de827a214a6100449cd716e773c2ba3
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282587
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: http://review.coreboot.org/10781
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:41:38 +02:00
Julius Werner d8086876a7 lzma: Return correct amount of decompressed bytes
The LZMA functions are supposed to return the decompressed size, but
what they actually return is just an unaltered field from the LZMA
header that is *supposed* to contain the decompressed size. Apparently
some encoders just overshoot that for no good reason. This patch changes
the code such that the actual amount of decompressed bytes is returned.

BRANCH=smaug
BUG=None
TEST=Printed output bytes when decompressing kernels with LZMA in
depthcharge, noted that amounts now make sense.

Change-Id: Icdd8f782aa87841f770eff4c14a08973530c7446
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 24b2fa8c9a342ca4288dad1430c8965395f00263
Original-Change-Id: Ib4cf8673846aedd34656e594ce7b8ea875b56099
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282742
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10777
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:40:37 +02:00
Yunzhi Li aa33609d28 libpayload: usb: dwc2: support interrupt transfer
dwc2 host core do not have a periodic schedule list, so try to send
an interrupt packet in poll_intr_queue() function and use frame
number read from usb core register to calculate time and schedule
transfers.

BUG=None
TEST=Tested on RK3288 with two USB keyboards(connect to SoC without
USB hub), both work correctly.
BRANCH=None

Change-Id: I16f7977c45a84b37c32b7c495ca78ad76be9f0ce
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3d0206b86634bcfdbe03da3e2c8adf186470e157
Original-Change-Id: Ie54699162ef799f4d3d2a0abf850dbeb62417777
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/280750
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: http://review.coreboot.org/10774
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:40:02 +02:00
Daisuke Nojiri 394933640b libpayload: arm(64): add read8/16/32 and write8/16/32
This applys the same change made by
https://chromium-review.googlesource.com/261692
to libpayload.

BUG=none
BRANCH=tot
TEST=built for veyron_jerry, rush_ryu, samus

Change-Id: I26dd66d79cd1559a7852b3c9d252420f2fed5fa0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d0d6f70aa805e18966e80618fbf9e9605274b030
Original-Change-Id: Ib0c199238f8fa58643d51782b17550dbd0d9ebd7
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/282541
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10773
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:39:48 +02:00
Yunzhi Li d8a3ed49a5 libpayload: udc: dwc2: support force_shutdown() routine
Add force_shutdown() routine for dwc2 udc driver to support
disconnect and reconnect case when fastboot receiving data.

BUG=chrome-os-partner:41687
BRANCH=None
TEST=None

Change-Id: I9ec204d8b7088cfafd3164c9779a6fd85d379dba
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9238f87c065ba8a57bfb4a7e65fd1821ff2922f9
Original-Change-Id: I1e584aaf19efa14409bdfa26039c27fa7034b5f0
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/281130
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-Commit-Queue: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-on: http://review.coreboot.org/10770
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06 09:39:14 +02:00
Martin Roth ac83367a7b SeaBIOS: Change clean to just 'rm -rf seabios/out'
When running 'make clean' if the seabios directory is present, we get
warnings about not having IASL installed or that the C compiler can't
be executed.  It fails to actually run the clean because we're not
correctly passing in the toolchain.

Just do what the SeaBIOS clean does directly and delete the 'out'
directory without actually calling the SeaBIOS clean.

Here were the previous warnings:

% make clean
Unable to execute the C compiler ().

Please install a working compiler and retry.
Makefile:104: *** "Please upgrade the build environment".  Stop.

or

% make clean
The SeaBIOS project requires the 'iasl' package be installed.
Many Linux distributions have this package.
Try: sudo yum install iasl
Or: sudo apt-get install iasl

Please install iasl and retry.
Makefile:106: *** "Please upgrade the build environment".  Stop.

Change-Id: Ice41376bc242f1f622d849e7628f8a9b6ef47404
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/10655
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-03 20:12:15 +02:00
Patrick Georgi 885ec48b95 libpayload: update xcompile script
Copy from coreboot. at some point it probably should just reuse coreboot's
version.

Change-Id: Iee905a9060983ff85e2e70bde69a221c64a07cbc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10756
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-03 09:38:18 +02:00
Stefan Reinauer 0ab2b25f01 coreinfo: use coreboot's kconfig
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Change-Id: I99e612dca3c2e5678d43b3e85eaf2f51d8f693e7
Reviewed-on: http://review.coreboot.org/10715
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-01 23:39:35 +02:00
Stefan Reinauer e559536daa libpayload: always compile with -ffunction-sections
Always compile with -ffunction-sections and -fdata-sections

This does not hurt, and it allows the linker to produce much
smaller binaries in some circumstances.

Change-Id: Ibf9f24c210d6d2ed40451b4cf0d68ce88220bc5f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10750
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-01 22:07:48 +02:00
Stefan Reinauer 088c1894f8 libpayload: Fix compilation on ARM with GDB enabled
Without this, gdb_enter() is not defined.

Change-Id: I067dce371ee817d6ac77387fcbe42a9a7deb6438
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10755
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-07-01 20:55:29 +02:00
Stefan Reinauer 909b916e56 libpayload: Keep stack boundary small on x86
There is no measurable performance impact, but
this positively impacts the memory used by payloads.

Change-Id: Ib2bdba4a7bf2a4c2391a20b3225bbb44422d3194
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10751
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-01 20:55:18 +02:00
Stefan Reinauer 04fb7a81c1 coreinfo: Use IS_ENABLED() to query Kconfig variables
This will make the code work with the different styles
of Kconfig (emit unset bools vs don't emit unset bools)

Roughly, the patch does this, and a little bit of fixing up:

perl -pi -e 's,ifdef (CONFIG_.+?)\b,if IS_ENABLED\($1\),g' `find . -name *.[ch]`
perl -pi -e 's,ifndef (CONFIG_.+?)\b,if !IS_ENABLED\($1\),g' `find . -name *.[ch]`

Change-Id: Ia461a33541f58ff39e984119c44ece7e6c05608a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10713
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-01 00:36:36 +02:00
Stefan Reinauer 17dd74cf45 coreinfo: Drop local Kconfig copy
Change-Id: Ice29e63149b97de1b943b3655b984b0ce13a42ba
Reviewed-on: http://review.coreboot.org/10714
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-06-30 21:59:42 +02:00
Stefan Reinauer 2551f5914e libpayload: Makefile: Use variables defined for Kconfig
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

Change-Id: Ia451e8250307ad1944cb0429bdfee4bdf18c706b
Reviewed-on: http://review.coreboot.org/10712
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-30 18:56:19 +02:00
Stefan Reinauer ed56499ab1 libpayload: Drop duplicate copy of Kconfig
It's perfectly fine to have one single copy of kconfig in the tree.

Change-Id: Icfe32f0249dfc1c223009d6e7136462f8f8a7248
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10521
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-30 18:55:32 +02:00
Stefan Reinauer 1b4d39428e libpayload: Make Kconfig bools use IS_ENABLED()
This will make the code work with the different styles
of Kconfig (emit unset bools vs don't emit unset bools)

Roughly, the patch does this, and a little bit of fixing up:

perl -pi -e 's,ifdef (CONFIG_LP_.+?)\b,if IS_ENABLED\($1\),g' `find . -name *.[ch]`
perl -pi -e 's,ifndef (CONFIG_LP_.+?)\b,if !IS_ENABLED\($1\),g' `find . -name *.[ch]`

Change-Id: Ib8a839b056a1f806a8597052e1b571ea3d18a79f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10711
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-30 18:55:15 +02:00
House Chou c8144f96ab libpayload: Swap the macros of VT100_CURSOR_ON and VT100_CURSOR_OFF
The macros of VT100_CURSOR_ON and VT100_CURSOR_OFF are exchanged

Change-Id: Ifdae186ae0503a915d695a9e3fd24bdf65d8428a
Signed-off-by: House Chou <hoare.tw@gmail.com>
Reviewed-on: http://review.coreboot.org/10718
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-30 09:21:27 +02:00
huang lin 41e2499734 libpayload: add UDC driver for Designware controller
Found in rockchips rk3288 as used in google/veyron.

BUG=None
TEST=None
BRANCH=None

Change-Id: I2f2c36c5bea3986a8a37f84c75608b838a8782ae
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 59a0bcd97e8d0f5ce5ac1301910e11b01e2d24b1
Original-Change-Id: Ic89ed54c48d6f9ce125a93caf96471abc6e8cd9d
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/272108
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: http://review.coreboot.org/10689
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-30 08:09:49 +02:00
Furquan Shaikh a4b718cc2d UDC: Correct cleaning out memory for string descriptors
BUG=chrome-os-partner:41687
BRANCH=None
TEST=Compiles successfully and fastboot devices reports correct serial
number even after re-connection.

Change-Id: I4741a5d6333523eb47c27b4a20c4ef3f1e853d76
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6249b1e35391550d788f56a7b3e7a49ae19f0c93
Original-Change-Id: I1348c33f354d11e3c29ccd9da9948cfbeb60aa9e
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/281192
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10687
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-30 08:09:31 +02:00
Furquan Shaikh ed1a4bbb60 udc/chipidea: Allow force_shutdown of connection
Allow force shutdown operation of the connection in case where the
cable is disconnected and reconnected back.

BUG=chrome-os-partner:41687
BRANCH=None
TEST=Compiles successfully and fastboot works fine even with
reconnection of cable

Change-Id: I8eb1217b4a9ad6ce8a2a40db329eca1930eda089
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3d7ab65c459caa4ec526b99a1aee1a31e9cb80da
Original-Change-Id: I354c44e0ed2211cb2c4c1ae653d201b7d15ea932
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/281066
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10686
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-30 08:09:22 +02:00
Alexander Couzens 633886719e SeaBIOS: fix reproducible build by defining our own version string
SeaBIOS uses a version string which is derived from hostname.
Defining our own version strings drops this dependency.
This only works in versions newer than rel-1.8.0-36-g624e812.

Change-Id: Ie800deffd3706d1b2dabf5258e2e48bfcd2929b7
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/10515
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-06-23 09:42:07 +02:00
Patrick Georgi f4227c4b01 libpayload udc: add interface to add string descriptors
They're ASCII only, with only one language at a time,
but they should be good enough to report device names and
serial numbers.

BUG=none
BRANCH=none
TEST=with depthcharge CL, check dmesg on the host device

Change-Id: If888e05b2f372f7f0f43fadb108ca7ef4ed3b7c1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f0bc4242057d3edc4f4796ebeed2d98d89d60a1d
Original-Change-Id: Ibe42f1b49f412e5482cebb7ebe20f6034352fd12
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/278300
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10626
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2015-06-23 08:20:45 +02:00
Furquan Shaikh 3cec871eaa libpayload: Parse MTC and fill mtc_start and mtc_size
Parse coreboot table and fill in mtc_start and mtc_size values in
sysinfo structure.

BUG=chrome-os-partner:41125
BRANCH=None
TEST=Compiles successfully and boots to kernel prompt

Change-Id: If210ea0a105f6879686e6e930cb29e66bc5e6cd0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b70d0d35c85fa1a2317b0239276d5d9e7a550472
Original-Change-Id: I60b6f8ed4c704bd5ad6cce7fce2b9095babe181e
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/276778
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10563
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-06-23 08:19:57 +02:00
Furquan Shaikh 63a3e1ec7f stddef: Add macro for member_size
Add macro to calculate size of a structure member

BUG=chrome-os-partner:41125
BRANCH=None
TEST=Compiles successfully

Change-Id: I71bcefe1c3b32ad559d7764e77369c67d09422a0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b425a310c14eabad79caf97649db6469380bd602
Original-Change-Id: I377fff062729aa664f7db469b86764b0ad941c38
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/276809
Original-Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10560
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-06-17 11:55:41 +02:00
Stefan Reinauer dee4420318 libpayload: Rename Config.in -> Kconfig
libpayload is the only Kconfig based project under
the coreboot umbrella that is using Config.in as its
name for Kconfig config files. Rename that to Kconfig
as on the other projects for consistency.

Change-Id: I1c69ec13582d88409384b492484535dcc5e1ad20
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10520
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-06-12 02:42:43 +02:00
Patrick Georgi cacf7234af libpayload: retire LAR support
Who knows it still?

Change-Id: If6e36569cd9a1ba3da8b3fe84264cd2a6dfd634b
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/10443
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-06-08 10:21:30 +02:00
Elyes HAOUAS 52648623e0 Remove empty lines at end of file
Used command line to remove empty lines at end of file:
find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \;

Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/10446
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-08 00:55:07 +02:00
Julius Werner 7a8a4ab1d8 lib: Unify log2() and related functions
This patch adds a few bit counting functions that are commonly needed
for certain register calculations. We previously had a log2()
implementation already, but it was awkwardly split between some C code
that's only available in ramstage and an optimized x86-specific
implementation in pre-RAM that prevented other archs from pulling it
into earlier stages.

Using __builtin_clz() as the baseline allows GCC to inline optimized
assembly for most archs (including CLZ on ARM/ARM64 and BSR on x86), and
to perform constant-folding if possible. What was previously named log2f
on pre-RAM x86 is now ffs, since that's the standard name for that
operation and I honestly don't have the slightest idea how it could've
ever ended up being called log2f (which in POSIX is 'binary(2) LOGarithm
with Float result, whereas the Find First Set operation has no direct
correlation to logarithms that I know of). Make ffs result 0-based
instead of the POSIX standard's 1-based since that is consistent with
clz, log2 and the former log2f, and generally closer to what you want
for most applications (a value that can directly be used as a shift to
reach the found bit). Call it __ffs() instead of ffs() to avoid problems
when importing code, since that's what Linux uses for the 0-based
operation.

CQ-DEPEND=CL:273023
BRANCH=None
BUG=None
TEST=Built on Big, Falco, Jerry, Oak and Urara. Compared old and new
log2() and __ffs() results on Falco for a bunch of test values.

Change-Id: I599209b342059e17b3130621edb6b6bbeae26876
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3701a16ae944ecff9c54fa9a50d28015690fcb2f
Original-Change-Id: I60f7cf893792508188fa04d088401a8bca4b4af6
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/273008
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10394
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-05 13:18:55 +02:00
Yidi Lin d42ee150a0 libpayload: usb: Support MTK xHCI host controller
1. There is a mis-understanding to calculate the value of TD Size
   in Normal TRB. For MTK's xHCI controller it defines a number of
   packets that remain to be transferred for a TD after processing
   all Max packets in all previous TRBs, that means don't include the
   current TRB's.
2. To minimize the scheduling effort for synchronous endpoints in xHC,
   the MTK architecture defines some extra SW scheduling parameters for
   HW. According to these parameters provided by SW, the xHC can easily
   decide whether a synchronous endpoint should be scheduled in a specific
   uFrame. The extra SW scheduling parameters are put into reserved DWs
   in Slot and Endpoint Context. But in coreboot synchronous transfer can
   be ignored, so only two fields are set to a default value 1 to support
   bulk and interrupt transfers, and others are set to zero.
3. For control transfer, it is better to read back doorbell register or add
   a memory barrier after ringing the doorbell to flush posted write.
   Otherwise the first command will be aborted on MTK's xHCI controller.
4. Before send commands to a port, the Port Power in PORTSC register should
   be set to 1 on MTK's xHCI so a hook function of enable_port in
   generic_hub_ops_t struct is provided.

Change-Id: Ie8878b50c048907ebf939b3f6657535a54877fde
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 738609c11f16264c6e6429d478b2040cb391fe41
Original-Change-Id: Id9156892699e2e42a166c77fbf6690049abe953b
Original-Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/265362
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: http://review.coreboot.org/10389
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-06-03 11:11:59 +02:00
Chunfeng Yun 08e3013490 libpayload: usb: Max packet size of SuperSpeed control EPs should be 512.
BRANCH=none
BUG=none
TEST=none

Change-Id: I563ef65db900d7675aeb5b9123dfb5a8980bf964
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9764115d7bcce1d6423464bd81b58211ac728409
Original-Change-Id: Ibac8d3b9e28b4a563079f288901abcfbff6913ee
Original-Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/269863
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Queue: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: http://review.coreboot.org/10388
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-03 10:59:41 +02:00
Julius Werner 68bdd00799 libpayload: Add div_round_up() function
The lack of a div_round_up() function in libpayload keeps being a
problem for payloads and has already caused us to sprinkle numerous
less-readable ALIGN_UP(n, d) / d throughout depthcharge. Let's add this
so we can avoid adding any more and then maybe cocchinelle them all over
later.

BRANCH=None
BUG=None
TEST=None

Change-Id: I241a52770a0edcf7003b48a81875b3fa0cb7ed53
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a3f9514f9cfd325cc3c4b542020574b605fac935
Original-Change-Id: Ia55bd4bc52ab8a249b4854e40727cf6917af7b30
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/273050
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10392
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-02 12:03:45 +02:00
Julius Werner 623368113c arm64: Decouple MMU functions from memranges
The current arm64 MMU interface is difficult to use in pre-RAM
environments. It is based on the memranges API which makes use of
malloc(), and early stages usually don't have a heap. It is also built
as a one-shot interface that requires all memory ranges to be laid out
beforehand, which is a problem when existing areas need to change (e.g.
after initializing DRAM).

The long-term goal of this patch is to completely switch to a
configure-as-you-go interface based on the mmu_config_range() function,
similar to what ARM32 does. As a first step this feature is added
side-by-side to the existing interface so that existing SoC
implementations continue to work and can be slowly ported over one by
one. Like the ARM32 version it does not garbage collect page tables that
become unused, so repeated mapping at different granularities will
exhaust the available table space (this is presumed to be a reasonable
limitation for a firmware environment and keeps the code much simpler).

Also do some cleanup, align comments between coreboot and libpayload for
easier diffing, and change all error cases to assert()s. Right now the
code just propagates error codes up the stack until it eventually
reaches a function that doesn't check them anymore. MMU configuration
errors (essentially just misaligned requests and running out of table
space) should always be compile-time programming errors, so failing hard
and fast seems like the best way to deal with them.

BRANCH=None
BUG=None
TEST=Compile-tested rush_ryu. Booted on Oak and hacked MMU init to use
mmu_config_range() insted of memranges. Confirmed that CRCs over all page
tables before and after the change are equal.

Change-Id: I93585b44a277c1d96d31ee9c3dd2522b5e10085b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f10fcba107aba1f3ea239471cb5a4f9239809539
Original-Change-Id: I6a2a11e3b94e6ae9e1553871f0cccd3b556b3e65
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/271991
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10304
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-02 11:34:23 +02:00
Patrick Georgi b890a1228d Remove address from GPLv2 headers
As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.

However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.

util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.

$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
	-a \! -name \*.patch \
	-a \! -name \*_shipped \
	-a \! -name LICENSE_GPL \
	-a \! -name LGPL.txt \
	-a \! -name COPYING \
	-a \! -name DISCLAIMER \
	-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +

Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-05-21 20:50:25 +02:00
Vladimir Serbinenko c728288a1f nvramcui: reboot at the end as TODO suggests
Use cf9 to reboot at the end.

Change-Id: I642a5ec89c864fb03bbcdf6e4fcbb1e28f3fc34c
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4693
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-05-19 15:15:22 +02:00
Yidi Lin 7267ccbae8 libpayload: add mediatek timer driver
Change-Id: Ifb19cf97d4db6c7394521e549968a0cfb6ed1c75
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0137652ca07e290bb3cb1cc82a00b44ac7bcc7bf
Original-Change-Id: Ica649927d3533c847b24e520e8fe73d75fb9e786
Original-Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/257375
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/10170
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-18 13:20:00 +02:00
Aaron Durbin 0a50d9b353 libpayload: x86: correct types used for IO
libpayload on x86 defines u32 and uint32_t as typedefs of
unsigned int. However, the readl/writel routines use long.
With alias checking this throws type punning errors. Align
the readl/writel/inl/outl types with the 32-bit fixed width
ones that are exposed.

Change-Id: Ie51cff8af4596948f6132e3cb743f1bc4ea8f204
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10186
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-05-13 15:39:54 +02:00