Commit Graph

2029 Commits

Author SHA1 Message Date
Patrick Georgi 392e9b156e util/broadcom: specify libraries after object files
Some compilers and linkers require a strict order or fail to find
all symbols.

Change-Id: I3f44bec1f0e21e7313a751fbc99c61c1aa9b7cf1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9962
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22 19:36:29 +02:00
Daisuke Nojiri e1741c512c broadcom/cygnus: add secimage and sign bootblock
secimage is a tool which adds a header and signature to the binary
first loaded by the soc. ARM core frequency is set to 1 Ghz.

BUG=chrome-os-partner:36421
BRANCH=broadcom-firmware
TEST=booted b0 board

Change-Id: Ia08600d45c47ee4f08d253980036916e44b0044a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 36284d1b242c26b0b5aac2894f7ed1790da1ef15
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chrome-internal-review.googlesource.com/197155
Original-Reviewed-by: Scott Branden <sbranden@broadcom.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Daisuke Nojiri <dnojiri@google.com>
Original-Tested-by: Daisuke Nojiri <dnojiri@google.com>
Original-Change-Id: Iaddd24006b368c8f37e075cb51e151e985029f3b
Original-Reviewed-on: https://chromium-review.googlesource.com/264417
Reviewed-on: http://review.coreboot.org/9914
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22 08:59:18 +02:00
Vadim Bendebury 45e5997c61 cbfstool: clean up source code
The following changes were made:

- order commands and options definitions alphabetically
- do not report errors at cbfs_image_from_file() call sites - the
  error is reported by the function itself
- remove the unused parameter in cbfs_create_empty_entry() prototype

BRANCH=storm
BUG=none
TEST=compiled cbfstool, built a storm image, observed that the image
     still boots

Change-Id: I31b15fab0a63749c6f2d351901ed545de531eb39
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a909a50e03be77f972b1a497198fe758661aa9f8
Original-Change-Id: I4b8898dbd44eeb2c6b388a485366e4e22b1bed16
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/237560
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9746
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-18 08:50:38 +02:00
Vadim Bendebury 1161473ecb cbfstool: add the missing 'break'
The previous patch introduced a bug where the new added case statement
was missing the break. There was no problem testing, because an
unrelated parameter structure field was being modified as a result.

BRANCH=storm
BUG=none
TEST=compiles and runs

Change-Id: Iaeb328048f61ffd57057ebce47f2ac8e00fc5aac
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 27ecc130569e4252e4627052f617130a2017c645
Original-Change-Id: Ib3e6c4c2b5c37588c612b8ab2672f6845c1b4ecb
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/239598
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9743
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-04-18 08:48:46 +02:00
Vadim Bendebury 5e273a4577 cbfstool: add a command to duplicate a cbfs instance
The new command allows to create a file where the original CBFS image
is duplicated at a different offset.

The required options of the new command are -D, the offset where the
copy CBFS header is placed, and -s, the size of the new CBFS copy.

When a CBFS is copied, the bootblock area of the source CBFS is
ignored, as well as empty and deleted files in the source CBFS. The
size of the destination CBFS is calculated as the rombase size of the
source CBFS less the bootblock size.

The copy instance can be created in the image only above the original,
which rules out the use of this new command for x86 images. If
necessary, this limitation could be addressed later.

As with other cbfstool commands, unless explicitly specified the
lowest CBFS instance in the image is considered the source. If
necessary, the user can specify the source CBFS using the -H option.

BRANCH=storm
BUG=chrome-os-partner:34161, chromium:445938
TEST=run multiple cbfstool commands on a storm image:
  $ cd /tmp
  $ cp /build/storm/firmware/image.serial.bin storm.bin
  $ cbfstool storm.bin print
  storm.bin: 8192 kB, bootblocksize 34472, romsize 458752, offset 0x8700
  alignment: 64 bytes, architecture: arm

  Name                           Offset     Type         Size
  cdt.mbn                        0x8700     raw          416
  ddr.mbn                        0x8900     raw          25836
  rpm.mbn                        0xee40     raw          78576
  tz.mbn                         0x22180    raw          85360
  fallback/verstage              0x36f40    stage        41620
  fallback/romstage              0x41240    stage        19556
  fallback/ramstage              0x45f00    stage        25579
  config                         0x4c340    raw          2878
  fallback/payload               0x4cec0    payload      64811
  u-boot.dtb                     0x5cc40    (unknown)    2993
  (empty)                        0x5d840    null         75608
  $ cbfstool storm.bin copy -D 0x420000
  E: You need to specify -s/--size.
  $ cbfstool  storm.bin copy -D 0x420000 -s 0x70000
  $ cbfstool  storm.bin print
  W: Multiple (2) CBFS headers found, using the first one.
  storm.bin: 8192 kB, bootblocksize 34472, romsize 458752, offset 0x8700
  alignment: 64 bytes, architecture: arm

  Name                           Offset     Type         Size
  cdt.mbn                        0x8700     raw          416
  ddr.mbn                        0x8900     raw          25836
  rpm.mbn                        0xee40     raw          78576
  tz.mbn                         0x22180    raw          85360
  fallback/verstage              0x36f40    stage        41620
  fallback/romstage              0x41240    stage        19556
  fallback/ramstage              0x45f00    stage        25579
  config                         0x4c340    raw          2878
  fallback/payload               0x4cec0    payload      64811
  u-boot.dtb                     0x5cc40    (unknown)    2993
  (empty)                        0x5d840    null         75608
  cbfstool  storm.bin print  -H 0x420000
  storm.bin: 8192 kB, bootblocksize 0, romsize 4784128, offset 0x420040
  alignment: 64 bytes, architecture: arm

  Name                           Offset     Type         Size
  cdt.mbn                        0x420040   raw          416
  ddr.mbn                        0x420240   raw          25836
  rpm.mbn                        0x426780   raw          78576
  tz.mbn                         0x439ac0   raw          85360
  fallback/verstage              0x44e880   stage        41620
  fallback/romstage              0x458b80   stage        19556
  fallback/ramstage              0x45d840   stage        25579
  config                         0x463c80   raw          2878
  fallback/payload               0x464800   payload      64811
  u-boot.dtb                     0x474580   (unknown)    2993
  (empty)                        0x475180   null         110168
  $ cbfstool storm.bin remove -n config -H 0x420000
  $ cbfstool  storm.bin copy  -H 0x420000 -D 0x620000 -s 0x70000
  $ cbfstool  storm.bin print -H 0x620000
  storm.bin: 8192 kB, bootblocksize 0, romsize 6881280, offset 0x620040
  alignment: 64 bytes, architecture: arm

  Name                           Offset     Type         Size
  cdt.mbn                        0x620040   raw          416
  ddr.mbn                        0x620240   raw          25836
  rpm.mbn                        0x626780   raw          78576
  tz.mbn                         0x639ac0   raw          85360
  fallback/verstage              0x64e880   stage        41620
  fallback/romstage              0x658b80   stage        19556
  fallback/ramstage              0x65d840   stage        25579
  fallback/payload               0x663c80   payload      64811
  u-boot.dtb                     0x673a00   (unknown)    2993
  (empty)                        0x674600   null         113112

  $ cbfstool /build/storm/firmware/image.serial.bin extract -n fallback/payload -f payload1
  [..]
  $ cbfstool storm.bin extract -H 0x620000  -n fallback/payload -f payload2
  [..]
  $ diff payload1 payload2

Change-Id: Ieb9205848aec361bb870de0d284dff06c597564f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b8d3c1b09a47ca24d2d2effc6de0e89d1b0a8903
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Change-Id: I227e607ccf7a9a8e2a1f3c6bbc506b8d29a35b1b
Original-Reviewed-on: https://chromium-review.googlesource.com/237561
Reviewed-on: http://review.coreboot.org/9742
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-18 08:48:22 +02:00
Vadim Bendebury 458a12e52b cbfstool: allow user to explicitly specify header location
There potentially could be multiple CBFS instances present in the
firmware image. cbfstool should be able to operate on any of them, not
just the first one present.

To accomplish that, allow all CBFS commands to accept the -H parameter
(which specifies the exact CBFS header location in the image).

If this parameter is specified, the image is not searched for the CBFS
header, only the specified location is checked for validity, If the
location is valid, it is considered to be the CBFS header, if not -
the tool exits with an error status.

Note, that default behavior of the tool does not change.

BRANCH=storm
BUG=chrome-os-partner:34161, chromium:445938
TEST=run the following experiments:

  - examined an image with three CBFS instances, was able to print all
    of them.

  - built a rambi coreboot image and tried the following (cbfstool output abbreviated):

  $ ./util/cbfstool/cbfstool /build/rambi/firmware/coreboot.rom print
  coreboot.rom: 8192 kB, bootblocksize 2448, romsize 8388608, offset 0x700000
  alignment: 64 bytes, architecture: x86

  Name                           Offset     Type         Size
  cmos_layout.bin                0x700000   cmos_layout  1164
  ...
  (empty)                        0x7ec600   null         77848
  $ \od -tx4 -Ax /build/rambi/firmware/coreboot.rom | tail -2
  7ffff0 fff67de9 000000ff fff6dfe9 fffff650
  800000
  $ ./util/cbfstool/cbfstool /build/rambi/firmware/coreboot.rom print  -H 0x7ff650
  coreboot.rom: 8192 kB, bootblocksize 2448, romsize 8388608, offset 0x700000
  alignment: 64 bytes, architecture: x86

  Name                           Offset     Type         Size
  cmos_layout.bin                0x700000   cmos_layout  1164
  ...
  (empty)                        0x7ec600   null         77848
  $ ./util/cbfstool/cbfstool /build/rambi/firmware/coreboot.rom print  -H 0x7ff654
  E: /build/rambi/firmware/coreboot.rom does not have CBFS master header.
  E: Could not load ROM image '/build/rambi/firmware/coreboot.rom'.
  $

Change-Id: I64cbdc79096f3c7a113762b641305542af7bbd60
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 86b88222df6eed25bb176d653305e2e57e18b73a
Original-Change-Id: I486092e222c96c65868ae7d41a9e8976ffcc93c4
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/237485
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/9741
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-18 08:48:05 +02:00
Stefan Reinauer 2df124db36 lint: Add check for new board name scheme
This check verifies that all mainboard vendors
and boards have a Kconfig.name entry.

Change-Id: I3ed3bfa0d3f78e55a8d54918f5f3f29f51068e48
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9707
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-04-18 08:31:36 +02:00
Julius Werner a7d924412a timestamps: You can never have enough of them!
Now that we have timestamps in pre-RAM stages, let's actually make use
of them. This patch adds several timestamps to both the bootblock and
especially the verstage to allow more fine-grained boot time tracking.

Some of the introduced timestamps can appear more than once per boot.
This doesn't seem to be a problem for both coreboot and the cbmem
utility, and the context makes it clear which operation was timestamped
at what point.

Also simplifies cbmem's timestamp printing routine a bit, fixing a
display bug when a timestamp had a section of exactly ",000," in it
(e.g. 1,000,185).

BRANCH=None
BUG=None
TEST=Booted Pinky, Blaze and Falco, confirmed that all timestamps show
up and contained sane values. Booted Storm (no timestamps here since it
doesn't support pre-RAM timestamps yet).

Change-Id: I7f4d6aba3ebe3db0d003c7bcb2954431b74961b3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7a2ce81722aba85beefcc6c81f9908422b8da8fa
Original-Change-Id: I5979bfa9445a9e0aba98ffdf8006c21096743456
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/234063
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9608
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-14 09:03:40 +02:00
Julius Werner efcee767de CBFS: Automate ROM image layout and remove hardcoded offsets
Non-x86 boards currently need to hardcode the position of their CBFS
master header in a Kconfig. This is very brittle because it is usually
put in between the bootblock and the first CBFS entry, without any
checks to guarantee that it won't overlap either of those. It is not fun
to debug random failures that move and disappear with tiny alignment
changes because someone decided to write "ORBC1112" over some part of
your data section (in a way that is not visible in the symbolized .elf
binaries, only in the final image). This patch seeks to prevent those
issues and reduce the need for manual configuration by making the image
layout a completely automated part of cbfstool.

Since automated placement of the CBFS header means we can no longer
hardcode its position into coreboot, this patch takes the existing x86
solution of placing a pointer to the header at the very end of the
CBFS-managed section of the ROM and generalizes it to all architectures.
This is now even possible with the read-only/read-write split in
ChromeOS, since coreboot knows how large that section is from the
CBFS_SIZE Kconfig (which is by default equal to ROM_SIZE, but can be
changed on systems that place other data next to coreboot/CBFS in ROM).

Also adds a feature to cbfstool that makes the -B (bootblock file name)
argument on image creation optional, since we have recently found valid
use cases for CBFS images that are not the first boot medium of the
device (instead opened by an earlier bootloader that can already
interpret CBFS) and therefore don't really need a bootblock.

BRANCH=None
BUG=None
TEST=Built and booted on Veyron_Pinky, Nyan_Blaze and Falco.

Change-Id: Ib715bb8db258e602991b34f994750a2d3e2d5adf
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e9879c0fbd57f105254c54bacb3e592acdcad35c
Original-Change-Id: Ifcc755326832755cfbccd6f0a12104cba28a20af
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229975
Reviewed-on: http://review.coreboot.org/9620
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-14 09:01:27 +02:00
Vadim Bendebury 5aaa828571 util/ipqheader: Add utility to create uber-SBL for IPQ8064
With the Storm image layout reworked, the very first blob read out of
NOR SPI flash by the IPQ8064 maskrom is supposed to be a concatenation
of three binaries: one to run on RPM, another one to run on AP, and
the third one - the actual coreboot bootblock.

This layout allows to greatly reduce the size and complexity of the
two first blobs, as they do not need to include the SPI driver.

The first binary in the input file list starts with the combined
header, describing the rest of the blob. This utility copies the first
input file into output, updating the combined header with the total
size of the concatenated binaries.

The second and third binaries in the combined image are required to be
aligned at 256 byte offsets in the file as counted from the end of
the combined header. The new utility allows to concatenate two or
three files, always expecting the first file to be prepended by the
combined header.

For further reference below is the utility's help message:

  mbncat.py: [-v] [-h] [-o Output MBN] sbl1 sbl2 [bootblock]

  Concatenates up to three mbn files: two SBLs and a coreboot bootblock
    -h This message
    -v verbose
    -o Output file name, (default: sbl-ro.mbn)

BRANCH=none
BUG=chrome-os-partner:34161
TEST=run the new utility and compare the result with the output of
     the vendor provided tool. The output files are exactly the same.

Change-Id: I1d3b3634ecc3f46ea88adb9b6c4fbfc017cc06ac
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 94008340bc5eaf19d286b3feaa4091e5c5e285aa
Original-Change-Id: I00724f7c75703fc90d7971c3cb337c33ca96f2b5
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/232047
Original-Reviewed-by: Manoj Juneja <mjuneja@qti.qualcomm.com>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9572
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13 17:36:27 +02:00
Vadim Bendebury f44319c12d util/bimgtool: Add verification mode
When only one argument is passed on the command line, consider this
argument the name of the BIMG formatted file, and verify its
integrity.

Update the help/usage text to match new behavior.

BRANCH=none
BUG=none

TEST=when the corrupted coreboot BIMG image is passed as the only
     argument, this utility reports the problem. With the build fixed,
     the check passes without errors (the second invocation below).

$ build/util/bimgtool/bimgtool /build/urara/firmware/coreboot.rom.serial
Data header CRC mismatch at 0
$ build/util/bimgtool/bimgtool /build/urara/firmware/coreboot.rom.serial
$

Change-Id: I9f0672caa38e3d27917471fc5137ede4ca466e9a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3e631c311dbf2fb04714e437f95c41629155527f
Original-Change-Id: Ie56f87f99838891d8e341d7989c614efbcabe0cd
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/227522
Original-Reviewed-by: Zdenko Pulitika <zdenko.pulitika@imgtec.com>
Original-Tested-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Reviewed-on: http://review.coreboot.org/9452
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-10 12:03:35 +02:00
Ionela Voinescu a545778d13 util/bimgtool: Use CRC 16 instead of CRC x25.
Switched to CRC 16 as it's 40% faster than CRC x25.
Both CRC 16 and CRC x25 are supported and either can be selected through
define directives.

BUG=chrome-os-partner:31438
TEST=built urara bootblock and verified content of bootblock.bin, observed
     expected content; ran it on Pistachio FPGA and observed that its
     content is read properly by bootrom.
BRANCH=none

Change-Id: I36dec6ec2d6616343f97cc8b6486c0a3e4ea49ba
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6d9318097ca9270bc245e7de4aff5f78dfbc1606
Original-Change-Id: If1a78350e0b48d91bfe64ead45f852f44ba3cf9a
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/226840
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/9415
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-04-10 12:00:27 +02:00
Patrick Georgi 1707a164c9 git: add rebase helper script
This is a script we have been using to rewrite commit messages when
upstreaming coreboot patches from the Chromium OS tree into coreboot
upstream.

Change-Id: I5442279c099dafe55cc97ccf09ee2bc2df4eca5f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/9299
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-10 09:01:30 +02:00
Patrick Georgi 2d8688711f abuild: also consider verstage architecture
We have another stage which we need to test for. Not a problem
right now, because it always matches either bootblock or romstage,
but future proof the test.

Change-Id: Id0a16d9bc1270516f2c00f9f8fd049420c9ba354
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9380
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-10 07:42:20 +02:00
Daisuke Nojiri 93d8e3c487 armv7-m: add armv7-m configuration
this change adds armv7-m configuration for bootblock and verstage.

BUG=none
TEST=Built cosmos, daisy_spring, falco, lumpy, nyan, nyan_blaze,
rush_ryu, storm, veyron_pinky
BRANCH=none
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>

Change-Id: Ib2496e33d5690c91c8fff0f101ec31837c8809bc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 34b838ebdcb0506799d86b64204f54a171114304
Original-Change-Id: I1c899d8969b1f8d0fa4cff617099d222bc4b4f4b
Original-Reviewed-on: https://chromium-review.googlesource.com/224772
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: http://review.coreboot.org/9379
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-10 07:42:18 +02:00
Furquan Shaikh 42e23a67ad timestamp: Add bootblock start and end to timestamp constants
BUG=chrome-os-partner:32973
BRANCH=None
TEST=cbmem -t to check proper timestamps on ryu

Change-Id: Ic31c5d9f3e397d90b08fe1c5e152148f4a278b95
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 92469e04c1c52bd60a8a37f017d865d0a838bff5
Original-Change-Id: I95419a6d240c168c8b6a489cac969390ecf6dea0
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/223345
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9340
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-08 08:48:04 +02:00
Alexander Couzens 0edf419852 ectool: add query function to ectool
`ectool -q` - Query the EC IRQ byte.
Should return 0x00 otherwise the IRQ handler is usally broken or disabled.

Tested-on: Lenovo X201t

Change-Id: I0b8c2dbcf38d2eab89d0fbea05795759c4517f6d
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8382
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
2015-04-08 08:41:59 +02:00
Alexander Couzens 46ca3a5534 ectool: add --dump / -d for RAM dump
This moves the ram dump behind an argument, but
it's still called by default when no other arguments given.
To hold backward compatibility -i also prints out RAM.

Change-Id: I82648e8cf1eac455e9937bd3669a0e91a3ee87cf
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8381
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Peter Stuge <peter@stuge.se>
2015-04-08 08:40:13 +02:00
Stefan Reinauer f78a09b60c kconfig: Add wildcard support for "source"
Kconfig's include directive "source" does not support
wildcards (e.g. source src/mainboard/*/Kconfig) which
makes automatic inclusion of all boards a tedious task
and prevents us from implementing "drop in" boards.

In our Makefile.inc files we already include mainboard
directories per wildcard, so let's add the infrastructure
to do the same with Kconfig.

Change-Id: I1988ff6ce3e167e86bb5cb65fc04a13748599dad
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9294
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-06 23:52:57 +02:00
Stefan Tauner 1f5349e61d nvramtool: fix getopt handling with unsigned char
make failed while executing "OPTION     option_table.h" by printing
nvramtool's usage message when crosscompiling coreboot on the BBB.
The reason is the usage of char for the return value of getopt instead
of int and comparing it to -1 later... although char might be unsigned
as it is usually on ARM.

Change-Id: Ib20fd5ef174d484bbb35f80150b8f898d95d0fe4
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/9307
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-06 23:29:06 +02:00
Stefan Reinauer 362f048979 kconfig: Replace mentions of "list_struct" to "list_head"
There's no such thing as "list_struct".

Signed-off-by: Andrey Utkin <andrey.krieger.utkin@gmail.com>
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Acked-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>

Change-Id: Ida39beb7b81801b277b623ff5a40291d643706ee
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9314
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-06 23:15:10 +02:00
Stefan Reinauer 5910aa88a7 kconfig: calloc/xcalloc: Fix argument order
The calloc() and xcalloc() functions takes @nmemb first and then @size.  Fix all w/
pattern "calloc\s*(\s*sizeof".

Signed-off-by: Arjun Sreedharan <arjun024@gmail.com>
Cc: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1417866043-1877-1-git-send-email-arjun024@gmail.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

Change-Id: I8b51cc59b3f3631b93b7e215fec5bf140cc2cbf9
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9313
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-06 23:14:59 +02:00
Stefan Reinauer 1824ce3c40 kconfig: Fix warning "‘jump’ may be used uninitialized"
Warning:
In file included from scripts/kconfig/zconf.tab.c:2537:0:
scripts/kconfig/menu.c: In function ‘get_symbol_str’:
scripts/kconfig/menu.c:590:18: warning: ‘jump’ may be used uninitialized in this function [-Wmaybe-uninitialized]
     jump->offset = strlen(r->s);

Simplifies the test logic because (head && local) means (jump != 0)
and makes GCC happy when checking if the jump pointer was initialized.

Signed-off-by: Peter Kümmel <syntheticpp@gmx.net>
Signed-off-by: Michal Marek <mmarek@suse.cz>

Change-Id: I43de391c9573a28c66d17e7dc535033be39060de
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9312
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-06 23:14:09 +02:00
Stefan Reinauer 6654ab02fc kbuild: trivial - remove trailing empty lines
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

Change-Id: I019ba09f7371cff2699a6c854c478fec53e51126
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9311
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-06 23:13:50 +02:00
Stefan Reinauer f2927e9470 kconfig: lxdialog: fix spelling
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Michal Marek <mmarek@suse.cz>

Change-Id: I033338a4a3f3a20944feace46b679c85ee32d14e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9310
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-06 23:13:40 +02:00
Stefan Reinauer cce666207f kconfig: use va_end to match corresponding va_start
Although on some systems va_end is a no-op, it is good practice
to use va_end, especially since the manual states:

"Each invocation of va_start() must be matched by a corresponding
invocation of va_end() in the same function."

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>

Change-Id: Ia08a57c37a6294e002cb6ce4c0a010c0d2edf973
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9309
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-06 23:13:29 +02:00
Stefan Reinauer 3ec23b3d51 kbuild: trivial - use tabs for code indent where possible
Imported from upstream linux kernel kconfig.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

Change-Id: Ieed948c6b9c5fc40c1f3d652df11fa70ec6e93a0
Original-Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Original-Signed-off-by: Michal Marek <mmarek@suse.cz>
Reviewed-on: http://review.coreboot.org/9308
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-06 23:13:15 +02:00
Stefan Reinauer 14f72bc2cc kconfig/lxdialog: get ncurses CFLAGS with pkg-config
This makes "make menuconfig" also work on systems where ncurses is not
installed in a standard location (such as on NixOS).

This patch changes ccflags() so that it tries pkg-config first, and only
if pkg-config fails does it go back to the fallback/manual checks. This
is the same algorithm that ldflags() already uses.

Signed-off-by: Bjørn Forsman <bjorn.forsman@gmail.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>

Change-Id: Ie2372ca35546c1fc2d6cf603614683312ee4ea4c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9315
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-06 23:12:55 +02:00
Martin Roth dde307c01a cbfstool: add filetypes for FSP, MRC, SPC and MRC_CACHE
This adds a few new file types to cbfstool.  Currently these
files are being added using bare hex values in the coreboot
makefiles.  This patch is just to make the values official and
to help get rid of some confusion in the values used within the
makefiles.

All of these new types are roughly equivalent to raw.

Change-Id: I37c4180a247136cd98080f6f7609d3cf905a62f5
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/8977
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-30 21:45:11 +02:00
Patrick Georgi e0935bb405 build system: mips is a valid nickname for mipsel
Change-Id: I5829a96cbb0af0398113efbdf34dfa3d102bf4c8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/9146
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
2015-03-30 21:42:40 +02:00
Patrick Georgi 5602f2cd73 crossgcc: Fix calling outside util/crossgcc
Copy $0 contains the path, and we cd into that early.

Change-Id: If4124d16dea97b5eee4996bdfa3eae3d5d94c5d1
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/9145
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-30 12:04:39 +02:00
Idwer Vollering b5589026c7 util/genbuild_h: work around GNU date
Confirmed to work on FreeBSD using sh from base and bash from ports.
Verified to not break M.O. on Linux.

Change-Id: I3bce724c889c7fb760b30b25e9fc0b74620e2c53
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/9056
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-29 22:45:08 +02:00
Patrick Georgi 0d06b2dee9 crossgcc: Build mipsel-elf, not mips-elf
The build system expects mipsel, and it's the more
precise name, too.

Change-Id: I9e1135385b3f1374b3179ecf5e11a1d60bc17ef7
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/9144
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-03-29 22:37:22 +02:00
Vadim Bendebury 2d510d01d1 urara: use proper SOC name
Danube has become Pistachio, let's rename all instances where this SOC
is mentioned.

BUG=none
TEST=board urara still builds

Change-Id: Iea91419121eb6ab5665c2f9f95e82f461905268e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 58696cc7c77a70dca2bfd512d695d143e1097a78
Original-Change-Id: Ie5ede401c4f69ed5d832a9eabac008eeac6db62d
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/220401
Original-Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: http://review.coreboot.org/9048
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-27 08:06:26 +01:00
Lubomir Rintel 2a13bad8df inteltool: add ICH8M-E support
Tested on a Lenovo X61.

Change-Id: I047f5a029d9be9fe6a000e2b45be44c7f14b33d7
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: http://review.coreboot.org/8568
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-26 03:33:46 +01:00
Stefan Reinauer 172d33594e util: Add miniconfig, a script to minimize coreboot configurations
This script produces a "minimal" configuration from a full coreboot
configuration, e.g. a configuration file that only contains the differences
between the default configuration of a board and the input configuration
file.

Usage: util/kconfig/miniconfig config.big config.mini

This will read config.big and produce config.mini. If you omit config.mini,
config.big will be changed in place.

Minimal configurations are easier to read and more robust when reusing
them among different versions of coreboot as they reflect exactly the
changes made to the default configuration instead of a full snapshot
of all configuration options.

Change-Id: Ifbee49e0192c2c557b18bcc1a92fe2a5d5164a3a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8974
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-26 03:06:54 +01:00
Patrick Georgi 74c06421b9 crossgcc: Factor out error reporting
Instead of repeating the ok/failed test all the time,
move it into a function.

Change-Id: I7496dfb5d3d2385316c577e1cf0901950b0e7083
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/8987
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-03-25 23:38:34 +01:00
Patrick Georgi 7964354467 crossgcc: point users to the log file in case of error
The first problem for crossgcc users that encounter build errors is
figuring out what is wrong with the build. Point out where the logs
reside.

Change-Id: I0300ecf6356c1a4ce18ae1e37fe0a56f46210d13
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/8982
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-25 23:38:32 +01:00
Patrick Georgi 915c4fc6fe crossgcc: check for more tools that we require
Change-Id: Ie002c69ab23cfc961b77771c4f2c20e5ae6bea60
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8633
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-25 09:15:40 +01:00
Stefan Reinauer 42412b603c checkpatch: Fix running out of coreboot's tree
* Fix up tree detection to work in a coreboot tree
* Switch C99_COMMENT from ERR to CHK

Change-Id: Ie8d6d1407853b77a4b3e9763f23481bd9402bc61
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8418
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-24 23:35:28 +01:00
huang lin 817e455d38 add make_idb.py & update bootblock
BUG=chrome-os-partner:29778
TEST=Build coreboot

Change-Id: Ica7b2bf2cf649c2731933ce59a263692bb2c0282
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ba9c36daedc749748f45e68a84f8c34c636adb1c
Original-Change-Id: Ia0e4e39d4391674f25e630b40913eb99ff3f75c4
Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/209427
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/8862
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-24 15:24:52 +01:00
Vadim Bendebury fddf75e4af build: mips: add default compilation options
MIPS targets should be compiled with no position independent code
allowed, as the generated image often does not support short range
components reference.

BUG=chrome-os-partner:31438
TEST=with the rest of the patches included MIPS board urara builds
     successfully

Change-Id: I8ac2a2f6979d3b468159c9e29d07e022f48ab18a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e932b203db3e7cb510a7bf862d4538d55b6c7271
Original-Change-Id: I637dd44eb565447c18b2c3cdb022d0933c52fd20
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/215677
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8822
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-23 15:35:12 +01:00
Vadim Bendebury a6b220d8f8 Allow for different BFD elf formats per architecture
The upcoming MIPS toolchain inside chroot generates elf images of
elf32-tradlittlemips format, whereas readily available tools outside
of chroot generate images of elf32-littlemips format. Both of these
formats are perfectly fine, but xcompile accepts only one format per
CPU architecture.

This patch allows to specify multiple formats per architecture, any
matching format will suffice.

BUG=chrome-os-partner:31438
TEST=emerged arm, x86 and mips targets inside chroot

Change-Id: I2c6b8e46b9299059b8e099b93c8c3dcf0a569899
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7f2f1d51643f33b72ac5e4091669f38662e5b9ce
Original-Change-Id: I22405e71ac72b985fad51e2f5d7cc014107b8a9e
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/214599
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8823
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21 16:57:27 +01:00
Paul Burton b1688caa6f imgtec/danube: Build BIMG boot images
Add a new utility named bimgtool, a simple tool which generates boot
images in the BIMG format. This is the format the Danube boot ROM
expects the user supplied code to be wrapped in, it is described by
struct bimg_header in the code.

This utility will be used to wrap the coreboot bootblock when building
Danube targets.

BUG=chrome-os-partner:31438
TEST=none yet

Change-Id: I08ddb1b70d0b1feb1ffb3d62c4e5e6f07f4acdb7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7fe6a9f383b79120f9ae231453d4b3a0f85b4fa7
Original-Change-Id: I63b9f5e09cd1f12765317b38e2a0dd033cdd6d39
Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/207975
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8768
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21 16:57:22 +01:00
Aaron Durbin b58f9e3a30 cbmem: stop assuming 1MiB of memory can be mapped
The default mapping size is 1MiB of ram. However, not
all systems allow 1MiB of memory to mapped depending on
the kernel's memory map. Therefore, be explicit about
the sizes to mmap().

The only path that wasn't cleaned up was the coverage path
as that needs to handle dynamic cbmem. The correct way to
fix that is to add a global like the timestamps that is set
while parsing cbtable.

BUG=chrome-os-partner:31355
BRANCH=None
TEST=Can cbmem -ltc on ryu.

Change-Id: I548afa5ddbe0a859f52bc2ab2d0931186ee378a5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: df4991ce1da7f0c25e99d84222cbc8d3189d0d66
Original-Change-Id: I27b70ae8a8fba168d1c1829bbef0135c7b651eac
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/221971
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8829
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21 08:44:57 +01:00
Furquan Shaikh de77e6a99f ARM64 rmodule: Add new reloc type R_AARCH64_LDST8_ABS_LO12_NC
BUG=chrome-os-partner:33962
BRANCH=None
TEST=Compiles and boots to kernel prompt.

Change-Id: Id7b0dfb5a51c2f29bdb031b98606940c118959ec
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7a1c4d2f35c135d542708c4dabcca5e8c1d453c0
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Change-Id: If132323885f23d75e1fcde064398e85c2c17f257
Original-Reviewed-on: https://chromium-review.googlesource.com/231560
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8809
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21 08:41:42 +01:00
Julius Werner a807f83936 cbfstool: Remove empty line that looks out of place
BRANCH=None
BUG=None
TEST=Manual

Change-Id: I8b31a0b194d353ea3e7863513f2e36f3e032fad8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7ccba49a7c2372cdfff6e2947e417d4d4f5436c2
Original-Change-Id: I9beebdf29e4fc4aa645581146fdc61c659de72df
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229973
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/8808
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21 08:41:28 +01:00
Aaron Durbin a47898ef6c rmodtool: add another aarch64 relocation
BUG=chrome-os-partner:32112
BRANCH=None
TEST=Built secmon which had this type of relocation.

Change-Id: Ie367c348fbf59465e238e5fa60f217f5373501b3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a754bc1fe39c19ab8b2f7be9648cccb06156b0ef
Original-Change-Id: If170d9e270daf3153e92d16c06516915c727e930
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/218843
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8807
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21 08:41:17 +01:00
Furquan Shaikh d2338bad95 rmodtool: Add support for aarch64
BUG=chrome-os-partner:31615
BRANCH=None
TEST=Compiles succesfully, rmodule created and loaded for ryu

Change-Id: Icc80b845fe43a012665d77c3ef55bd30784fd3fc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 24ad4383a9ea75ba6beb084451b74e8a8735085b
Original-Change-Id: I4f3a5dbb8fc8150aa670d2e6fed56a6774feb4a6
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/214329
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8806
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21 08:41:10 +01:00
Nico Huber b0f8326ac2 uio_usbdebug: User-space-i/o framework for usbdebug
uio_usbdebug enables you to debug coreboot's usbdebug driver inside a
running operating system (only Linux at this time). This comes very
handy if you're hacking the usbdebug driver and don't have any other
debug output from coreboot itself.

Currently, only Intel chipsets are supported.

Change-Id: Iaf0bcd4b4c01ae0b099d1206d553344054a62f31
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/4695
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-19 19:19:42 +01:00
Patrick Georgi 8135dba368 crossgcc: jump to crossgcc path before building the toolchain
We use paths relative to that in the buildgcc script.

Change-Id: I2b79c3d2c75088af7e8e362d18a38274352eb965
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/8713
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-18 21:50:33 +01:00
Furquan Shaikh c4f08f7f9c cbfstool: Add relocation codes for arm mode
Add relocation codes required for arm mode. These are required by armv4.

BUG=chrome-os-partner:30784
BRANCH=None
TEST=Compiles successfully for rush

Original-Change-Id: Ie7c5b3e07689c85091036a619a65f9fea1918b6b
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/209973
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit dc5f411f95e02a02b4a4ef4652303ce62aa220c2)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ie62ed730080299e474c256371ab88f605b54c10f
Reviewed-on: http://review.coreboot.org/8675
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-17 16:53:50 +01:00
Stefan Reinauer 24f9cb91d0 crossgcc: Add x86_64 to list of supported architectures
You can build your new toolchain with:
  $ cd util/crossgcc/
  $ ./buildgcc -d /opt/cross -p x86_64-elf -j 16
or
  $ make crossgcc-x64

Change-Id: I8eb584166294578d2b33c63e94ed3aca9b5de4f4
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8668
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-17 01:07:27 +01:00
Alexander Couzens a74d569731 genbuild_h.sh: use the last git commit as timesource if available
Change-Id: I1472265adac9406a86da22839199ec6bbdaa0c69
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8619
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-16 04:02:08 +01:00
Alexander Couzens a49c0cca9f crossgcc: fix copy-paste mistake on riscv make target
Change-Id: Id618595a321529770964b125f7490dcb08376643
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8637
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-10 22:19:42 +01:00
Alexandru Gagniuc f14bd79ae1 util/inteltool: Support reading RCBA of NM70 southbridge
Change-Id: Ia90f967a4988214c719f374a49233bb6fade11b0
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/8481
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-10 03:48:23 +01:00
Alexander Couzens fcf3d60475 genbuild_h.sh: set TZ + LANG variable for predictable `date` and `git` output
Change-Id: I10fb0f797b79a2bdbc41c31fe846cc04e26260b3
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8618
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-09 22:02:21 +01:00
Alexander Couzens 8448bd1baf genbuild_h.sh: derive all timestamp variables from one timestamp
If not derived it's possible it defines
inconsistent timestamps which differ from each other.

Change-Id: I090fdce4c4c1c24135ec72818eecb69e168df565
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8617
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-09 22:01:24 +01:00
Alexander Couzens 510d1bd3b0 build.h: remove variable for the builduser, -hostname and -domain
They don't contain any useful information and
also block us from having reproducible builds.

Change-Id: Ib03887f6a548230de9f75fb308c73a800e180c48
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8616
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-09 17:53:16 +01:00
Patrick Georgi b706288d95 crossgcc: Unify tool tests, add check for g++ or clang
Change-Id: I406f5cfc61bc87ccc2c0b9283b4fbb8cef8dfc1b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/8522
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-09 13:33:33 +01:00
Patrick Georgi f0bbc95f12 crossgcc: Add RISC-V support
Change-Id: If1e0f7ed21f67d7a185dad251ede81ddbc18c4e5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8629
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-03-08 13:56:08 +01:00
Patrick Georgi 53c388fe6d crossgcc: Update toolchain
Update GCC to 4.9.2, binutils to 2.25.

Change-Id: Iae9763163b7f42c55a39e26b4beedee67d14a6e4
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8628
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-03-08 13:56:03 +01:00
Patrick Georgi 9b7efa55b3 crossgcc: Add mipsel-elf as supported target
Change-Id: Icd8050d9193f9957468cfa13901ec14e993e50de
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8630
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-03-08 12:32:12 +01:00
Martin Roth e236204d53 Move generation of build.h into a shell script
Moving the routines that create build.h into a script offers
several advantages.  We can create more complex functions to
run and we don't have to deal with both bash and Make at the same
time.

This script combines what is currently in Makefile.inc with a
couple of updates.
- Update how it determines whether to use git for the timestamp
- Move the git revision string generation inside the routine
that checks to see if we have git.
- Add a timeout for the domain name check.

Change-Id: I93c131e8d01a0099eb13db720fa865c627985750
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/8428
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-06 20:33:43 +01:00
Patrick Georgi 48e78cf6fd board-status: update mediawiki interface
Our Mediawiki instance doesn't accept the old txt format anymore.

Change-Id: I94b9f5366900ec8e192abab3ed716dbced4fc4f7
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8567
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-04 20:46:01 +01:00
Stefan Reinauer 2dd161f556 cbfstool: Clean up code
cbfstool has diverged between coreboot upstream and the chromium tree.
Bring in some of the chromium changes, in particular the useful remainders
of cbf37fe (https://chromium-review.googlesource.com/176710)

- fix coding style
- mark unused variables explicitly unused
- remove some dead code

Change-Id: I354aaede8ce425ebe99d4c60c232feea62bf8a11
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/8577
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-03-04 19:53:20 +01:00
Paul Burton 3318692078 cbfstool: Add the MIPS architecture
Specify a CBFS architecture value for MIPS and allow cbfstool to make
use of it.

Original-Change-Id: I604d61004596b65c9903d444e030241f712202bd
Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/207971
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 7c4df61715df3767673841789d02fe5d1bd1d4a0)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ib30524f5e7e8c7891cb69fc8ed8f6a7e44ac3325
Reviewed-on: http://review.coreboot.org/8519
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-03 18:43:51 +01:00
Patrick Georgi 6321f523e7 crossgcc: Clean GNU make context so builds succeed
GCC's build system is sometimes confused by our build system's
configuration: make crossgcc failed, while
util/crossgcc/buildgcc -p armv7-a-eabi didn't.

Make sure the GCC build system runs independently from
ours by breaking any ties.

Change-Id: I563e17b22127bc8c83ebfb17252184a3b6e0e58b
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8545
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-02-28 22:20:44 +01:00
Paul Burton 6529c33a67 build: mipsel cross compiler support
This patch introduces support for building a MIPS cross compiler
targetting little endian machines by default.

Original-Change-Id: I116f6f431cdf80f5f5f58d2743357a9f70a7347d
Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/207970
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit d6c9603c41b3d11400cee7b5b409203af0632aa2)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I543cd2276d2f63ed2036a1c1259c9a07cb8a4ba8
Reviewed-on: http://review.coreboot.org/8518
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-24 17:28:23 +01:00
Paul Menzel e661942785 util/crossgcc/buildgcc: Upgrade MPC from 1.0.1 to 1.0.3
The following changes are included.

Changes in version 1.0.3:
  - Fixed mpc_pow, see
    http://lists.gforge.inria.fr/pipermail/mpc-discuss/2014-October/001315.html
  - #18257: Switched to libtool 2.4.5.

Changes in version 1.0.2:
  - Fixed mpc_atan, mpc_atanh for (+-0, +-1), see
    http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57994#c7
  - Fixed mpc_log10 for purely imaginary argument, see
    http://lists.gforge.inria.fr/pipermail/mpc-discuss/2012-September/001208.html

Upgrading also fixes the issue, where for example running `make crossgcc-arm`
ails as MPC cannot be built.

	Building MPC 1.0.1 ... failed

As it worked for others, it turns out that I had a release archive for
MPC 1.0.1 cached from October 2014, which was generated incorrectly, so
that `./configure` and `Makefile` are missing.

	$ LANG=C ls -l util/crossgcc/tarballs/mpc-1.0.1.tar.gz
	-rw-r--r-- 1 joey joey 224232 Oct 19  2013 util/crossgcc/tarballs/mpc-1.0.1.tar.gz
	$ md5sum util/crossgcc/tarballs/mpc-1.0.1.tar.gz
	22a27bee89616dca4d654fc579a816e5  util/crossgcc/tarballs/mpc-1.0.1.tar.gz
	$ md5sum mpc-1.0.1.tar.gz # downloaded today
	b32a2e1a3daa392372fbd586d1ed3679  mpc-1.0.1.tar.gz

So upgrade to MPC 1.0.3 as the release archive as of today contains the
needed files.

	$ md5sum util/crossgcc/tarballs/mpc-1.0.3.tar.gz
	d6a1d5f8ddea3abd2cc3e98f58352d26  util/crossgcc/tarballs/mpc-1.0.3.tar.gz

Change-Id: Ibfd02a9b362b12361b210d512420b87caebb0fdf
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
TEST:Run `make crossgcc-arm` and observe `Building MPC 1.0.3 ... ok`.
Reviewed-on: http://review.coreboot.org/8521
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-23 21:38:44 +01:00
Paul Menzel 1cc77e0f89 util/board_status/board_status.sh: Move comment to right position
Fix up commit 1b6e7a67 (Updates to the board status script) adding this
comment before running `cbfstool` by moving it to a more appropriate place.

Change-Id: Iff79ed44e8e5ced55f2345407d1668858098ebe4
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/8491
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2015-02-20 20:45:41 +01:00
Patrick Georgi f3d8b9a663 xcompile: specify arm64 subarches
This tells abuild that it can in fact build arm64
images.

Change-Id: I47695372053513ca039e118776aa904ea0afa21d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/8474
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-02-17 18:11:18 +01:00
Marc Jones e77e37b957 cbootimage: Add HOSTCC and flags
Add the flags used by the Nvidia makefile and use HOSTCC
to build cbootimage. Note that adding -g makes the BCT
very large, so leave that flag out.

Change-Id: I4431efffdfdcbd030665b26f5b799352e38d1f95
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/8411
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-15 09:21:02 +01:00
Werner Zeh f129756ac9 lint: exclude *.hex files from whitespace checking
If one needs raw binary files, .bin extension cannot
be used due to settings in .gitignore. This patch
allows to use .hex files. To avoid lint checks on these
files, exclude the .hex extension from the test.

Change-Id: I4b503229d63694c48cce12ca8cd33ea58172af01
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: http://review.coreboot.org/8403
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-12 11:23:30 +01:00
Patrick Georgi 11b6ab6492 lint: exclude nvidia submodule from file list
From git's point of view submodules are a weird third thing between file
and directory. Avoid trying to apply file handling on a directory.

Change-Id: Ibbc9c28e1657d96413c5fb08705d30e25171254d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8372
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2015-02-12 11:22:59 +01:00
Stefan Reinauer 44d0fd9841 Add Linux kernel's checkpatch.pl script
Carefully staging to enable checkpatch for coreboot contributions.

The biggest offender of the rules enforced by checkpatch I have found so
far is ... Oh, you guessed it? It's checkpatch itself.

Change-Id: Iaacbcd52c3bc22b083a24127a3ea17a7cc706245
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8417
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-11 19:53:53 +01:00
Alexander Couzens c768f9231b utils/msrtool: add westmere cpuids to nehalem
Westmere's are nehalem's in 32nm

Change-Id: I529194d50dbe3f585faee14961542433ea96ab75
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8293
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2015-02-11 02:51:16 +01:00
Alexander Couzens ba0e895659 ectool: remove extra printf("Not dumping EC IDX RAM.")
It doesn't provide any useful information.

Change-Id: I13e68d443bbcadea45b8fbcc262ceb9deb3e2e61
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8380
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Peter Stuge <peter@stuge.se>
2015-02-11 02:36:40 +01:00
Alexander Couzens a5410dc450 ectool: add write support
Use `ectool -w <addr> -z <data>` to write into ec ram

Change-Id: Id4aca045f6b7c2343be96ea474ee74033897b8b7
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8323
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
2015-02-11 02:35:32 +01:00
Marc Jones c4dbdaf50a xcompile: Rename aarch64 to arm64
coreboot toolchain.inc uses the ARCH_SUPPORTED variable set
by xcompile. This change allows for consistent naming in the
toolchain.inc generated variables.

Change-Id: Iafed06cf2d19a533f99e10b76aca82adc3e09fa8
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/8235
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2015-01-26 11:40:37 +01:00
Julius Werner 337de4c0e5 cbmem: Add support for new 'coreboot' compatible device tree binding
This patch brings the cbmem utility in line with the recent change to
coreboot's device tree binding. Since trying to find the right node to
place this binding has been so hard (and still isn't quite agreed upon),
and because it's really the more correct thing to do, this code searches
through the device tree for the 'coreboot' compatible property instead
of looking up a hardcoded path. It also provides bullet-proof
'#address-cells' handling that should work for any endianness and size.

BUG=chrome-os-partner:29311
TEST=Ran cbmem -c and cbmem -t on Nyan_Big. Also straced the to make
sure everything looks as expected. 'time cbmem -t' = ~35ms shows that
there is no serious performance problem from the more thorough lookup
code.

Original-Change-Id: I806a21270ba6cec6e81232075749016eaf18508b
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/204274
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
(cherry picked from commit 3e64e28f684e60e8b300906c1abffee75ec6a5c2)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I0a0a4f69330d3d8c5c3ea92b55f5dde4d43fca65
Reviewed-on: http://review.coreboot.org/8141
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-13 21:31:50 +01:00
Furquan Shaikh 01f5396bdc cbfstool: Remove arch check for different stages
Remove the arch check for each stage as the arch for different stages can be
different based on the SoC. e.g.: Rush has arm32-based romstage whereas
arm64-based ramstage

BUG=None
BRANCH=None
TEST=Compiles successfully for nyan, link and rush

Original-Change-Id: I561dab5a5d87c6b93b8d667857d5e181ff72e35d
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/205761
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Ronald Minnich <rminnich@chromium.org>
(cherry picked from commit 6a6a87b65fcab5a7e8163258c7e8d704fa8d97c3)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ic412d60d8a72dac4f9807cae5d8c89499a157f96
Reviewed-on: http://review.coreboot.org/8179
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-13 21:29:38 +01:00
Furquan Shaikh b26fd99087 cbfstool: Fix help display message
For arm64, the machine type is arm64 in cbfstool, however it was displayed as
aarch64 in help message. This patch corrects it.

BUG=None
BRANCH=None
TEST=None

Original-Change-Id: I0319907d6c9d136707ed35d6e9686ba67da7dfb2
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/204379
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 1f5f4c853efac5d842147ca0373cf9b5dd9f0ad0)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I00f51f1d4a9e336367f0619910fd8eb965b69bab
Reviewed-on: http://review.coreboot.org/8144
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-01-09 07:49:53 +01:00
Alexander Couzens aa3dd5d5db inteltool: add `-s` to dump spi bar and bios_cntl registers
Change-Id: I3bb5dc23885af8c992456ee5e4bd374cd4b813bf
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8049
Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-01-08 17:49:58 +01:00
Hung-Te Lin 0780d67ffe util/cbfstool: Fix byte-ordering for payload type field.
In https://chromium-review.googlesource.com/181272 the payload->type has been
changed to big-endian (network ordering) but the cbfs_image is still parsing
type as host ordering, which caused printing cbfs image verbosely
(cbfstool imge print -v) to fail to find entry field and print numerous
garbage output.

Payload fields should be always parsed in big-endian (network ordering).

BUG=none
TEST=make; cbfstool image.bin print -v -v -v # see payloads correctly

Original-Change-Id: If1ac355b8847fb54988069f694bd2f317ce49a1a
Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/200158
Original-Reviewed-by: Ronald Minnich <rminnich@chromium.org>
(cherry picked from commit 423f7dd28f8b071692d57401e144232d5ee2e479)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I5a4694e887c7ff48d8d0713bb5808c29256141a9
Reviewed-on: http://review.coreboot.org/8005
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2015-01-03 17:33:13 +01:00
Vadim Bendebury 8b143c5c8b cbmem: use a single id to name mapping table
CBMEM IDs are converted to symbolic names by both target and host
code. Keep the conversion table in one place to avoid getting out of
sync.

BUG=none
TEST=manual
  . the new firmware still displays proper CBMEM table entry descriptions:

    coreboot table: 276 bytes.
    CBMEM ROOT  0. 5ffff000 00001000
    COREBOOT    1. 5fffd000 00002000

  . running make in util/cbmem still succeeds

Original-Change-Id: I0bd9d288f9e6432b531cea2ae011a6935a228c7a
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/199791
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 5217446a536bb1ba874e162c6e2e16643caa592a)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I0d839316e9697bd3afa0b60490a840d39902dfb3
Reviewed-on: http://review.coreboot.org/7938
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-30 19:17:47 +01:00
Patrick Georgi 1dda372582 abuild: silence make
make called within make prints 'Entering directory'
cruft which confuses the architecture support test.
Silence it.

Change-Id: I7ce7e0ff49e9317fe736ed80f5f18186d416ae63
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/7968
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2014-12-29 18:44:07 +01:00
Kyösti Mälkki f9b8ed86dd cbfstool: Fix update-fit command
Regression in commit 3fcde22 caused parse_microcode_blob() to access
data outside cpu_microcode_blob.bin file in CBFS and create invalid
Intel Firmware Interface Table entries.

Change-Id: I1a687060084c2acd6cac5f5053b74a332b4ac714
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7958
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-28 19:58:35 +01:00
Alexandru Gagniuc 6c90f3334e util: Remove 'getpir' and 'mptable' tools
They create output in an obsolete form, are not actively maintained,
and the quality of the output is not better than randomly copy
pasting from other boards. These tools are no longer of any practical
value. remove them.

Change-Id: I49d7c5c86b908e08a3d79a06f5cb5b28cea1c806
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5158
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-19 21:15:18 +01:00
Felix Held 5eabe25a69 util/superiotool: change displayed name of chip id 0xc333 (nct6776)
nct6776f and nct6776d are just two package variants containing the same die

Change-Id: I4d319fa0e791e66ad04857dede2fdfc8e42dd45a
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/7806
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-12-19 19:01:47 +01:00
Felix Held 4a699d12c5 util/superiotool: fix default values for nct6776 (rev. c)
change default values according to the datasheet in revision 1.2

Change-Id: Iec1d55dd7b906a7a41940f3f8e42413922883efd
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/7805
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-12-19 19:01:27 +01:00
Scott Duplichan f2c9837e6f ifdtool: Add O_BINARY to open flags for Windows compatibility
Windows requires O_BINARY when opening a binary file. Otherwise
\n characters get expanded to \r\n and <ctrl>z is treated as
end of file. For compatibility with non-Windows hosts, the patch
defines O_BINARY if it is not already defined.

Change-Id: I04cd609b644b1edbe9104153b43b9996811ffd38
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/7789
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19 18:55:48 +01:00
Scott Duplichan e1a4dc803a arm_boot_tools: Add 'b' to fopen flags for Windows compatibility
Windows requires the 'b' (binary) flag when using fopen to open a
binary file. Otherwise \n characters get expanded to \r\n and <ctrl>z
is treated as end of file.

Change-Id: I3b85e4f9a8f7749801a39154881fe2eedd33f9b8
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/7790
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19 18:55:34 +01:00
Patrick Georgi efb2a8f7f3 nvidia/cbootimage: update to latest upstream
Scott Duplichan provided a win32 related fix that
we want to use.

Change-Id: I791b470f9f6c5bf140fc190d290741f35f05d254
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7827
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-18 02:21:38 +01:00
Martin Roth 51dde6fe3b inteltool: Start adding Bay Trail
- Add silvermont (Bay Trail core) MSRs - these are shared with
rangeley/avoton.
- Add GPIO values and GPIO muxing information.
- Add Bay Trail to the PM list.

Still to do:
- Northbridge functionality (RCBA, Memory timings, etc.)
- Add Graphics registers

Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-16 00:42:13 +01:00
Scott Duplichan 4270a9777c buildgcc: Fix msys2 crossgcc build fail
A leading double slash can result when $DESTDIR/$TARGETDIR is expanded
in the libelf portion of buildgcc. The leading double slash causes buildgcc to fail when run from Windows/Msys2. Replace $DESTDIR/$TARGETDIR
with $DESTDIR$TARGETDIR to avoid the problem.

Change-Id: Ide2bae41c07c1566f80104c3a2e2acab53de0d17
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/7788
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-15 16:49:42 +01:00
Alexandru Gagniuc 0f0d497217 abuild: Don't print "Using payload ..." message in quiet mode
It's not useful in quiet mode, and is very distracting.

Change-Id: I59dc8caa22b66980560d5afb76eae801efaa29ad
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/124
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-11 05:10:27 +01:00
Patrick Georgi e420139a52 crossgcc: clean up aarch64 target integration
We already have aarch64 targets. Extend the "all" target.

Change-Id: I74d9bf5123695318c15b73c89f170f3ebb20aa80
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7729
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2014-12-10 10:22:58 +01:00
Martin Roth ddb7a9d4a1 abuild: update output so multithreaded is decipherable
- add a 'quiet' mode that only prints important messages
- add vendor/mainboard to all strings printed

With quiet on, multithreaded looks like this:
skipping google/storm because we're missing compilers for (arm armv4 armv7)
iwill/dk8_htx built successfully. (took 5s)
jetway/j7f2 built successfully. (took 6s)
iwill/dk8x built successfully. (took 8s)
iwill/dk8s2 built successfully. (took 8s)
jetway/j7f4k1g5d built successfully. (took 10s)

With quiet off, single threaded now looks like this:
Building intel/emeraldlake2
Creating config file for intel/emeraldlake2...
    intel/emeraldlake2 (blobs, ccache)
intel/emeraldlake2 config created.
Compiling intel/emeraldlake2 image...
intel/emeraldlake2 built successfully. (took 5s)

And quiet off multithreaded looks like this:
Building iwill/dk8_htx
Creating config file for iwill/dk8_htx...
    iwill/dk8_htx (blobs, ccache)
intel/mohonpeak config created.
Compiling intel/mohonpeak image on 1 cpu...
intel/minnowmax config created.
--- snip ---
intel/mtarvon built successfully. (took 4s)
Building iwill/dk8s2
Creating config file for iwill/dk8s2...
    iwill/dk8s2 (blobs, ccache)
intel/mohonpeak built successfully. (took 5s)
Building iwill/dk8x

Change-Id: Ib7b9a625d77bb8e0663afc00d7133e415866ecec
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7716
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-10 00:17:31 +01:00
Marcelo Povoa 9b56b44eb6 aarch64: Add aarch64-elf toolchain to crossgcc Makefile
BUG=None
BRANCH=none
TEST=Build crosgcc for aarch64-elf
Signed-off-by: Marcelo Povoa <marcelogp@chromium.org>

Original-Change-Id: Ifc886b6bd125552855ad1cf49ee7c1b7a0350895
Original-Reviewed-on: https://chromium-review.googlesource.com/186413
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Original-Tested-by: Marcelo Póvoa <marcelogp@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: Marcelo Póvoa <marcelogp@chromium.org>
(cherry picked from commit 9959047c82c96108f4bdedad1db0219fcdc85378)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I5e781443bb11a7db3420bb8cfc447de8494b1d24
Reviewed-on: http://review.coreboot.org/7661
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-12-09 18:40:17 +01:00